UNISONIC TECHNOLOGIES CO., LTD UPSL104A Preliminary CMOS IC HIGH PRECISION OFF-LINE LED CONTROLLER DESCRIPTION 6 UTC UPSL104A is a primary side regulation off-line LED lighting controller which can achieve accurate LED current. It significantly simplifies LED lighting system design by eliminating the secondary side feedback circuitry. The device integrates PWM controller to enhance the performance of discontinuous conduction mode (DCM) flyback converters. The LED current (CC control) can be adjusted externally by the resistor Rs at CS pin. Device operates in PFM in CC mode as well at large load condition and it operates in PWM with frequency reduction at light/medium load. The UTC UPSL104A achieves high precision CV/CC regulation and high power efficiency. It offers comprehensive protection coverage with auto-recovery features including Cycle-by-cycle current limiting, VDD over voltage protection, VDD clamp, OTP, leading edge blanking, VDD under voltage lockout, etc. 4 1 2 3 SOT-26 FEATURES * High Precise Constant Current Regulation at Universal AC input * Primary-side Sensing and Regulation Without TL431 and Opto-coupler * Programmable CC Regulation * Adjustable Constant Current and Output Power Setting * Built-in Secondary Constant Current Control with Primary Side Feedback * Built-in Adaptive Current Peak Regulation * Built-in Primary winding inductance compensation 5 * Power on Soft-start * Built-in Leading Edge Blanking (LEB) * Cycle-by-Cycle Current Limiting * VDD Under Voltage Lockout with Hysteresis (UVLO) * VDD OVP * VDD Clamp ORDERING INFORMATION Ordering Number UPSL104AG-AG6-R www.unisonic.com.tw Copyright © 2016 Unisonic Technologies Co., Ltd Package SOT-26 Packing Tape Reel 1 of 6 Ver.a UPSL104A Preliminary MARKING PIN CONFIGURATION PIN DESCRIPTION PIN NO. 1 2 3 PIN NAME GND GATE CS 4 INV 5 6 COMP VDD CMOS IC DESCRIPTION Ground Totem-pole gate drive output for power MOSFET. Current sense input. Connected to MOSFET current sensing resistor node. The voltage feedback from auxiliary winding. Connected to resistor divider from auxiliary winding reflecting output voltage. Loop Compensation for CV Stability Power Supply BLOCK DIAGRAM VDD 6 Regulator & Vref Por Logic core Drive 2 GATE OVP Softstart 27.5V Tdemag detector CC controller INV 4 LEB CV controller 2V 3 CS 0.8V 5 1 COMP GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 Ver.a UPSL104A Preliminary CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT VDD Voltage VDD -0.3~VDD clamp V VDD Zener Clamp Continuous Current 10 mA COMP Voltage VCOMP -0.3~7 V CS Input Voltage VCS -0.3~7 V INV Input Voltage VINV -0.3~7 V Min/Max Operating Junction Temperature TJ -40~150 °C Min/Max Storage Temperature TSTG -55~150 °C Lead Temperature (Soldering, 10secs) TOPR 260 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=VDDG=16V, unless otherwise specified) PARAMETER Supply Voltage (VDD) Section Standby Current Operation Current VDD Under Voltage Lockout Enter VDD Under Voltage Lockout Exit Maximum VDD Operation Voltage Over Voltage Protection Threshold Current Sense Input Section LEB Time Over Current Threshold OCP Propagation Delay Soft Start Time Frequency Section IC Maximum Frequency System Nominal Switch Frequency ∆f/Freq SYMBOL IDD ST IDD op UVLO_(ON) UVLO_(OFF) VDD_clamp OVP TEST CONDITIONS MIN VDD=13V Operation supply current, INV=2V, CS=0V, VDD=VDDG=20V VDD falling 8.0 VDD rising 13.5 IDD=10mA Ramp VDD until gate shut down 26 TLEB VTH_OC Td_OC T_SS Freq_Max (Note 1) Freq_Nom Freq_startup INV=0V, Comp=5V Frequency shuffling range 787 55 TYP MAX UNIT 5 20 uA 1.6 3 mA 9.0 14.8 29 27.5 10.0 16.0 V V V V 600 800 110 17 60 50 14 ±6 29 813 65 ns mV ns ms KHz KHz KHz % Error Amplifier Section Reference Voltage for EA VREF_EA 1.96 2 2.04 V DC Gain of EA Gain 60 dB Gate Drive Output Section Output Low Level VOL VDD=16V, IO=20mA 1 V Output High Level VOH VDD=16V, IO=20mA 8 V Output Clamp Voltage Level V_clamp 16 V Output Rising Time T_r VDD=16V, CL=0.5nF 650 ns Output Falling Time T_f VDD=16V, CL=0.5nF 40 ns On chip OTP Section ℃ Over Temperature protection OTP 160 Note: Freq_Max indicates IC internal maximum clock frequency. In system application, the maximum operation frequency of 60Khz nominal occurs at maximum output power or the transition point from CV to CC. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 6 Ver.a UPSL104A Preliminary CMOS IC OPERATION DESCRIPTION UTC UPSL104A is a primary side regulation off-line LED lighting controller which can achieve accurate LED current. It significantly simplifies LED lighting system design by eliminating the secondary side feedback circuitry. The device integrates PWM controller to enhance the performance of discontinuous conduction mode (DCM) flyback converters. Startup control The VDD pin of UTC UPSL104A is connected to the line input through a resistor. A large value startup resistor can be used to minimize the power loss in application because the start current of UTC UPSL104A is very low. When the VDD voltage reaches VTH (ON), the internal startup circuit is disabled and the IC turns on. Operating Current The Operating current of UTC UPSL104A is as low as 1.6mA. Good efficiency and very low standby power can be achieved. Constant Current Operation When the sampled voltage is below 2.0V reference voltage and the error amplifier output reaches its maximum, thus UTC UPSL104A operates in constant-current (CC) mode. The CC point and maximum output power can be externally adjusted by external current sense resistor Rcs. The larger Rcs, the smaller CC point is, and the smaller output power becomes. Adjustable Output Power By Changing Rcs Large Rcs Vout Small Rcs Iout Secondary Current Waveform Is Ipks Iout Tdemag Tsw UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw t 4 of 6 Ver.a UPSL104A Preliminary CMOS IC OPERATION DESCRIPTION (Cont.) In CC operation, the CC loop control function of UTC UPSL104A will keep a fixed proportion between secondary inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is Tdemag 1 = Tsw 2 (2) 1 NP Tdemag 1 NP × × Ipk × = × × Ipk 2 NS Tsw 4 NS (3) Thus the output current is given by: Iout = Current Sensing and Leading Edge Blanking Cycle-by-cycle current limiting is offered in UTC UPSL104A. The switch current is detected by a sense resistor into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 600ns leading-edge blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer needed. Protection Control Good power supply system reliability is achieved with its comprehensive protection features including VDD over-voltage protection, VDD Clamp, GATE Clamp, Power on soft start, Cycle-by-cycle current limiting, short circuit protection, leading edge blanking, OTP and UVLO, etc. VDD is supplied by transformer auxiliary winding output. The output of UTC UPSL104A is shutdown when VDD drops below VTH (OFF) and the power converter enters power on start-up sequence thereafter. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 Ver.a UPSL104A Preliminary CMOS IC TYPICAL APPLICATION CIRCUIT (16V / 0.35A) BOM Reference BD1 L1 C1 C2 C3 C4 C5 C6 C7 D1 D2 D3 Component BD 1A/600V 3.3m H 1/2W EC 3.3u F 400V 105°C EC 3.3u F 400V 105°C EC 10u F 50V 105°C CC 47n F 50V 0805 CC 2.2n F 1000V 1206 EC 470u F 25V 105°C Low-ESR CC 33p F 50V 0805 Diode UTC 1N4007G Diode UTC 1N4007G Diode UTC MBR2200 Reference R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 Q1 T1 F1 Component R 4.7KΩ 1206 ±5% R 91KΩ 0805 ±1% R 7.5KΩ 0805 ±1% R 1MΩ 1206 ±5% R 1MΩ 1206 ±5% R 100KΩ 1206 ±5% R 1.8Ω 1206 ±5% R 10KΩ 1206 ±5% R 1KΩ 0805 ±1% R 5.1MΩ 1206 ±5% N-MOSFET UTC 1N60 EE-16 FUSE 1A 250VAC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 Ver.a