V05N4 - DECEMBER

LINEAR TECHNOLOGY
DECEMBER 1995
IN THIS ISSUE . . .
COVER ARTICLE
The LT ®1160 and LT1162:
Medium Voltage, N-Channel
Bridge Design Made Easy
........................................ 1
Jaime Tseng
VOLUME V NUMBER 4
The LT1160 and LT1162:
Medium Voltage,
N-Channel Bridge
Design Made Easy
Editor’s Page ................... 2
by Jaime Tseng
Richard Markell
LTC in the News .............. 2
DESIGN FEATURES
The LT1166: Power Output
Stage Automatic Bias
System Control IC ............ 3
Dale Eagar
The LT1186: A Simple
Bits-to-Light Converter for
LCD Displays ................... 6
Anthony Bonte
Power Factor Correction,
Part Four: The Brains
Behind the Brawn ......... 10
Dale Eagar
How Do You Slew 200V/µs
with a 250µA Op Amp?
...................................... 12
George Feliz
DESIGN IDEAS
................................. 17–26
(complete list on page 17)
New Device Cameos ....... 27
Design Tools .................. 28
Sales Offices ................. 28
Introduction
The new LT1160 is a second-generation, half-bridge, N-Channel power
MOSFET driver. The LT1160, which
is derived from the LT1158 half-bridge
driver, has an increased voltage handling capability and a higher output
drive current. The LT1162 is a fullbridge version of the LT1160
Like its predecessor, the LT1160
effectively deals with the many problems and pitfalls encountered in the
design of high efficiency motor-control and switching regulator circuits.
This article will discuss these problems, along with the solutions the
LT1160 offers the bridge designer.
LT1160 Overview
Figure 1 is a block diagram of the
LT1160 (the LT1162 has two circuits
identical to that in Figure 1). New in
the LT1160 are two independent undervoltage-detect circuit blocks that
disable the drivers when either the
supply voltage or the voltage across
the bootstrap capacitor drops below
its undervoltage trip point. Two input
pins control the switching of both
N-channel MOSFETs; both channels
are noninverting drivers. The internal logic prevents both outputs from
turning “ON” simultaneously under
any input condition. When both
inputs are high, both outputs are
actively held low.
Bipolar versus CMOS Drivers
Bipolar technology was chosen for
operation to 60V (absolute maximum)
due to its inherent greater-than-60V
junction-breakdown voltage. This is
particularly important in an N-channel topside driver, which must operate
above the supply rail. In addition,
bipolar technology provides consistent drive capability, resulting in
transition times that increase moderately with large increases in capacitive
load. The LT1160 switches 1,000pF
loads in 75ns, but for 10,000pF loads,
this only increases to 180ns, making
operation to 100kHz possible with
the largest MOSFETs. Figures 2a
shows a simplified schematic of the
LT1160 output stage; Figure 2b shows
how it delivers progressively more
current as the capacitive load increases. On the other hand, CMOS
drivers’ switching times tend to be
fast at light loads but increase rapidly
at higher capacitive loads, as shown
in Figures 3a and 3b.
continued on page 14
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode, Bits-to-Nits and C-Load are trademarks of Linear Technology Corporation.
EDITOR’S PAGE
On Being Analog in Silicon Valley
by Richard Markell
LTC in the News...
Working in Silicon Valley is interesting. The hottest technologies blow
through, virtually overnight. Sometimes the technologies take off, and
sometimes they self-destruct. But we
at LTC need to know what’s coming so
that we can design analog circuitry
that allows the fast-paced digital world
to talk to our linear world. The microprocessor gurus might dispute it, but
the expertise required to optimize the
transient response of a DC/DC converter is nontrivial. The IC designer
must know a multiplicity of disciplines, from transistor-level integrated
circuit simulation to the system-level
ESR requirements of capacitors. We
at LTC pride ourselves on being the
best in the industry at what we do,
whether it’s building applications circuits for customers, designing IC’s or
taking an order in customer service.
The design of ASICs, multimedia and
networks may be hot today, cold tomorrow, but analog will always be
with us. We press on, growing at a
good clip, supplying the analog core
to the world of digital designers. We
are always looking for people who are
in love with analog circuit design.
Our feature article highlights the
LT1160 and LT1162 N-channel
MOSFET half- and full-bridge drivers,
with increased maximum operating
voltage (60V abs. max.) and higher
output drive current. Also new to
these topologies is undervoltage lockout, which disables the drivers when
either the supply voltage or the voltage across the bootstrap capacitor
drops below its trip point. Cross-conduction or “shoot-through” has been
completely eliminated. The LT1160
and LT1162 will see use as motorcontrol circuits, high current,
high-efficiency switching regulators
and other half- and full-bridge driver
circuitry.
2
Another “control” device is the new
LT1186 Bits-to-Light converter for
LCD displays. The LT1186 is a companion part to LTC’s LT1182/
LT1183/LT1184 CCFL/LCD contrast
switching regulator family of devices.
The LT1186 adds simple digital control for CCFL to a fixed frequency,
current mode switching regulator. The
device incorporates a micropower 8bit, 50µA full-scale, current output
DAC that provides the “bits-tolamp-current” control. The device
communicates in two modes: standard SPI and pulse mode.
The LT1352 is a new micropower
operational amplifier that can slew
200V/µs and settle to 0.1% in 700ns
for a 10V step. The LT1352 is stable
with any capacitive load and can drive
heavy loads (≤40mA) with low distortion. These specifications are achieved
without compromising other specifications over the part’s ±2.5V to ±15V
supply range. Another Design Feature spotlights the LT1166, a power
output stage automatic bias system
control IC. The part is designed to
optimize amplifier output stage biasing (and quiescent current) and to
eliminate the need for temperature
tracking, matching transistors or trim
pots. The device allows automatic biasing of an amplifier’s output stage in
the Class AB operational region.
In this issue we present the fourth
and concluding part of the “Power
Factor Correction” series. Also provided with this issue is an index of
circuits presented in the first five
years of the Linear Technology Magazine.
This issue also has the usual selection of Design Ideas, carefully chosen
and tested in our Applications Lab.
Here we have circuits ranging from GTL
terminators to rail-to-rail filters.
Authors can be contacted
at (408) 432-1900
Once again Linear Technology
reports another quarter of record
sales and profits. Net sales
for LTC’s first quarter ending
October 1, 1995 were a record
$87,005,000, an increase of 50%
over net sales of $58,082,000 for
the previous year. The company
also reported record net income
for the quarter of $30,520,000 or
$0.39 per share, an increase of
71% over $17,830,000 or $0.24
per share reported for the first
quarter of the last year.
More good news was reported in
Investor’s Business Daily
September 29th issue, which
featured a corporate profile under
their New America section. Bob
Swanson talked about the continuing need for analog circuitry.
“We cheer the growth of digital, but
when the rubber hits the road, we
live in an analog world and we
don’t see this ever changing.”
In Financial World October 10,
1995 issue Linear Technology
Corporation was included on its
list of “America’s Best 100 Growth
Companies.” LTC was ranked
#22 out of all the companies
considered: #3 for semiconductors and # l for analog!
In the “What’s Hot for Product”
category, Electronic Design
October 13, 1995 issue highlighted the LTC1410 in a feature
article titled “12-Bit IC ADCs
Relieve Error Budgets.” The
LTC1410 is the fastest 12-bit
Successive Approximation (SAR)
based ADC to date. The part uses
a novel design technique to
achieve excellent power and cost
performance. The LTC1410 joins
LTC’s fast growing line of A to D
and D to A products for high
performance applications.
Linear Technology Magazine • December 1995
DESIGN FEATURES
The LT1166: Power Output Stage
Automatic Bias System Control IC
by Dale Eagar
Introduction
Class AB amplifiers are popular
because of their “near Class A” performance and their ability to operate
on considerably less quiescent power
than Class A. Class AB amplifiers are
easy to construct, rugged and reliable. However there is an aspect of
these amplifiers that can cause perplexity, consternation and finally hair
loss—their bias scheme. The problem
is that the very parameter that makes
Class AB so good, namely low quiescent current, is poorly controlled. The
LT1166 offers control over the quiescent current directly, removing the
necessity of temperature tracking,
matching transistors or trim pots.
Functional Description
The LT1166 (Figure 1) controls the
Class AB output stage by incorporating two control loops, the
current-control loop and the voltagecontrol loop. The current-control loop
(Figure 2) operates independently of
the voltage loop while keeping the
V+
>4mA
Q1
GATE
ISENSE
R1
LT1166
INPUT
IN
V+
V3 IS ADJUSTED
SO THAT
V1
V1 * V2 = 0.0004
V3
V2
WHEN THE OUTPUT
CURRENT IS ZERO
V1 = V2 = 20mV
1166_2.eps
V–
Figure 2. LT1166 Current-control loop
product of V1 and V2 constant. The
voltage loop (Figure 3) maintains the
output voltage at the input voltage
level by driving both gates up or down.
The two loops, although mutually independent, act in harmony to provide
a component insensitive, temperature insensitive, simple Class AB bias
network.
Crossover Distortion
Adjusting the bias point of a Class
AB amplifier is quite like walking a
tight rope. Quiescent current needs
to be set precisely; if it is adjusted too
low, the amplifier exhibits crossover
distortion, whereas if it is adjusted
too high, the amplifier becomes a very
effective heater. Setting the bias of a
Class AB amplifier is often reserved
for the “Medicine Man,” an individual
with both the smarts to know how to
V1
OUT
set bias and the nerves to take the
catastrophic results of misalignment.
The LT1166 removes all excess crossover distortion caused by improperly
set quiescent current, while significantly reducing the distortion caused
by the effects of nonlinear transconductance in the output transistors.
Figure 4 shows how the magic point
for a Class AB amplifier is visualized
(keep in mind that the magic point is
temperature sensitive in many designs, leading the designer to
temperature tracking tricks, which
are not needed with the LT1166.)
Makes Random
Transistor Pairs into
Parallelable Modules
The LT1166, combined with
external transistors, implements a
unity-gain buffer with an offset voltage of ±50mV. This buffer in turn
becomes a component that can easily
be paralleled to increase the output
power (see Figure 5).
Terra Firma!
California, a place where the
ground is anything but stable, is now
the birthplace of “The Rock,” a virtual
ground with an attitude. The Rock
(detailed in Figure 6) is a 5V, ±0.4%
MAGICAL
OPERATING
POINT
CROSSOVER
DISTORTION
QUIESCENT
POWER
OUTPUT
R2
0
V2
ISENSE
V3
+
2
0
1166_4.eps
V1
OUT
GATE
–
V3
2
BIAS
Figure 4. “Magical” operating point of
Class AB amplifier
LT1166
V2
Q2
IN
LT1166
OUTPUT
>4mA
V–
1166_1.eps
1166_3.eps
Figure 1. Basic LT1166 circuit configuration
Linear Technology Magazine • December 1995
Figure 3. LT1166 Voltage-control loop
1166_5.eps
Figure 5. LT1166’s can be easily paralleled
3
DESIGN FEATURES
12V
12V
R3
100Ω
12V
R1
1k
4
7
8
3
R2
2k
2
U2
LT1166
IN
TOP
DRIVE
1
TOP
SENSE
8
TOP
ILIM
7
OUT
1
Q1
IRFZ34
100Ω
R4
1k
3
BOTTOM
ILIM
6
BOTTOM
SENSE
5
BOTTOM
DRIVE
4
C1
1µF
R5
1Ω
2W
C2
1µF
R6
1Ω
2W
R7
1k
5V
OUT
+
C3
270µF
5k
U1
LT1431
5k
2.5V
100Ω
Q2
IRF9Z30
R8
100Ω
5
6
1166_6.eps
Figure 6. “The Rock,” a 5V, ±0.4% tolerance, ±1A low noise voltage source
low noise virtual ground. The Rock
will source or sink 1A of current with
ease. In this circuit, the current limits
are set to 1.5A for both sourcing and
sinking currents. Changing the values of R5 and R6 to 0.33Ω increases
the output current by a factor of
15VA*
12.5VA*
100Ω
100V
2N3906
100Ω
IRF230
1
GATE
SENSE
ILIM
8
9
IN
OUT
2
ILIM
1µF
0.22
1µF
OUT
300W
RMS
INTO
16Ω
0.22
SENSE
GATE
4
3
6
In the event that you don’t live in
California, you might need the circuit
shown in Figures 7a–7c, the 1.8kW
shaker-table driver/audio amplifier.
In Figure 7a, we develop a slice of
power by connecting the LT1166 to
two power MOSFETs, two current
sense resistors and two current
POWER SLICES OF FIG. 7A
0.22
0.22
1k
9.1k
1k
5
3
100Ω
2
IRF9240
2N3904
INPUT
±10Vp-p
–100V
100Ω
–12.5VA*
Shaker-Table Driver/
Brute Audio Amplifier
sources. The power slice shown in
Figure 7a will deliver 300W of sine
wave power into 16Ω when powered
from ±100VDC. The MOSFETs and/
or the sense resistors can be increased
or decreased to get output power in
almost any flavor.
Figure 7b details how six power
slices can be paralleled to put out a
cool, clean 1800W of Richter or 1250W
of rock and roll. The LT1360 amplifier
operates in the extended supply mode
(see “Extending Op Amp Supplies to
Get More Output Voltage,” Linear
Technology, IV:2, pp. 20–22).
1k
LT1166
7.5k
three. This circuit, properly built, will
easily withstand an earthquake of
magnitude 8, with unmeasurable
output deviation.
10k
0.22
+
OUTPUT
6
U1
LT1360
0.22
–
1800W RMS
INTO 2.6Ω
1k
0.22
EXTENDED POWER
SUPPLY AV = 10
VOLTAGE AMP
–15VA*
1250W RMS
INTO 4Ω
625W RMS
INTO 8Ω
CURRENT LIMIT ± 6.8A
*FROM FIG. 7c
TO
FIG. 7c
0.22
1166_7B.eps
1166_7a.eps
Figure 7a. ±100V, 6A “power slice”
4
Figure 7b. Paralleling power slices to increase output drive
Linear Technology Magazine • December 1995
DESIGN FEATURES
Conclusion
Finally, Figure 7c shows how to
connect the ±15V floating supply and
also details the PSRR snubber for the
LT1360 (R1, R2, R3 and C2).
in Figures 7a, 8a and 8b. This circuit
starts at 300W (or less if you use
smaller FETs and bigger resistors in
Figure 7a) and can be stacked up to
any desired power level. With this
circuit, you could easily build a ringer
capable of ringing the phones of every
U.S. politician simultaneously (not
that this would do any good).
Ring-Tone Generation
Building upon an earlier Linear
Technology Magazine article (see
above) we show a power ring-tone
generator. This generator is detailed
15VA*
With the advent of the LT1166,
biasing Class AB amplifiers becomes
trivial. Dependencies on temperature
tracking, component matching and
alignment pots have succumbed to
cool, clean, closed-loop control of
operating points. Suddenly, MOSFETs
look a lot friendlier to the power amplifier designer. Suddenly, pots have
bitten the dust.
15VA
R1
390Ω
1k
LT1004
– 2.5
LT1004
– 2.5
15V
7
12.5VA
12.5VA*
OUTPUT
OF FIG. 7B
C1
0.1µF
1k
U1 OF FIG. 7B
LT1360
8
LT1004
– 2.5
LT1078
0.1µF
R2
390Ω
– 15VA*
FROM
FIGURE 8a
4
LT1004
– 2.5
7.5k
2.5VA
– 12.5VA*
15V
15V
LT1004
– 2.5
R3
1k
7.5k
C2
3300pF
*TO FIG. 7A
4
– 2.5VA
–12.5VA
15V
1166_7c.eps
LT1004
– 2.5
Figure 7c. Connection diagram for the ±15V floating supply
1k
3.3k
–15VA
0.1
100V
1166_8B.eps
0.33µF
Figure 8b. Power supply circuitry for
Figure 8a
POWER SLICES
OF FIGURE 7a
6
11k
10k
10k
360k
5
0.22
–
+
TO FIG. 8b
7
LT1078
0.22
RING-TONE
OUTPUT
300W/SLICE
0.01µF
2.5VA*
4
R
8
VCC
TRIM R.
POTENTIOMETER
0.01µF
6
CMOS 555
OUT
2
360k
51k
3
0.047
51k
3
+
20Hz
VSS
1
0.15µF
LT1078
2
1
–
–2.5VA*
1166_8A.eps
*TO FIG. 7c
1166_9.eps
Figure 8a. Ring-tone generator schematic diagram
Linear Technology Magazine • December 1995
Figure 9. Trim pots are no longer required
5
DESIGN FEATURES
The LT1186: A Simple Bits-to-Light
Converter for LCD Displays by Anthony Bonte
Introduction
New LTC CCFL Part
Many current-generation portable
and handheld instruments use backlit liquid crystal displays (LCDs).
Cold-cathode fluorescent lamps
(CCFLs) provide the highest available
efficiency for backlighting the display. These lamps require high voltage
AC to operate, mandating an efficient
high voltage DC/AC converter. In addition to good efficiency, the converter
should deliver the lamp drive in the
form of a sine wave. The sine wave
excitation helps to minimize RF emissions and also provides optimal
current-to-light conversion in the
lamp. The circuit should also permit
lamp intensity control from zero to
full brightness with no hysteresis or
“pop-on.”
Manufacturers offer an array of
monochrome and color displays.
These displays vary in size, operating
lamp current, lamp-voltage range and
power consumption. The small size
and battery-powered operation associated with LCD-equipped apparatus
UP TO 6mA
D1
BAT85
1
2
3
C7, 1µF
4
5
FROM MPU
FROM MPU
L1 = COILTRONICS CTX210605
LAMP
10
SHUTDOWN
The LT1186 is a fixed frequency,
current mode switching regulator that
provides a simple digital control function for cold-cathode fluorescent
lighting. The regulator is a companion part to Linear Technology’s
LT1182/LT1183/LT1184 CCFL/LCD
contrast switching regulator family.
The LT1186 supports grounded-lamp
and floating-lamp configurations. The
IC includes an efficient high current
switch, an oscillator, outputdrive logic, control circuitry and a
micropower 8-bit 50µA full-scale current output DAC.
The DAC provides simple
“bits-to-lamp-current control” and
communicates in two interface modes:
standard SPI mode and pulse mode.
On power-up, the DAC counter resets
to half-scale and the DAC configures
itself to SPI or pulse mode, depending
on the CS (chip select) signal level. In
SPI mode, the system microprocessor
serially transfers the present 8-bit
data and reads back the previous
dictate low component count and high
efficiency. Size constraints place limitations on circuit architecture, and
long battery life is a priority. All components, including pc board and
hardware, usually must fit within the
LCD enclosure, with a height restriction of 5mm–10mm.
Handheld instruments are generally characterized by dedicated
functionality and reduced processing
power in comparison with notebook
or laptop computers. These portable
systems often use general-purpose,
low cost microcontrollers such as the
Intel 80C51 or Motorola 68HC11.
These microcontrollers are popular
because of their versatile I/O capability. A simple interface that allows the
microcontroller to easily control the
operating lamp current and display
brightness is required. To address
the requirements of these portable
instruments, Linear Technology
introduces the LT1186 DAC programmable CCFL switching regulator.
6
7
8
CCFL
PGND
CCFL VSW
ICCFL
BULB
DIO
BAT
LT1186
CCFL VC
ROYER
AGND
VCC
SHDN
IOUT
CLK
DOUT
CS
DIN
16
C2
27pF
3kV
6
L2 = COILTRONICS CTX100-4
*DO NOT SUBSTITUTE COMPONENTS
C5
1000pF
L1
3
15
2
+
14
R2
220k
1
4
5
+
C3B
2.2µF
35V
13
12
11
10
9
+
VIN
3.3V
C4 OR 5V
2.2µF
Q2*
C3A
2.2µF
35V
BAT
8V TO 28V
R1
750Ω
C1*
0.068µF
R3
100k
COILTRONICS (407) 241-7876
Q1*
TO MPU
FROM MPU
ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3A AND C3B.
MAKE C3B ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1186 HIGH-SIDE
SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON
0µA TO 50µA ICCFL CURRENT GIVES
C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20
0mA TO 6mA LAMP CURRENT
Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001
FOR A TYPICAL DISPLAY.
L2
100µH
D1
1N5818
FOR ADDITIONAL CCFL/LCD CONTRAST APPLICATION CIRCUITS,
REFER TO THE LT1182/83/84/84F DATA SHEET
1186_1.eps
Figure 1. Up to 90% efficient floating CCFL with SPI control of lamp current
6
Linear Technology Magazine • December 1995
DESIGN FEATURES
8-bit data from the DAC. In pulse
mode, the upper six bits of the DAC
are configured for increment-only
(1-wire interface) or increment/decrement (2-wire interface) operation,
depending on the DIN signal level.
The LT1186 control circuitry operates from a logic supply voltage of
3.3V or 5V. The IC also has a battery
supply voltage pin that operates from
4.5V to 30V. The LT1186 draws 6mA
typical quiescent current. An active
low shutdown pin reduces total supply current to 35µA for standby
operation and the DAC retains its last
setting. A 200kHz switching frequency
minimizes magnetic component size,
and the use of current mode switching techniques gives high reliability
and simple loop frequency compensation. The LT1186 is available in a
16-pin, narrow-body SO.
Typical Application
Figure 1 is a complete floating CCFL
circuit using the LT1186 in standard
SPI mode to control operating lamp
current from a microprocessor. A
floating-lamp circuit allows the
transformer to provide symmetric, differential drive to the lamp. Balanced
drive eliminates the field imbalance
associated with parasitic lamp-toframe capacitance and reduces
“thermometering” (uneven lamp intensity along the lamp length) at low
lamp currents.
Q1, Q2, L1 and C1 form the core of
a current-fed, Royer-class converter.
The LT1186 power switch and L2
create a switch-mode current source
to drive the Royer. The 200kHz switching frequency allows the use of only
100µH for L2. Base drive for Q1 and
Q2 is provided by L1’s tickler winding
and R1. R1 is selected to guarantee
sufficient base drive with minimum
betas for Q1 and Q2. R2, R3 and C5
comprise an external divider network
for the open-lamp protection circuit.
The divider monitors the voltage
across the Royer converter and compares it with an internal 7V clamp
voltage between the BAT and BULB
pins. Monitoring the primary-side
converter current through a highside sense resistor and amplifier,
Linear Technology Magazine • December 1995
connected between the BAT and Royer
pins, provides feedback, and a single
capacitor (C7) on the VC pin provides
stable loop compensation.
Lamp current is programmed by
driving the ICCFL pin from the IOUT pin.
The transfer function between lamp
current and input programming current must be empirically determined
and is dependent on a myriad of factors, including lamp characteristics,
display construction, transformer
turns ratio and the tuning of the
Royer oscillator. The LT1186 control
circuitry is powered by either a 3.3V
or 5V logic supply, and the input
battery voltage range for this example
is 8V to 28V. Lower input battery
voltage operation is accomplished by
increasing the turns ratio of transformer L1 and retuning the Royer by
tweaking the values of C1 and C2.
Electrical efficiency with typical CCFL
lamps ranges between 80%–90% at
full load with lamp current being variable from 200µA to 6mA for a typical
display. The component values chosen are an interactive compromise
in maximizing photometric output
versus input power.
Figure 2 is a block diagram for an
Intel 80C31 microcontroller-based
evaluation setup for the LT1186. The
lamp current is controlled by a general PC keyboard interface. The user
inputs a number between 0 and 255
to set a new input programming current, and therefore, a new lamp
current level. The previous code is
returned to the user to verify the last
programmed current level. An input
of one corresponds to 1 LSB of DAC
output current (195.3nA) and an input of 255 corresponds to the full-scale
DAC output current of 50µA.
Listings 1 and 2 on pages 8–9 are
the complete C and assembly language
code that controls the evaluation setup
of Figure 2. My thanks and appreciation go to Tommy Wu at Linear
Technology for developing this software. Any questions or comments
regarding the software should be addressed to Tommy, in care of this
publication. The software is fairly generic and is easily adaptable to other
microcontrollers or microprocessors.
Conclusion
The LT1186 is a novel Bitsto-Nits TM* converter for driving
cold-cathode fluorescent lamps in
handheld or portable instruments
with LCD displays. Lamp current is
digitally programmed in either of two
interface modes: standard SPI mode
and pulse mode, which provides
simple push-button up/down control. The LT1186 represents another
step in Linear Technology’s commitment to providing efficient, compact
and economical backlight solutions.
Note:
* Bits-to-Nits is a trademark of Linear Technology
Corporation. 1 Nit = 1 Candela/meter 2. Nit is
derived from the Latin word nitere meaning “to
shine.”
LAMP
ROYER
CONVERTER
8
5
7
CLK
LT1186
9
DIN
4
CS
DOUT
10
1
2
A0-A15
P1.4
P1.3
D0-D7
P1.0
ROM
P1.1
80C31
RS232
FROM PC
TX
31
RX
1186_2.eps
Figure 2. LT1186 Floating CCFL system using an Intel 80C31 microcontroller
7
DESIGN FEATURES
C and Assembly Language Program Code for LT1186 Evaluation
The LT1186.C program demonstrates the use of the LT1186
DAC programmable CCFL switching regulator.
The example circuit uses
the popular 80C51 family of
microcontrollers to interface between
the user and the LT1186.
The LT1186 DAC algorithm is
written in assembly language,
and is contained in a file named
LT1186A.ASM; it is called as a function from the MAIN function of
LT1186.C. The user inputs an integer
from 0 to 255 on a keyboard and the
LT1186 adjusts the IOUT programming
current to control the operating lamp
current and the brightness of the
LCD display. The assembly language
program, LT1186A.ASM, receives
the DIN word from the main C program function, lt1186( ). Assembly
to C interface headers, declarations
and memory allocations are listed
before the actual assembly code.
Listing 1. LT1186.C
#include <stdio.h>
#include <reg51.h>
#include <absacc.h>
extern char lt1186(char); /* external assembly function in lt1186a.asm */
sbit Clock = 0x93;
main()
{
int number=0;
int LstCode;
Clock = 0;
TMOD = 0x20;
TH1 = 0xE8;
SCON = 0x52;
TCON = 0x69;
/* Establish serial communication 1200 baud */
while(1) /* Endless loop */
{
printf(“\nEnter any code from 0 - 255: “);
scanf(“%d”,&number);
if((0>number)|(number>255))
{
number = 0;
printf(“The number exceeds its range. Try again!”);
}
else
{
LstCode = lt1186(number);
printf(“Previous # %u”, (LstCode&0xFF)); /* AND the previous
number with 0xFF to turn off sign extension */
}
number = 0;
/* Reinitialize number */
}
}
8
Linear Technology Magazine • December 1995
DESIGN FEATURES
Listing 2. LT1186A.ASM
; Port p1.4 = CS
; Port p1.3 = CLK
; Port p1.1 = Dout
; Port p1.0 = Din
;
NAME LT1186_CCFL
PUBLIC lt1186, ?lt1186?BYTE
?PR?ADC_INTERFACE?LT1186_CCFLSEGMENT CODE
?DT?ADC_INTERFACE?LT1186_CCFLSEGMENT DATA
RSEG ?DT?ADC_INTERFACE?LT1186_CCFL
?lt1186?BYTE: DS 2
RSEG ?PR?ADC_INTERFACE?LT1186_CCFL
CS
CLK
DOUT
DIN
EQU
EQU
EQU
EQU
p1.4
p1.3
p1.1
P1.0
lt1186: setb CS
mov r7, ?lt1186?BYTE
mov p1, #01h
clr CS
mov a, r7
mov r4, #08h
clr c
rlc a
loop:
mov DIN, c
setb CLK
mov c, DOUT
rlc a
clr CLK
djnz r4, loop
mov r7, a
setb CS
ret
END
;set CS high to initialize the LT1186
;move input number(Din) from keyboard to R7
;setup port p1.0 becomes input
;CS goes low, enable the DAC
;move the Din to accumulator
;load counter 8 counts
;clear carry before rotating
;rotate left Din bit(MSB) into carry
;move carry bit to Din port
;Clk goes high for LT1186 to latch Din bit
;read Dout bit into carry
;rotate left Dout bit into accumulator
;clear Clk to shift the next Dout bit
;next data bit loop
;move previous code to R7 as character return
;bring CS high to disable DAC
;NOTE: When CS goes low, the MSB of the previous code appears at Dout
Linear Technology Magazine • December 1995
9
DESIGN FEATURES
Power Factor Correction, Part Four:
The Brains Behind the Brawn by Dale Eagar
The Control Room
In the three previously published
parts of our series on power factor
correction, we investigated the
workings of the “power transfer
mechanism” as used in the ever so
popular “boost-mode power factor
correction conditioner.” This power
transfer mechanism is shown in Figure 1 as the “engine room.” Also shown
is the “control room,” where the decisions are made and actions taken to
make the PFC power conditioner behave like a resistor (the ultimate
disguise for a switching power supply). Having had a brief tour of the
engine room in an earlier article,
we can summarize its workings in a
few rules:
1. The amount of power intercepted
from the input line is related to
the duty factor of the boost
engine.
2. When the duty factor is at 0%, no
power is intercepted from the
input line.
3. Under all conditions, increasing
the duty factor will increase the
amount of power intercepted
from the input line.
4. The boost engine is essentially
lossless, so all power intercepted
from the input line ends up in
the load.
5. The load voltage is to be held
constant.
6. The load voltage shall be set
above the peak input voltage,
where the peak input voltage is
1.414 times the maximum RMS
input power-line voltage; this is
where the power factor is to be
corrected.
If the peak input voltage exceeds
the output voltage at any time, the
output diode (internal to the boost
engine) takes it upon itself to forward
conduct, transferring power from the
input to the output without any
10
authorization from the control room.
Pure Insubordination! The only way
to prevent this disgraceful act by
the output diode is to keep the output voltage out of reach of the peak
input voltage.
At the Console
In the control room is a control
console, a panel with meters and a
duty factor control. Sitting in the control seat is the controller, an intelligent
entity. The controller is given the task
of watching the three meters (Figure
1) and controlling the duty factor to
keep things in check.
The controller is given two tasks to
perform, namely:
1. Make the input look resistive.
2. Keep the output voltage constant
at 386V, regardless of the load
current or input line voltage.
Careful inspection of the above two
tasks may surprise you. Let’s look at
each task separately.
Task One: Making the
Input Look Resistive
It would not be too difficult to teach
the controller to make the input look
resistive. One would need to teach the
controller to watch the input volts
and amps while adjusting the duty
factor. The duty factor is constantly
adjusted to make the input amps
equal to some constant (K) times the
input volts. Presto resistor! Looking
into the input terminals, one would
see a pure resistor. The input would
look resistive at a value of ZIN = 1/K.
This impedance would be fairly constant for frequencies from DC to the
fastest frequency at which the controller could accurately keep up with
things. In the real world there is this
guy named Nyquist who says, among
other things, that the controller would
make serious blunders if he were to
try to control the duty factor faster
than 1/2 of the switching frequency.
With the switching frequency set to
somewhere around 100kHz, the input looks resistive from DC to many
kiloHertz, which is good enough for
the 60Hz line and many of its nasty
harmonics.
Careful inspection of the output
would reveal an output impedance of
VOUT2/K, a big number. The whole
system would look like a constant
power source, with the power level set
to K times VIN2. These observations
are entered in the first row of Table 1.
CONTROL ROOM
30
40 50 60
70
80
90
100
20
10
0
AC
POWER
LINE
0
0
INPUT
VOLTS
INPUT
AMPS
EMI
FILTER
~
~
AC
BRIDGE
0
DUTY
FACTOR
+
–
BOOST
ENGINE
OUTPUT
VOLTS
LOAD
POWER PATH (ENGINE ROOM)
pfc4_1.eps
Figure 1. Boost PFC block diagram
Linear Technology Magazine • December 1995
DESIGN FEATURES
Task-2: Keeping the Output
Voltage Constant at 386V
Looking at task-2 in the absence of
any task-1 constraints, we teach our
controller to adjust the duty factor to
keep the output voltage constant, regardless of the load current or input
line voltage. Having visualized such a
system, we can look at its characteristics. Looking into the input port at
any constant load current, we see a
negative input impedance. (As the
input line voltage goes up, the input
current goes down.) Looking into the
output port we see an impedance of
zero. (Any finite increase in output
current causes no change in output
voltage.) Finally, looking at the power
intercepted from the input line we
have a constant at V OUT × I OUT
regardless of input voltage. These observations occupy row two of Table 1.
Putting Them Together
It should be apparent that no device can exhibit positive impedance
and negative impedance at the same
time. However, we know how to
cheat—we take the reciprocal of time
to get frequency.
This trick doesn’t need smoke and
mirrors, unless, of course, you hook
it up wrong, in which case you get
seven years of bad luck. This is a trick
in the frequency domain.
The first step is to loosen up the
output specification a little. We can
see that the power delivered from a
sine wave into a resistive load is anything but constant (see Figure 2). We
VOLTS
WATTS
AMPS
INPUT
POWER
INPUT
VOLTS
AND
AMPS
TIME
Figure 2. Input power waveform
Linear Technology Magazine • December 1995
Table 1. Task-1 and task-2 characteristics
Task
Input
impedance
Make Input
Resistive
1/K
Constant VOUT Negative
Output
impedance
Power
transferred
V2OUT/K
Zero
K VIN
VOUT × IOUT
would have to have an infinitely large
output capacitor to realize zero output ripple when there is input ripple
current. Infinite capacitors went out
of vogue back in the Cretaceous era.
First we loosen up the output voltage
specification to allow a few volts of
ripple, bringing the output capacitor
down to a realistic size. Second, we
further loosen the output specification to allow the output voltage to
swing tens of volts during heavy load
steps.
We do this by teaching the controller
to keep the output voltage at 386V
when averaged over any 3-second
interval. This is in effect telling the
controller to make the input impedance negative for frequencies from DC
up to several Hertz. We are instructing
the controller to adjust the K value in
the task-1 operation slowly to keep the
output voltage at an average of 386V.
See Figure 3 for the input impedance
versus frequency characteristics.
Summary/Hindsight
Power factor correction is incorporated into a product design for one of
several reasons:
A. Government standards, such as
IEC555, compliance with which
is required to sell product in
several worldwide markets.
B. The marketing boys upstairs feel
that they can sell it as a feature.
C. Management needs to keep the
power supply design group out of
trouble until the next major
design.
The boost converter is the best way
to perform PFC at any power greater
than 50W. The crowning advantage of
the boost topology is its continuous
input current when running in the
continuous mode. The loss of
continuity of input current in the
discontinuous mode is unimportant,
as discontinuous mode only happens
at low input currents where input
ripple is less critical.
The boost converter PFC provides
no isolation from the line, has high
inrush current, has a very high output voltage, has 120Hz ripple on the
output and exhibits slow load-step
response. All of these difficulties of
the boost converter are small compared to the problems in the design of
an input EMI filter if other technologies were used.
Isolation, hold-up time and regulation are performed by the switching
power supply that follows the PFC
conditioner. Inrush protection is provided by a negative tempco thermistor
or other external circuitry.
It is advantageous to synchronize
the PFC conditioner and the following
switching power supply 180 degrees
out of phase to reduce the ripple
current on the output capacitor and
reduce overall system noise. The Linear Technology PFC family of parts all
have synchronizing ability, and the
LT1508 and LT1509 controllers have
both a PFC conditioner and a switching power converter on one chip, fully
synchronized at 180 degrees.
The input impedance of a functioning PFC will be negative from DC to
about 10Hz; from there the impedance goes reactive, then to positive
resistance at frequencies above 10Hz.
The output impedance of the PFC
conditioner is near zero ohms from
DC to about 10Hz; above 10Hz the
output impedance looks like a variable resistor in parallel with the output
capacitor’s reactance.
continued on page 25
POSITIVE
RIN
0
NEGATIVE
10Hz
NOTE: WHEN THE
INPUT RESISTANCE
IS AT ZERO OHMS
THE INPUT STILL
HAS IMPEDANCE
BECAUSE AT THAT
POINT THE INPUT
LOOKS REACTIVE.
FREQUENCY
0
pfc4_3.eps
Figure 3. Input impedance (resistive
component) versus frequency
11
DESIGN FEATURES
How Do You Slew 200V/µs
with a 250µA Op Amp?
How We Did It
The LT1354/LT1365 family of low
power, high-slew-rate op amps
changed the relationship between slew
rate and supply current found in traditional voltage-feedback operational
amplifiers. These parts slew from
400V/µs with 1mA supply current up
to 1,000V/µs with 6mA supply current. The LT1352 dual op amp is a
precocious new sibling that extracts
200V/µs from a mere 250µA of supply
current (see Figure 1).
The new design shares the family
circuit topology, but adds a frugal
output stage that enthusiastically
drives heavy loads with up to 40mA of
current. A primary benefit, unheard
of with other low power op amps, is
the ability to drive large signals into
heavy loads with low distortion. A plot
of distortion for 20V peak-to-peak
signals with a 1kΩ load is shown in
Figure 2. Table 1 shows that this
remarkable output performance is
achieved without compromising other
specifications over its 2.5V to 15V
supply voltage range. The settling time
for a 10V step is only 700ns for 0.1%
and 1250ns for 0.01%. In addition to
performance, the LT1352 is a userfriendly C-Load op amp, which is
stable with any capacitive load.
A simplified schematic of the circuit is shown in Figure 3. The circuit
looks similar to a current-feedback
amplifier, but both inputs are high
impedance, as in a traditional voltagefeedback amplifier. A complementary
cascade of emitter followers (Q1–Q4)
buffers the noninverting input and
drives one side of resistor R1. The
other side of the resistor is driven by
Q5–Q8, which form a buffer for the
inverting input. The input voltage
appears across the resistor, generating currents in Q3 and Q4, which are
mirrored by Q9–Q11 and Q13–Q15
into the high impedance node. Transistors Q17–Q24 form the output
stage. Bandwidth is set by R1, the
gm’s of Q3, Q4, Q7 and Q8, and the
compensation capacitor CT.
The current available to slew CT is
proportional to the voltage that appears across R1. This method of “slew
boost” achieves low distortion due to
its inherent linearity with input step
size. Since large slew currents can be
generated without increasing quiescent current, CT can be increased and
R1 can be decreased. Lowering R1
reduces the input noise voltage to
14nV/√Hz and helps reduce input
offset voltage and drift.
The output stage buffers the high
impedance node from the load by
providing current gain. The LT1352
and its relatives are single-gain-stage
amplifiers in order to remain stable
with capacitive loading and to achieve
their high slew rate with low quiescent supply current. The simplest
output stage would be two pairs of
complementary emitter-followers,
which would provide a current gain of
BetaNPN × BetaPNP. Unfortunately, this
gain is insufficient for driving even a
2kΩ load when running at the low
current levels of the LT1352. Adding
another emitter-follower can reduce
Figure 1. Large-signal response, Av = −1
12
output swing and/or create instability with a capacitive load.
The solution used on the LT1352
was to create a pair of composite
transistors formed by transistors
Q19–Q21 and Q22–Q24. The current
mirrors attached to the collectors of
emitter followers Q19 and Q22 provide additional current gain. The ratio
of transistor geometries Q20 to Q21
and Q23 to Q24, and resistor ratios
R2 to R3 and R4 to R5 set the gain to
five at low currents and to a maximum of 23 at high currents. The
variation in gain is required in order
to have low quiescent current yet be
able to provide output drive on demand. There is no output-swing loss
with this output stage, as the swing is
limited at the high impedance node.
The dynamics of a composite are not
as benign as an emitter follower, so
compensation is required and is provided by R6, C1 and R7, C2.
The C-Load stability is provided by
the RC, CC network between the output stage and the high impedance
node. When the amplifier is driving a
light or moderate load the output can
follow the high impedance node and
the network is bootstrapped and has
no effect. When driving a heavy load
such as a big capacitor or small-value
0.1
0.010
THD+N (%)
Introduction
by George Feliz
AV = 1
0.001
AV = –1
0.0001
100
1K
FREQUENCY (Hz)
10K 20K
Figure 2. THD + noise, 20VP–P, RL =1352_2.eps
1kΩ
Linear Technology Magazine • December 1995
DESIGN FEATURES
V+
R2
Q11
Q10
Q21
C1 Q20
R6
Q9
Q7
–IN
Q5
R1
1k
Q17
Q2
Q8
Q19
Q3
Q6
Q1
R3
Q12
RC
CC
OUT
+IN
Q18
R7
Q4
Q13
C2
Q22
CT
Q23
Q15
Q14
Q24
Q16
R4
V
R5
–
1352_3.eps
Figure 3. LT1352 simplified schematic
resistor, the network is incompletely
bootstrapped and adds to the compensation at the high impedance node.
The added capacitance provided by
CC slows down the amplifier and the
zero created by RC adds phase margin,
ensuring stability. The small-signal
response with a 500pF load is shown
in Figure 4 and the large-signal response with 10,000pF is shown in
Figure 5. Note that the slew rate in
Figure 5 is limited to 4V/µs by the
short-circuit current limit of 40mA.
Table 1. Important specifications for the LT1352 at 25°C
Parameter
Conditions
Minimum
VS = 5V, ±15V
VS = ±2.5V
IB
VS = ±2.5V to ±15V
IOS
VS = ±2.5V to ±15V
AVOL
VS = ±15V, 1kΩ
VS = ±5V, 1kΩ
VS = ±2.5V, 5kΩ
GBW
VS = ±15V
VS = ±5V
VS = ±2.5V
SR
VS = ±15V
VS = ±5V
tSETTLE
10V step, 0.1%
10V step, 0.01%
CMRR
Vs = ±15V
VS = ±5V
VS = ±2.5V
PSRR
VS = ±2.5V to ±15V
Noise voltage VS = ±2.5V to ±15V,10kHz
Noise current VS = ±2.5V to ±15V,10kHz
Output Swing
VS = ±15V, 1kΩ
VS = ±5V, 500Ω
VS = ±2.5V, 2kΩ
ISUPPLY
VS = ±15V
VS = ±5V
VOS
Linear Technology Magazine • December 1995
20
20
20
2.2
2.0
125
40
80
78
68
90
12.0
3.1
1.3
Typical
Maximum
Units
300
400
20
5
60
60
60
3
2.7
2.5
200
50
700
1250
97
84
75
106
14
0.5
13.0
3.5
1.7
250
220
600
800
50
15
µV
µV
nA
nA
V/mV
V/mV
V/mV
MHz
MHz
MHz
V/µs
V/µs
ns
ns
dB
dB
dB
dB
nV/√Hz
pA/√Hz
V
V
V
µA
µA
325
290
Conclusion
The LT1352 is a dual op amp with
an unmatched combination of low
supply current, large-signal performance, stability and DC precision. If
a figure of merit equal to the slew rate
divided by supply current is calculated, the LT1352 stands alone among
voltage-feedback op amps with
800V/µs-mA.
Figure 4. Small-signal step response, Av = −1,
C L = 500 pF
Figure 5. Large-signal step response, Av = 1,
CL = 10,000 pF
13
DESIGN FEATURES
V+
V+
BOOST
BOTTOM
UVLOCK
CBOOTSTRAP
TOP
UVLOCK
HV
TOP
GATE
DR
DRIVE
IN TOP
DC-100kHz
FEEDBACK
–
+
CONTROL
LOGIC
IN BOTTOM
DC-100kHz
SOURCE
BOTTOM
GATE
DR
UV OUT
TO
LOAD
DRIVE
FEEDBACK
–
+
1160_1.eps
Figure 1. LT1160 block diagram with pins shown in actual package sequence
LT1160, continued from page 1
The first problem designers face in
N-channel half-bridge circuits is developing the topside gate drive, which
must swing at least 10V above the
supply rail for standard MOSFETs.
This challenge alone is so demanding
that designers often resort to more
expensive and less efficient P-channel MOSFETs on the topside in low
voltage bridge circuits. However, even
this solution is no longer straightforward when the supply voltage
exceeds the maximum gate-to-source
voltage (VGS) rating for the MOSFET
(typically 20V).
The best solution to this problem is
to use a floating topside N-channel
gate driver operating from a bootstrap capacitor. Although widely used,
the technique of bootstrapping must
be carefully implemented, since
the gate voltage applied to the top
MOSFET derives directly from the
voltage on the bootstrap capacitor. If
this voltage becomes too low, it can
cause problems for the MOSFET. For
example, if at high duty cycles the
output is not swinging low enough to
fully recharge the capacitor, the
topside gate drive will be starved,
leading to overdissipation.
15V
9000pF
1000pF
1000pF
VOUT
Life Above the Supply Rail
9000pF
0V
0
200
400
600
800
1000
SWITCHING TIME (ns)
1200
1400
1600
1.2A
9000pF
IOUT
VOUT
IOUT
1000pF
0A
1000pF
+
9000pF
CLOAD =
1000 - 9000pF
–1.2A
0
1160_2.eps
Figure 2a. Bipolar driver topology
14
200
400
600
800
1000
SWITCHING TIME (ns)
1200
1400
1600
1160_2b.eps
Figure 2b. Bipolar driver switching time increases only 150ns for an increase of 8,000pF in
load capacitance
Linear Technology Magazine • December 1995
DESIGN FEATURES
15V
VOUT
IOUT
CLOAD =
1000 - 9000pF
+
9000pF
VOUT
VIN
9000pF
1000pF
1000pF
1160_3a.eps
Figure 3a. CMOS driver topology
Shoot-Through Unwelcome
Probably the most frustrating element to address in a synchronous
0V
0
200
400
600
800
1000
SWITCHING TIME (ns)
1000pF
9000pF
–1.2A
0
200
400
600
800
1000
SWITCHING TIME (ns)
15
3
14
4
13
10kΩ
+
1µF
12V
+
+
1
S V+
BOOST
+
60V
(MAX)
14
2 x 2200µF
LOW ESR
1N4148
2
1kΩ
3
IN TOP
T GATE DR
IN BOT
T GATE FB
LT1846
5
12
6
11
4
1N4148
5
+
6800pF
25kΩ
7
10
6
1kΩ
18kΩ
1600
1160_3b.eps
13
IRFZ34
0.1µF
18kΩ
100pF
1400
The most common techniques rely
on fixed delay times to create a deadtime between conduction of the top
and bottom MOSFETs. Although this
can work, the delay time must take
into account temperature changes,
supply variations, and production tolerances of the MOSFETs and other
MOSFET drive circuit is the timing
between the top and bottom drives to
prevent cross-conduction. The
presence of cross-conduction or
“shoot-through” currents always saps
efficiency and erodes precious thermal margins; in extreme cases it can
lead to catastrophic failure.
16
2
1200
Figure 3b. CMOS driver switching time increases 400ns for an increase of 8,000pF in load
capacitance
10µF
2.2µF
1600
1000pF
0A
1N4148
+
1400
9000pF
2kΩ
1
1200
1.2A
IOUT
In the LT1160, a floating undervoltage detection circuit monitors the
voltage across the bootstrap capacitor and a separate undervoltage
detection circuit monitors the supply
voltage. If, as a result of operation at
high duty cycles, the voltage across
the bootstrap capacitor drops below
approximately 8.7V, the top driver is
pulled low to prevent overdissipating
the top MOSFET, and also to allow
the capacitor to be recharged. Similarly, if the supply voltage drops below
about 8.3V, both drivers are pulled
low to prevent overdissipating either
MOSFET. The LT1162 has separate
and independent undervoltage detectors for the two half-bridge drivers.
500kΩ
8
5kΩ
9
4700pF
T SOURCE
S GND
P V+
P GND
B GATE DR
NC
B GATE FB
2N2222
11
L
47µH
RS
7mΩ
5V
+
10
(2) IRFZ44
9
7
10kΩ
330kΩ
0.1µF
LT1160
UV OUT
12
5400µF
LOW ESR
MBR340
8
BOTH GNDS
JOINED AT
ONE POINT
f = 40kHz
L: HURRICANE LABS HL-KM147U 801 6352003
RS: DALE TYPE LVR-3 ULTRONIX RCS01
1160_4.eps
Figure 4. 50W high efficiency switching regulator illustrates the design ease afforded by adaptive deadtime generation
Linear Technology Magazine • December 1995
15
DESIGN FEATURES
95
losses. Figure 5 shows the operating
efficiency for Figure 4’s circuit.
90
Two Halves Equal a Whole
EFFICIENCY (%)
components. As a result, more deadtime than is normally needed must be
used, increasing the conduction time
in the lossy MOSFET body diodes.
The LT1160 and LT1162 (like the
LT1158) use an adaptive system that
maintains dead-time independent of
the type, the size and even the number of MOSFETs being driven. It does
this by monitoring the MOSFET gate
turn-off to see that it has fully discharged before allowing the opposite
MOSFET to turn on. In this way,
cross-conduction is completely eliminated as a design constraint.
The high efficiency 10A stepdown
(buck) switching regulator shown in
Figure 4 illustrates how different sized
MOSFETs can be used without having to worry about shoot-through
currents. Since 40V is being dropped
down to 5V, the duty cycle for the
switch (top MOSFET) is only 5/40 or
12.5%. This means that the bottom
MOSFET will dominate the RDS(ON)
efficiency losses, because it is turned
on seven times as long as the top.
Therefore a smaller MOSFET is used
on the top, and the bottom MOSFET
is doubled up, all without having to
worry about dead-time. The noncritical Schottky diode across the bottom
MOSFETs reduces reverse-recovery
The LT1162 is functionally and
electrically identical to two LT1160s.
The LT1162 is ideal for motor-control
applications driving an N-channel
MOSFET H-bridge, as shown in Figure 6. The DC motor shown can be
driven in both directions. By applying
the appropriate control signals at the
inputs, the motor can be made to run
clockwise, counterclockwise, stop rapidly (“plugging” braking) or free run
(coast) to a stop. A very rapid stop can
be achieved by reversing the current,
though this requires more careful
design to stop the motor dead. In
practice, a closed-loop control system with tachometric feedback is
usually necessary.
85
80
75
0
2
4
6
8
OUTPUT CURRENT (A)
10
1160_5.eps
Figure 5. Operation efficiency for Figure 4’s
circuit. Current limit is set at 15A
or above supply. The LT1160 and
LT1162 source pins have been designed to take repetitive output
transients 5V outside the supply rails
with no damage to the part. This
saves the expense of adding high current Schottky diode clamps.
Conclusion
Designing In Ruggedness
The LT1160 and L T1162 Nchannel power MOSFET drivers anticipate all of the major pitfalls
associated with the design of high
efficiency bridge circuits. The designed-in ruggedness and numerous
protection features make these drivers the best solution for 10V to 60V
medium-to-high current synchronous
switching applications.
The output of a bridge circuit driving multiple-ampere inductive loads
can be a very ugly signal to couple
back into a hapless IC. Although
MOSFETs contain integral body diodes which conduct during the
dead-time, slow turn-on times and
wiring inductances can result in
spikes of several volts below ground
60V MAX
12V
+
1
10µF
1N4148
25kΩ
V+
4
24
IRFZ44
+
23
1000µF
22
CBOOTSTRAP
0.1µF
21
19
IRFZ44
6
5
2
3
7
14
V+
26
V+
UV OUT A
UV OUT B
BOOST
BOOST
T GATE DR A
T GATE DR B
T GATE FB A
T GATE FB B
T SOURCE A
T SOURCE B
LT1162
B GATE DR A
B GATE DR B
B GATE FB A
B GATE FB B
GND
25kΩ
V+
GND
IN TOP A
IN TOP B
IN BOT A
IN BOT B
1N4148
10
18
IRFZ44
17
+
1000µF
16
15
CBOOTSTRAP
0.1µF
13
12
IRFZ44
11
8
9
PWM
0-100kHz
PWM
0-100kHz
1160_6.eps
Figure 6. Full-bridge motor control with the LT1162
16
Linear Technology Magazine • December 1995
DESIGN IDEAS
LTC®1430 Provides Efficient GTL Supply
by Craig Varga
A recent trend in computer bus
architecture is the move toward GTL
(Gunning Transition Logic) for routing high speed signals between the
CPU and chipset logic. Buses with
DESIGN IDEAS...
LTC1430 Provides Efficient
GTL Supply ................... 17
Craig Varga
Battery Charger Sinks
Constant Current .......... 18
Mitchell Lee
Low Noise Charge Pump
Biases GaAsFET Gates .. 19
Mitchell Lee
C-Load TM Op Amps
Conquer Instabilities ..... 20
Frank Cox and Kevin R. Hoskins
Lowpass Filters with Rail-toRail Input and Output ... 23
Philip Karantzalis and Jimmylee Lawson
speeds in excess of 66MHz are using
this technology. Several different GTL
supply voltage standards seem to be
evolving, with voltages from 1.2V to
1.5V being discussed most often. In
some implementations of the logic
family, the GTL supply must both
source and sink currents of 5A–10A.
This causes a great deal of difficulty
for a typical current mode control
power supply design that is incapable
of controlling currents less than zero.
The LTC1430 is a voltage mode controller, and as such, does not exhibit
any problems with negative load currents.
Most GTL incarnations, however,
appear not to require current-sinking
supplies, and the LTC1430 is well
suited for these applications as well.
The circuit shown in Figure 1
switches at 300kHz, regulating a 5V
input down to a 1.5V output while
maintaining good efficiency. (See Figure 2. Figures 2–4 are on the bottom
of page 18.) Figure 3 shows the effects
of a fast 4A load transient on the
1.5V output. The initial current was
1A and the final current 5A. The
top trace is the output voltage
(100mV/div) and the bottom trace is
the regulator’s inductor current
(5A/div). In Figure 4, the load resistor
is switched from ground to a 3V
supply, resulting in bidirectional loading. Current is switched from 5A to
−4A. Again, the top trace is the output
of the 1.5V supply. The relatively long
recovery period is actually a response
to the perturbation that appears on
the input voltage as a result of the
large load change. Voltage mode control suffers from inherently poor line
rejection. In this case, the lab supply
used for the tests exhibits rather
poor dynamics. If a better input supply is used, the overall settling time
will be much faster. The LTC1430
also has a very accurate reference
and exhibits good static load regulation, as can be seen from the very
small offset between the settled light
load and heavy load conditions on the
output-voltage trace.
MBR0530T1
5V
D2
R4
51
R7
15k
C1
0.1µF
15
14
11
12
C7
0.1µF
8
10
9
R10
3.3k
4
R8
130k
C6
0.01µF
C3
220pF
C11
0.068µF
PVCC2
PVCC1
VCC
G1
FSET
+
C16
0.1µF
2
C10
1µF
1
R2, 3Ω
U1
IFB
LTC1430
16
G2
3
SHDN
PGND
5
COMP
–SENSE
7
SS
+SENSE
6
SGND
FB
C9
1µF, 25V
+
C5
330
6.3V
OSCON
Q1
Si4410
13
R1
1k
IMAX
+
C4
330
6.3V
OSCON
L1
2.7µH
1.5V OUT
R3
3Ω
C2
680pF
Q2
Si4410
D1
MBRS330T3
C8
22µF
35V
R6
10k
R5
16.5k
1%
+
C12
330
6.3V
OSCON
C13
330
R9
6.3V
88.7k OSCON
1%
+
+
330
6.3V
TANT
+
330
6.3V
TANT
ADDITIONAL
DECOUPLING
AT THE LOAD
di1430_1.eps
S/D
Figure 1. Schematic diagram of GTL supply
Linear Technology Magazine • December 1995
17
DESIGN IDEAS
Battery Charger Sinks
Constant Current
the current available from the source.
The circuit shown in Figure 1 does
just that, while charging 2 NiCd cells.
Input current is sensed by a PNP
transistor and applied as feedback to
an LTC1174 stepdown converter. The
Burst Mode™ converter draws just
enough power to hold the input current at 50mA, matching the abilities
of the wall adapter.
Output current into two cells is
nominally 180mA, but climbs to over
300mA when the batteries are completely discharged. Efficiency is about
78% at 3V output. If the batteries are
removed from the charging circuit,
the output voltage could climb to
levels destructive to the load. To
DC-to-DC converters make very
efficient constant current sources for
charging NiCd batteries. Unfortunately, the input of a switcher exhibits
a negative impedance, and this can
cause problems in systems where the
source is power or current limited.
Various schemes are used to preclude
input foldback. Undervoltage lockout
works well with power -limited
sources, keeping the converter OFF
until the input voltage has risen to
the point where it can develop adequate power.
Undervoltage lockout does not work
with current-limited sources. A better approach is to control the
converter’s input current to match
50mA
INPUT
2×
100µF
16V
OS-CON
100µF
16V
OS-CON
+
by Mitchell Lee
prevent this, a second feedback
path is applied to Pin 1 via a diode,
limiting the output voltage to approximately 3.7V.
Another condition that can spell
trouble for simple circuits such as
this one is the loss of input power
while the batteries are still connected
in circuit. An extra Schottky diode
placed in series with the switch (Pin 5)
blocks reverse current flow into the
LTC1174 and prevents damage. The
output can also be short circuited
without damage to the device. Shutdown (Pin 8) allows logic control of the
charger, so the charging current can
be interrupted without disconnecting
the source supply.
+
100Ω
11Ω
2N3906
+
6
8
1N5818
VIN
SW
SHDN
5
CTX100-1*
LOAD
1N5818
+
LTC1174HV-3.3
47µF
6.3V
OS-CON
2 NiCd
CELLS
1N4148
FB
GND
IPGM
7
2
3
4
1
100pF
*COILTRONICS
(407) 241-7876
di1174_1.eps
Authors can be contacted
at (408) 432-1900
Figure 1. Schematic diagram of constant-current battery charger
LTC1430, continued from page 17
95
90
EFFICIENCY (%)
OUTPUT
VOLTAGE
100mV/DIV
OUTPUT
VOLTAGE
100mV/DIV
85
80
75
INDUCTOR
CURRENT
5A/DIV
70
65
60
INDUCTOR
CURRENT
5A/DIV
di1430_3.eps
55
0
1
2
3
4
5
LOAD CURRENT (A)
6
7
Figure 3. Oscillograph showing effects of
4A load step on the 1.5V output
di1430_4.eps
Figure 4. Oscillograph showing effects of
bidirectional loading on the GTL supply
di1430_2.eps
Figure 2. Efficiency plot of the GTL supply
18
Linear Technology Magazine • December 1995
DESIGN IDEAS
Low Noise Charge Pump Biases
GaAsFET Gates
by Mitchell Lee
Gallium arsenide MOSFETs are
widely used in wireless applications
as RF output amplifiers, especially in
cellular telephones. Although they
provide excellent power gain, output
power and efficiency on low voltage
battery supplies, GaAsFETs are depletion-mode devices and require a
negative gate voltage for proper bias.
Since only a small current (less than
10mA) is required, a charge pump is
the best solution for generating a
negative gate-bias supply.
Charge pumps normally conjure
visions of noise, and rightly so. Their
very operation relies on transferring
energy from input to output by alternately charging and discharging a
transfer capacitor—a decidedly noisy
process. Noise on the gate-bias line
translates directly to the output spec5V
1
2
+
SHDN
SENSE
VCC
CPOUT
tra, rendering the usual charge pump
unsuitable for this application.
A new generation of charge pumps
with on-chip post regulators has been
developed to satisfy this application.
Although the charge pump is retained
as the most economical and compact
method of generating a negative voltage from a positive input, a linear
post regulator is added to “purify” the
otherwise noisy charge-pump output.
The result is a negative bias supply so
quiet you’ll need to build a low noise
preamp in order to observe the noise
on a spectrum analyzer.
Figure 1 shows the LTC1550 low
noise, regulated, switched-capacitor
voltage inverter. Total noise over a
40MHz bandwidth is approximately
200µVRMS with a 1mA load. Compare
this with 10–100mVRMS noise, a fig-
8
7
C2
0.1µF
LTC1550-4.1
4.7µF
3
4
C1+
GND
VOUT
C1–
6
5
C1
0.1µF
FERRITE BEAD*
VOUT = – 4.1V
+
CL
0.1µF
COUT
10µF
3900Ω
*DALE ILB-1206-19
di1550_1.eps
Figure 1. Circuit diagram: LTC1550 low noise, regulated, switched-capacitor voltage inverter
ure more typical of generic charge
pumps. A plot of spot noise is shown
in Figure 2. Above 20kHz, broadband
output noise is gradually eliminated
by the 10µF output capacitor.
Throughout the audio range the noise
is 600–700nV/√Hz.
Figure 3 shows the spectral response of the LTC1550 over a range of
100kHz to 10MHz. Switching noise at
900kHz and related harmonics are
less than 10µV. The ferrite bead used
during these tests attenuates harmonics above 5MHz. Depending on
the application, a series resistor of 1Ω
to 10Ω may be just as effective at
attenuating noise.
The LTC1550 is part of a larger
family of devices including multiple
versions and the LTC1551. The only
difference between the LTC1550 and
LTC1551 is shutdown polarity (the
LTC1550 has inverting shutdown, and
the LTC1551 has noninverting shutdown). Packages with higher pin
counts include features such as adjustable output and a “power good”
pin for controlling power to the
GaAsFET drain. All devices exhibit
the same characteristic low output
noise. See the LTC1550/LTC1551
data sheet for a complete description
of all available options.
60
100µ
50
BW = 100Hz
40
10µ
NOISE (dBµV)
NOISE (V/√Hz)
30
1µ
100n
20
10
0
–10
10n
–20
1n
–40
–30
1k
10k
FREQUENCY (Hz)
100k
di1550_2.eps
Figure 2. Spot noise plot of the circuit shown in Figure 1
Linear Technology Magazine • December 1995
1k
10k
100k
FREQUENCY (Hz)
1M
10M
di1550_3.eps
Figure 3. Spectral response of the LTC1550, 100kHz to 10MHz
19
DESIGN IDEAS
C-Load™Op Amps
Conquer Instabilities
by Frank Cox and
Kevin R. Hoskins
Introduction
Video Performance
LTC has taken advantage of pro- with ESD Protection
cess technology advances and circuit
innovations to create a series of
C-Load operational amplifiers. All of
these amplifiers are tolerant of capacitive loading, and a majority of
them remain stable driving any capacitive load. This series of amplifiers
has a bandwidth that ranges from
160kHz to 140MHz. These amplifiers
are appropriate for a wide range of
applications such as coaxial cable
drivers, video amplifiers, analog-todigital converter (ADC) input buffer/
amplifiers and digital-to-analog converter (DAC) output amplifiers.
This article looks at a few of the
many applications for which the
C-Load amplifiers are appropriate,
including overcoming the large junction capacitance of surge protection
diodes on the outputs of video
amplifiers, driving the dynamically
changing capacitive loads of high
speed ADC converters’ analog inputs,
and driving an ADC’s reference with
varying voltages.
Table 1 lists LTC’s unconditionally
stable voltage-feedback C-Load
amplifiers. Table 2 lists other voltagefeedback C-Load amplifiers that are
stable with loads up to 10,000pF.
The circuit shown in Figure 1 is a
simple gain-of-2 line driver that is
capable of withstanding high levels of
electrostatic discharge (ESD) while
retaining its excellent video performance. The output of the LT1363
amplifier is protected with transient
voltage suppressors. These suppressors are Zener diodes designed for
circuit protection and specified for
high peak power dissipation, standoff voltage and maximum surge
current. The P6KE15A diodes used in
this circuit have a peak power dissipation of 600W, a minimum stand-off
voltage of 12.8V and a maximum surge
current of 28A. This presents an extraordinary level of protection for
the output of the amplifier, but the
large junction diodes present a problem for some video circuits.
The series connection of the two
P6KE15A diodes has 500pF of total
capacitance in the OFF state
(the normal operating condition).
Normally, large capacitive loads are
to be avoided in video amplifiers. Not
only can capacitive loading cause oscillation in amplifiers that are not
designed for it, but the limited output
15V
P6KE20
+
4.7µF TANT
15V
0.1µF CER
1N5712
1000Ω
+
IN
75Ω
OUT
LT1363
75Ω
1N5712
–
510Ω
P6KE15A ×2
–15V
4.7µF TANT
+
510Ω
0.1µF CER
P6KE20
dicl_1.eps
–15V
Figure 1. Line driver circuit diagram
20
Table 1. Unity-gain stable C-Load amplifiers
stable with all capacitive loads
Singles
—
LT1200
LT1220
LT1224
LT1354
LT1357
LT1360
LT1363
Duals
LT1368
LT1201
—
LT1208
LT1355
LT1358
LT1361
LT1364
GBW IS /Amp
Quads (MHz) (mA)
LT1369 0.16 0.375
LT1202 11
1
—
45
8
LT1209 45
7
LT1356 12
1
LT1359 25
2
LT1362 50
4
LT1365 70
6
Table 2. Unity-gain stable C-Load amplifiers
stable with CL ≤ 10,000pF
Singles
LT1012
—
LT1097
—
Duals
—
LT1112
—
LT1457
GBW IS /Amp
Quads (MHz) (mA)
—
0.6
0.4
LT1114 0.65 0.32
—
0.7
0.35
—
2
1.6
current of many amplifiers causes
slew limiting. The excellent output
drive (70mA minimum at ± 15V
supplies) and the C-Load stability
features of the LT1363 make the
video performance of this circuit
almost indistinguishable from the
same driver without the added ESD
protection. Of course, the 75Ω series
matching resistor on the output
helps to isolate the capacitive load.
For the best high speed performance,
we recommend that the coax cable
be matched in this way. However,
there are cases where the maximum
output swing is required and this
resistor cannot be used (of course, for
quality video a termination resistor
is always used on the end of the
cable), so tests were run with composite video to quantify the effect of
this component. Table 3 gives differential gain and phase measurements
for the amplifier circuit with and
without the output series resistor.
Linear Technology Magazine • December 1995
DESIGN IDEAS
15V
Table 3. Differential gain and phase
measurement summary
1N5819
Differential Differential
Phase
Gain
0.11°
0.03%
LT1363 with
output clamp and
75Ω output R
LT1363 with
0.11°
output clamp and no R
20k
C1
NONINVERTING
INPUT OF LT1363
TO
SAR
GND
75Ω
1N5819
FROM INTERNAL DAC
Figure 2. Circuit with modified clamp for
higher voltage
0.1°
0.1%
LT1206 with
0.11°
output clamp and no R
0.1%
of Figure 3. The LT1206 high current
CFA has no measurable performance
degradation for video signals with the
suppressor diodes on the output,
although the restriction of the inputclamp network still holds. The 250mA
output drive (over 0°C to 70°C temperature with ±5V to ±15V supplies)
capability and the C-Load feature of
the LT1206 make it a natural for
driving difficult loads.
Except for a slight rise in the LT1363’s
differential phase, there is no measurable degradation. The output and
power supply pins of the driver circuit
withstand repeated air discharges of
17kV (the limit of the test equipment)
without failure. The input is sensitive
to the loading effects of the diode and
resistor network because the junction capacitance of the clamp diodes
works against the impedance of the
cable-termination resistors. For this
reason, low capacitance clamp diodes were used. The input of the
driver circuit still stood off 10kV.
If some reduction in the frequency
response (approximately 3dB at
5MHz) can be tolerated, the network
shown in Figure 2 can be added to the
input to increase the standoff voltage
to 17kV.
For even more demanding applications, we recommend the driver circuit
Driving ADCs
Most contemporary analog-to-digital converters (ADCs) incorporate a
sample-and-hold (S/H) using a topology exemplified by the circuit in Figure
4. The hold capacitor’s (C1) size varies with the ADC’s resolution, but is
generally in the range of 5pF–20pF,
10pF–30pF or 10pF–50pF for 8-, 10or 12-bit ADCs, respectively.
At the beginning of a conversion
cycle, this circuit samples the applied
signal’s voltage magnitude and stores
it on its hold capacitor. Each time the
switch opens or closes, the amplifier
driving the S/H’s input faces a
15V
dicl_4.eps
dicl_2.eps
–15V
0.3%
LT1206 with
output clamp and
75Ω output R
>> –AV
AIN
P6KE20
Figure 4. Typical ADC input stage showing
input capacitors
dynamically changing capacitive load.
This condition generates current
spikes on the input signal. These
spikes, along with the capacitive load,
are a very challenging load that can
potentially produce instabilities in an
amplifier driving the ADC’s input.
These instabilities make it difficult
for an amplifier to settle quickly. If the
output of an amplifier has not settled
to a value that falls within the error
band of the ADC, conversion errors
can result. That is, unless the amplifier is designed to gracefully and
accurately drive capacitive loads, as
are Linear Technology’s C-Load line
of monolithic amplifiers.
As can be seen in Figure 5a, an
amplifier whose design is not optimized for handling large capacitive
loads has some trouble driving the
hold capacitor of the LTC1410’s S/H.
Although the LT1006 has other very
CONVST
1V/DIV
INPUT
200mV/DIV
+
4.7µF TANT
V+
200ns/DIV
0.1µF CER
1N5712
1k
+
dicl_5a.eps
Figure 5a. Input signal applied to an
LTC1410 driven by an LT1006
75Ω
LT1206
75Ω
1N5712
–
0.01µF
1200Ω
V–
4.7µF TANT
1200Ω
+
0.1µF CER
P6KE15A ×2
CONVST
1V/DIV
INPUT
50mV/DIV
P6KE20
dicl_3.eps
200ns/DIV
–15V
Figure 3. 250mA output line driver
Linear Technology Magazine • December 1995
dicl_5b.eps
Figure 5b. Input signal applied to an
LTC1410 driven by an LT1360
21
DESIGN IDEAS
shows that the LTC1360 is an ideal
solution for driving the ADC’s input
capacitor quickly and cleanly with
excellent stability. Its wide 50MHz
gain bandwidth and 800V/µs slew
rate very adequately complement the
LTC1410’s 20MHz full-power bandwidth. The LTC1360 is specified for
±5V operation.
Figure 6 shows the circuit used to
test the performance of op amps driving the LTC1410’s input and measure
the ADC’s input waveforms.
5V
0.1µF
INPUT
+
LT1006 OR
LT1360
+AIN
12-BIT DATA
– AIN
–
0.1µF
LTC1410
VREF
– 5V
5V
REFCOMP AVDD
+
10µF
+
0.1µF
0.1µF
AGND
10µF
DVDD
OGND
CONTROL LINES
DGND
Adjustable ADC
Reference Voltage
VSS
0.1µF
+
CONVST
10µF
An ADC’s reference voltage should
always be set to a value that maximizes the number of codes generated
during input signal conversion. If the
reference voltage is set for input signals with the widest full-scale range,
this might be too large for input signals with a much smaller range. For
example, an ADC’s full-scale input
– 5V
dicl_6.eps
Figure 6. Test circuit used to measure LTC1410 input signal waveform
as indicated by the instabilities that
appear in the lower oscilloscope trace
in Figure 5a.
By contrast, Figure 5b shows the
LTC1360 C-Load op amp driving the
same LTC1410 input. The photo
desirable characteristics, such low
VOS, high slew rate and low power
dissipation, it has difficulty accurately
responding to dynamically changing
capacitive loads and the current
glitches and transients they produce,
continued on page 25
5V
5V
C4
0.1µF
1
± 2.5V ANALOG
INPUT RANGE
2
3
C5
0.1µF
U1
LT1004-2.5
+
4
C6
10µF
C7
0.1µF
5
6
1
C1
0.1µF
2
3
R1
5.1k
4
–5V
VREF
VDD
FB
U2
LTC8043
IOUT
CLK
SRI
LD
GND
8
7
7
8
6
9
5
10
11
5V
C2
0.1µF
12
13
2
3
–
+
14
7
U3
LT1220
4 C3
0.1µF
–5V
+AIN
AVDD
–AIN
DVDD
VREF
VSS
COMP
BUSY
AGND
CS
D11 (MSB)
D10
D09
D08
CONVST
U4
LTC1410
RD
SHDN
NAP/SLP
D07
OGND
D06
D0
D05
D04
DGND
D1
D2
D3
C8
0.1µF
28
27
26
25
24
23
22
21
20
–5V
BUSY
C9
0.1µF
CHIP
SELECT
CONV START
READ
SHUTDOWN
SHUTDOWN MODE
19
18
17
16
15
DATA BIT 0
DATA BIT 1
DATA BIT 2
DATA BIT 3
6
DATA BIT 4
DATA BIT 5
DATA BIT 6
DATA BIT 7
DATA BIT 8
DATA BIT 9
DATA BIT 10
DATA BIT 11
SERIAL CLOCK
SERIAL DATA
DAC LOAD
dicl_7.eps
Figure 7. The 12-bit LTC8043 DAC and the C-Load LT1220 op amp create variable reference voltages, enhancing the 12-bit LTC1410 ADC’s
input range flexibility
22
Linear Technology Magazine • December 1995
DESIGN IDEAS
Lowpass Filters with Rail-to-Rail Input
and Output
by Philip Karantzalis and Jimmylee Lawson
Rail-to-Rail, DC-Accurate,
Butterworth and Bessel 7thOrder Lowpass Filters.
Ther circuit of Figure 1 uses a
dual rail-to-rail op amp and a DCaccurate switched-capacitor filter to
provide a 7th-order lowpass filter.
The rail-to-rail op amps accommodate the nonrail-to-rail output
operation of the switched capacitor
filter. Overall rail-to-rail operation is
achieved by attenuating and level
shifting the input signal and by level
shifting and amplifying the output of
the switched-capacitor filter.
The circuit of Figure 1 operates
with a single 5V supply and attenuates the input signal by a factor of
two. A 0-to-5VP–P input signal appears as 1.25–3.75V at the input of
the filter. The attenuation factor of
two is chosen as a convenient number, and does not fully exploit the
3.5V output-voltage range of the
switched-capacitor filter. The penalty
is a mere 2dB loss of signal-to-noise
ratio, yet the circuit is still usable for
12- to 13-bit applications.
The input op amp of Figure 1
provides buffering. A single pole
antialiasing filter is added in front of
the switched capacitor filter through
capacitor C3; its cutoff frequency is
3.3 times the cutoff frequency of the
switched-capacitor filter.
The output op amp of Figure 1
provides an additional 2-pole, continuous-time filter and restores the
rail-to-rail output swing. Table 1
shows the component values of Figure 1 for three different cutoff
frequencies. The passive components
were carefully selected to work for
both filter types, Butterworth and
Bessel.
10
0
–20
R3
10k
IN
R2
20k
C3*
0.039µF
–30
LTC1065
–40
LTC1063
–50
–60
–70
–80
–90
100
1k
FREQUENCY (Hz)
10k
difilt_2.eps
Figure 2. Amplitude response of Figure 1’s
circuit for both LTC1063 and LTC1065
Other cutoff frequencies can be
obtained by scaling the component
values of Table 1. The 7th-order amplitude response of the circuit is shown
in Figure 2. Figure 2 was traced with
a 1.7VRMS input (4.76VP–P ), and the
measurement bandwidth was 22kHz.
The filter cutoff frequency was set to
1kHz. Attenuation as high as 80dB is
obtained with the linear -phase
LTC1065 filter. Figure 3 shows the
dynamic range (S/N + THD) of the
filter of Figure 1.
C2
0.1µF
5V
R1
10k
VS = 5V
–10
GAIN (dB)
The proliferation of systems operating exclusively with single 5V
supplies has created a need for analog signal conditioning circuits with
rail-to-rail input and output. Op
amps, A/D converters, and D/A converters with rail-to-rail inputs and
outputs are readily available, but not
high-order lowpass filters. Highorder lowpass filters are used to
provide antialiasing protection for
A/D converters or to bandlimit the
outputs of D/A converters.
R4
49.9k
0.1µF
R5*
5.62k
R6*
11.3k
+
1/2
LT1366
C1
0.1µF
–
+
1/2
LT1366
R10
20k
5V
*THE VALUES FOR THESE COMPONENTS DETERMINE
THE FILTERS –3dB FREQUENCY (SEE TABLE 1).
NOTE: ALL RESISTORS ARE 1% METAL FILM AND
ALL CAPACITORS ARE 5%.
1µF
TANT
OUT
–
1
8
2
7
4.99k
+
3
LTC1063
OR
LTC1065
R9
10k
5V
6
5V
4.53k
4
R7
20k
5
R8
20k
0.1µF
difilt_1.eps
ROS*
200k
COS
510pF
Figure 1. 100Hz 7th-Order Butterworth or Bessel lowpass filter with rail-to-rail input and output
Linear Technology Magazine • December 1995
23
DESIGN IDEAS
– 40
10
– 45
VS = 5V
–10
BESSEL
– 55
–20
RLOAD = 100k
– 60
– 65
GAIN (dB)
THD + NOISE (dB)
0
RLOAD = 5k
– 50
BUTTERWORTH
– 70
– 75
– 80
–30
–40
–50
–60
f –3db = 100Hz
fin = 50Hz
–70
Figure 4. Oscillograph of square wave
response; top trace is the LTC1065 Bessel
filter, bottom trace is the LTC1063 Butterworth filter
– 85
– 90
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (VP-P)
difilt_3.eps
Figure 3. Dynamic range (THD + Noise) versus
input voltage plot for the circuit of Figure 1
The 76dB maximum dynamic range
occurs around 4.75VP–P and this
should be the full scale of the system.
Figure 4 shows the transient response
of both Butterworth and Bessel 7thorder filters.
The measured DC gain error of
Figure 1’s circuit is less than 0.5%.
This depends on the matching of resistors R1–R4 and R7–R10. The
measured DC gain nonlinearity of
this circuit is ≤0.1% (–80dB).
–80
–90
10
Figure 6. Amplitude response of the circuit
detailed in Figure 5
The circuit of Figure 5 is a 20Hz
Bessel filter with an additional 60Hz
notch. This type of circuit is useful in
applications where excessive 60Hz
noise is present and, on top of
bandlimiting, additional attenuation
of 60Hz is required. The same scheme
of rail-to-rail op amps is used for
input and output buffering, except
the output of the first op amp is fed
forward to the input of the Sallen-Key
lowpass filter. The output of the
LTC1065 is connected to the noninverting input of the Sallen-Key filter
through R11. When the output of the
first op amp is 180 degrees out of
phase from the output of the LTC1065,
a notch depth of 50dB or greater can
be achieved. In order to achieve this
notch depth for 60Hz, the resistors
R5, R6, R11 and ROS must be 0.1%
and the COS capacitor must be 1%
tolerance. Figure 6 shows the gain
response of the circuit in Figure 5.
C2
0.1µF
R4
49.9k
R3
10k
IN
R2
20k
C3
0.039µF
1k
difilt_6.eps
20Hz Rail-to-Rail
Linear-Phase Lowpass
Filter with 60Hz Notch.
5V
R1
10k
100
FREQUENCY (Hz)
0.1µF
R5
49.9k
0.1%
R6
150k
0.1%
+
C1
0.1µF
–
R11
113k
0.1%
5V
1
8
2
7
R9
10k
R7
20k
5V
LTC1065
+
OUT
–
R10
20k
4.99k
NOTE: ALL RESISTORS ARE 1% METAL FILM AND
ALL CAPACITORS ARE 5% UNLESS SPECIFIED
OTHERWISE.
1µF
TANT
+
1/2
LT1366
1/2
LT1366
3
6
4
5
R8
20k
5V
4.53k
0.1µF
difilt_5.eps
ROS
200k
0.1%
COS
510pF
1%
Figure 5. Schematic diagram of 20Hz Bessel lowpass filter with 60Hz notch
Table 1. Component values for Figure 1's circuit for three
different cutoff frequencies
– 3dB Freq
C3
10Hz
0.39µF
100Hz
0.039µF
1kHz
0.0039µF
24
ROS
2M
200k
19.1k
COS
510pF
510pF
510pF
R5
56.2k
5.62k
562Ω
R6
113k
11.3k
1.13k
Linear Technology Magazine • December 1995
CONTINUATIONS
C-load, continued from page 22
span is set to 5V. Input signals with
magnitudes that cover this span will
use all of the ADC’s codes. However,
an input signal that only spans 2V
will use only 2/5 of the codes, resulting in a loss of resolution.
When the reference voltage is reduced to 2V, the 2V signal will now
use all of the ADC’s codes. But with
the 2V reference, an input signal
having a 4V span is likely to exceed
the input span, resulting in clipped
signals and missed information. In
cases such as this, an adjustable
reference is needed to adjust the
ADC’s full-scale gain.
The circuit in Figure 7 uses the
LTC8043 12-bit CMOS 4-quadrant
DAC driving the LT1220 C-Load
amplifier to generate variable ADC
reference voltages that allow the user
to adjust the ADC’s gain. An LT10042.5 micropower 2.5V reference is used
as the LTC8043’s reference source,
setting its output span to 0V–2.5V.
The LT1220’s output is applied to the
LTC1410’s VREF input. The LT1220
C-Load amplifier ensures that, when
changing the LTC1410’s reference
voltage, the amplifier does not oscillate even while driving the reference
input bypass capacitor C5. The
LTC1410 can easily handle a reference voltage as low as 1V (±2VP-P
input range) with only a 0.5 LSB
change in linearity error.
probe to see the PFC in action. Scope
probes don’t read duty factor very
well, and probing on the FET drain
reveals a waveform that doesn’t look
like anything you have ever seen before, and may awaken you in the
middle of the night. It’s not that the
waveform isn’t pretty, it’s that the
waveform is very busy, and it is hard
to see anything like a sine wave in it.
The input current waveform is far
easier to enjoy, it’s just harder to get
to without a good current probe.
Conclusion
Using advanced process technology and innovative circuit design,
LTC has created a series of C-Load
operational amplifiers that not only
tolerate capacitive loading, but remain stable driving any capacitive
load. C-Load amplifiers meet the
challenging and difficult capacitive
loads by remaining stable and
settling quickly.
PFC, continued from page 11 (Design Features)
Conclusion
PFC is fun. It offers technical challenges not because it is complicated
but because there are so many little
weirdnesses, all happening together
in concert to provide a beautiful function. One of the biggest challenges is
to find a place to hook your scope
Authors can be contacted
at (408) 432-1900
Index of Circuits in Linear Technology, Issues I:1 Through V:4
Included with this issue is a
complete index of the circuits
featured in Linear Technology
Magazine, issues I:1 through V:4.
This index evolved as a result of a
request from one of our Field
Applications Engineers, who was
unable to locate a circuit he
believed had appeared in Linear
Technology Magazine. We set out
Linear Technology Magazine • December 1995
to create an index in which the
reader could “browse” for a circuit
that fit his or her design needs or
search for a specific Linear
Technology part; we believe that
the table design we used here
thoroughly fulfills this mission. The
reader can page to the desired
circuit category, scan the columns
for the circuit type and/or part
number, and easily find the
appropriate article, issue, page
number, and figure number(s).
Over 250 circuits from the first
five years of Linear Technology
magazine are included in this
index. Hereafter, we will update the
index yearly, so new circuits won’t
get lost. Pleasant Reading!
25
NEW DEVICE CAMEOS
New Device Cameos
LTC1409 and LTC1415:
High Speed, Low Power,
12-bit A/D Converters
LTC has two new 12-bit A/D converters that set a new standard for
high performance at low power. The
LTC1415 is a 12-bit, 1.2Msps A/D
converter that operates on a single
5V supply and draws just 60mW of
power. The LTC1409 is a 12-bit,
800ksps A/D converter with outstanding dynamic performance
(SINAD = 71dB at Nyquist) that operates on a ±5V supply.
The LTC1409 and LTC1415 both
have differential input sample-andhold circuits that reduce unwanted
high frequency common mode noise.
The LTC1415 has a unipolar input
range of 0V to 4.096V (1mV per LSB).
The LTC1409 has a bipolar input
range of ±2.5V. The input ranges of
both devices are set with an on-chip
2.5V precision voltage reference.
Both devices have parallel output
interfaces that allow easy connection
to microprocessors, DSPs or FIFOs.
Two power-shutdown modes allow
flexibility in further reducing the
power during inactive periods. Both
devices come in 28-pin SO packages.
The LTC1446/LTC1447:
World’s Only Dual
12-Bit, Rail-to-Rail DACs
in SO-8 Packages
The LTC1446 and LTC1447 are
complete dual, 12-bit micropower
DACs with rail-to-rail buffer amplifiers and an onboard reference. Both
parts have a maximum DNL error of
0.5LSB. They have an easy-to-use
cascadable serial interface that is SPI
compatible. Applications for these
parts include industrial process
control, digital calibration, automatic
test equipment, cellular telephones
and portable battery-powered
applications where low supply
current is essential.
The LTC1446 operates on a single
supply ranging from 2.7V to 5.5V,
dissipating a mere 1.35mW from a 3V
26
supply. It has a wide output swing of
0V to 2.5V. The LTC1447 operates on
a single supply of 4.5V to 5.5V, dissipating 3.5mW. It has an output swing
of 0V to 4.095V. Both parts have an
onboard reference that is connected
internally to each DAC. A DOUT pin
allows several parts to be daisychained, and a built-in power-on reset
clears the output to zero-scale at
power-up.
Both the LTC1446 and the
LTC1447 come in an SO-8 package or
a small 8-pin PDIP, allowing efficient
use of circuit board space. These dual
DACs offer excellent DNL, low power
and a convenient serial interface, all
in a tiny SO-8 package.
LT1464: First Micropower
JFET Op Amp for Driving
C-Loads
The LT1464 op amp combines features that would normally be unique
to three different types of op amps.
The LT1464 is the first micropower
JFET op amp in our C-Load family of
op amps. The output can drive capacitive loads up to 10nF with any
load resistance. At the input side of
the op amp, input bias currents are
less than 1pA for demanding trackand-hold circuits and active filters
that use high-value resistors. Input
common mode range includes the
positive supply. Power supply current is typically 250µ A, allowing
micropowered battery applications.
For single supply requirements, a full
set of specifications are included for
5V operation. The slew rate is 1V/µs
and the gain bandwidth is 1MHz.
The LTC1458 and LTC1459:
Quad 12-Bit, Rail-to-Rail
Micropower DACs
The LTC1458 and the LTC1459
are complete quad 12-bit micropower
DACs with rail-to-rail buffer amplifiers and an onboard reference. Both of
these parts have a maximum DNL
error of 0.5LSB, and an easy-to-use,
SPI compatible, cascadable serial interface. They also offer several
convenient features that make these
parts flexible and easy to use. Industrial process control, automatic test
equipment and digital calibration are
just a few of the applications for
these parts.
The LTC1458 operates on a single
supply ranging from 2.7V to 5.5V and
dissipates a mere 2.5mW from a 3V
supply. It has a 1.22V onboard reference. The LTC1459 operates on a
single supply of 4.5V to 5.5V, dissipating 6mW. Its onboard reference is
2.048V. Both of these parts have a
separate reference input pin for each
DAC, which can be driven by an external reference or connected to the
onboard reference output. The user
can also offset the zero-scale voltage
for each DAC by means of a REFLO
pin. Each of the rail-to-rail buffer
amplifiers will swing to within a few
millivolts of either supply rail and can
be connected in a gain-of-one or a
gain-of-two configuration, giving an
output full-scale of 1×REF IN or
2×REFIN respectively. There is a builtin power on reset and a CLR pin that
resets the output to zero-scale.
Both the LTC1458 and the
LTC1459 come in small 28-pin SSOP
or 28-pin SO packages. These quad
DACs offer the user flexibility with a
host of useful features, excellent DNL
and low power dissipation.
LT1537 5V Powered
RS232 Transceiver
The LT1537 is a new three-driver/
five-receiver RS232 interface transceiver designed to serve as a serial I/O
port for AT-compatible computers.
The LT1537 is pin compatible with
the LT1137A. Its integral chargepump power generator uses low
cost 0.1µF and 0.2µF capacitors to
Linear Technology Magazine • December 1995
NEW DEVICE CAMEOS
generate RS232 levels from standard
5V power supplies. The device has
low power consumption: 8mA in
normal operation and 1µA in shutdown mode.
The LT1537 is RS232/RS562 standard compatible. Operation at data
rates in excess of 250kBd for 1,000pF
loads and 120kBd for 2,500pF loads
is guaranteed. Slew rate with 3kΩ,
2500pF loads is a minimum of 4V/µs.
When powered down or in shutdown
mode, the driver outputs remain
high impedance for line voltages to
15V. Both driver outputs and receiver
inputs can be forced to ± 25V
without damage.
Whereas most other RS232 transceivers require exter nal ESD
protection devices, the LT1537 is
protected against ±5kV ESD strikes
to the RS232 inputs and outputs.
This integrated ESD protection saves
the expense and space of external
protection devices. This level of ESD
protection is adequate in most applications. In applications where high
ESD level protection (IEC-801-2) is
required, our LT1137A provides that
solution. The LT1537 is available in
28-lead SO and SSOP packages.
The LTC1449/1450 Parallel
Input, 12-Bit Rail-to-Rail
Voltage Output Micropower
DACs
The LTC1449 and LTC1450 are
LTC’s first pair of parallel-input, voltage output DACs. These devices are
designed as complete DACs with internal references and buffered, true
rail-to-rail voltage outputs. The analog specifications are equivalent to
those of the LTC1451 serial DAC,
with excellent DNL performance of
less than ±0.5LSBs.
The buffered true rail-to-rail voltage output can be configured for two
different full-scale settings. When the
internal reference is used and the
gain-setting pin is tied to ground, the
full-scale range is 2.500V for the
LTC1449 and 4.095V for the LTC1450.
When the gain-setting pin is connected to VOUT, the full-scale ranges
Linear Technology Magazine • December 1995
change to 1.220V for the LTC1449
and 2.047V for the LTC1450.
The LTC1449 and LTC1450 are
designed to run off a single supply
while consuming very little power.
The LTC1449 can be powered from a
single supply as low as 2.7V; when
powered from such a supply, it dissipates only 0.75mW. The LTC1450 is
powered from a single 5V supply and
dissipates only 2mW of power. This
low power dissipation makes the
LTC1449 and LTC1450 ideal for battery-powered applications.
Separate pins are provided for both
ends of the voltage-scaling resistor
network to allow for versatile
connection in multiplying and
external-reference applications.
Double-buffered parallel digital inputs provide flexibility and easy
interface to popular DSPs and microprocessors.
The LTC1449 and LTC1450 are
available in 24-lead PDIP and SSOP
packages.
The LTC1516: Micropower,
Regulated, 5V Charge-Pump
DC/DC Converter
The LTC1516 is a micropower
charge-pump DC/DC converter that
generates a regulated 5V output from
a 2V to 5V supply, without inductors.
Only four external capacitors (two
0.22µF and two 10µF) are required to
deliver a 5V ±4% output with up to
50mA of output load current. Extremely low supply current (12µA
typical with no load and less than 1µA
in shutdown conditions) and low external parts count make the LTC1516
ideal for small, battery-powered applications. The LTC1516 achieves
efficiency greater than 75% with load
currents as low as 100µA, due to its
ultralow quiescent current.
To further improve overall efficiency, the LTC1516 operates as either
a doubler or tripler, depending on VIN
and VOUT load conditions. The part
also has thermal shutdown protection and can survive an indefinite
short from VOUT to GND. In shutdown
conditions, the load is disconnected
from VIN.
The LTC1516 can be substituted
for the MAX619 with improved performance. The part is available in
8-pin PDIP and 8-pin SO packages.
LT1307 1-Cell
Micropower 675kHz
PWM DC/DC Converter
The LT1307 is a micropower, fixed
frequency DC/DC converter that operates from an input voltage as low as
1V. The first device to achieve true
PWM performance from a 1-cell supply, the LT1307 automatically shifts
to power-saving Burst Mode operation at light loads. High efficiency is
maintained over a broad 100µA to
100mA load range. The device includes a low-battery detector with a
200mV reference, and consumes less
than 5µA in shutdown mode. No-load
quiescent current is 50µA, and the
internal NPN power switch handles a
400mA current with a voltage drop of
just 240mV.
Unlike competing devices, the
LT1307 does not require large electrolytic capacitors. Its high frequency
(675kHz) switching allows the use of
tiny surface mount multilayer ceramic
(MLC) capacitors and small surface
mount inductors. It works with just
10µF of output capacitance and requires only 1µF of input bypassing.
The LT1307 is available in the
SO-8 package.
For further information on the
above or any of the other devices
mentioned in this issue of Linear
Technology, use the reader service
card or call the LTC literature service number: 1-800-4-LINEAR. Ask
for the pertinent data sheets and
application notes.
Burst Mode, Bits-to-Nits and C-Load are
trademarks of Linear Technology Corporation.
, LTC and LT are registered trademarks
used only to identify products of Linear Technology Corp. Other product names may be
trademarks of the companies that manufacture the products.
Information furnished by Linear
Technology Corporation is believed to be
accurate and reliable. However, Linear
Technology makes no representation that
the circuits described herein will not infringe
on existing patent rights.
27
DESIGN TOOLS
Applications on Disk
NOISE DISK
This IBM-PC (or compatible) progam allows the user to calculate circuit noise
using LTC op amps, determine the best LTC op amp for a low noise application,
display the noise data for LTC op amps, calculate resistor noise, and calculate
noise using specs for any op amp.
Available at no charge.
SPICE MACROMODEL DISK
This IBM-PC (or compatible) high density diskette contains the library of LTC
op amp SPICE macromodels. The models can be used with any version of
SPICE for general analog circuit simulations. The diskette also contains
working circuit examples using the models, and a demonstration copy of
PSPICETM by MicroSim.
Available at no charge.
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This catalog covers a broad range of “real world” linear circuitry. In addition to
detailed, systems-oriented circuits, this handbook contains broad tutorial
content together with liberal use of schematics and scope photography.
A special feature in this edition includes a 22 page section on SPICE
macromodels.
$20.00
1993 Linear Applications Handbook • Volume II — Continues the stream
of “real world” linear circuitry initiated by the 1990 Handbook. Similar in scope
to the 1990 edition, the new book covers Application Notes 41 through 54 and
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$20.00
Interface Product Handbook — This 424 page handbook features LTC’s
complete line of line driver and receiver products for RS232, RS485,
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Available at no charge.
SwitcherCAD Handbook — This 144 page manual, including disk, guides
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design and optimization of switching regulators. The program can cut days off
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specifying component values and manufacturer's part numbers.
$20.00
1995 Power Solutions Brochure, First Edition — This 64 page collection
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Tokyo, 162 Japan
Phone: 81-3-3267-7891
FAX: 81-3-3267-8510
KOREA
Linear Technology Korea Co., Ltd
Namsong Building, #403
Itaewon-Dong 260-199
Yongsan-Ku, Seoul 140-200
Korea
Phone: 82-2-792-1617
FAX: 82-2-792-1619
SINGAPORE
Linear Technology Pte. Ltd.
507 Yishun Industrial Park A
Singapore 2776
Phone: 65-753-2692
FAX: 65-754-4113
TAIWAN
Linear Technology Corporation
Rm. 602, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
UNITED KINGDOM
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Phone: 44-1276-677676
FAX: 44-1276-64851
Linear Technology Corporation
15375 Barranca Parkway
Suite A-211
Irvine, CA 92718
Phone: (714) 453-4650
FAX: (714) 453-4765
LINEAR TECHNOLOGY CORPORATION
1630 McCarthy Boulevard
Milpitas, CA 95035-7417
(408) 432-1900
For Literature Only: 1-800-4-LINEAR
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1995 Linear Technology Corporation/ Printed in U.S.A./32K
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