F2MC-8FX FAMILY EVALUATION BOARD MB2146-401 OPERATION MANUA...

The following document contains information on Cypress products.
FUJITSU SEMICONDUCTOR
SUPPORT SYSTEM
SS01-26001-1E
F2MC-8FX Family
EVALUATION BOARD
MB2146-401
OPERATION MANUAL
PREFACE
Thank you for purchasing the evaluation board (Part number:MB2146-401) for the F2MC *1 -8FX
family.
The MB 2146-401 is a development support tool for developing and evaluating applied products
based on the F2MC-8FX*2 family of the 8-bit microcontroller manufactured by Fujitsu.
This manual is intended for engineers who use the MB2146-401(hereafter called the evaluation
board)to develop applied products based on Fujitsu F2MC-8FX family of the 8-bit microcontroller.
The manual describes how to handle the evaluation board and its function and setting procedures.
Be sure to read it before using the evaluation board.
Consult the Sales representatives or the Support representatives of Fujitsu Limited for mass-produced MCUs and evaluation MCUs.
*1 : F2MC is the abbreviation used for FUJITSU Flexible Microcontroller.
*2 : Henceforth, Evaluation MCU is called.
■ Using the product Safety
This manual contains important information required for using the MB2146-401 safely. Be sure to
read through the manual before using the product and follow the instructions contained therein to use
it correctly.
In particular, carefully read "Caution of the products described in this document" at the beginning of
this manual to understand the requirements for safe use of the product before using it.
After reading the manual, keep it handy for future reference.
■ Warranty and Liability Disclaimers
The specifications of the product are subject to change without notice.
In no event shall Fujitsu be liable for any loss or damages whatsoever directly or indirectly arising
out of the use of the product.
■ Product Operating Environment
Use the product at an operating temperature between 5 °C to 35 °C and at an operating humidity between 20 % to 80%. Avoid using it in a hot or humid environment and prevent condensation.
The product is a frameless PC board unit with all electronic components exposed. Therefore, neither
put anything on the product nor touch or let an electrically charged material contact a metal part of
it. Once the product has been powered, try to keep those objects away from it which can short-circuit
it or easily catch fire and burn. Use the product as horizontal as possible and avoid operating it at a
place exposed to strong vibration, dust, or explosive gas.
Note that using the product not in the above operating environment may unexpectedly cause personal
injury to the user (or another person if present near the product) or physical damage to properties
around the product.
You should also keep the packaging materials used for shipping the product. They work well as they
are when you transport the product again, for example, if it becomes out of order and needs to be
repaired.
■ Caution of the products described in this document
The following precautions apply to the product described in this manual.
WARNING
Indicates a potentially hazardous situation which, if not avoided appropriately,
could result in death or serious injury and/or a fault in the user’s system.
Electric shock,
Damage
Before performing any operation described in this manual, turn off all the power
supplies to the system. Performing such an operation with the power on may
cause an electric shock or device fault.
Electric shock,
Damage
Once the product has been turned on, do not touch any metal part of it.
Doing so may cause an electric shock or device fault.
i
■ Caution of the products described in this document
The following precautions apply to the product described in this manual.
CAUTION
Indicates a potentially hazardous situation which, if not avoided appropriately, may
result in minor or moderate injury and/or damage to the product or the equipment
to which the product is connected, to software resources such as data, or to other
properties.
Cuts, Damage
Before moving the product, be sure to turn off all the power supplies and unplug the
cables. Watch your steps when carrying the product. Do not use the product at an
unstable location such as a place exposed to strong vibration or a sloping surface.
Doing so may let the product fall, resulting in an injury or fault.
Cuts
The product has some sharp-pointed or edged parts inevitably exposed, such as
jumper plugs. Use meticulous care in handling the product not to get injured with
such pointed parts.
Damage
Neither put anything on or apply shock to the product. Once the product has been
powered, do not carry it. Doing either may cause a fault due to a load or shock.
Damage
Since the product contains many electronic components, keep it away from direct
sunlight, high temperature, and high humidity to prevent condensation. Do not use
or store the product where it is exposed to much dust or a strong magnetic or electric field for an extended period of time.
An adverse operating or storage environment can cause a fault.
Damage
Use the product within the ranges of its general specifications.
Operating it outside the range of any general specification may cause a fault.
Damage
To prevent electrostatic breakdown, do not let your finger or an object touch any
metal part of the connector. Before handling the product, touch a metal object (such
as a door knob) to discharge static electricity from your body.
Damage
When turning the power on or off, follow the relevant procedure described in this
document. Before turning the power on, in particular, be sure to finish making all the
required connections. To set up and use the product, follow the instructions given
in this document.
Using the product incorrectly or inappropriately may cause a fault.
Damage
Before plugging or unplugging any cable for this product, be sure to turn the power
supply off. When unplugging the cable, remove it while holding the connector without pulling the cable itself. Pulling the cable itself or bending it may expose or disconnect the cable core, resulting in a fault.
Damage
Although the MCU socket is structured not to accept an evaluation MCU in a wrong
orientation or position, pay due attention to the mounting orientation when mounting
the evaluation MCU. Forcing the evaluation MCU to be inserted in a wrong orientation can damage the pins of the evaluation MCU and the accidental insertion prevention mechanism of the socket, resulting in a fault.
Damage
When stored, the product should be kept in its packaging box as it has no housing.
Re-transporting the product may damage it to cause a fault. Keep the packaging
materials used for shipment of the product and use them when re-transporting it.
ii
• The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales representatives before ordering.
• The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU semiconductor device; FUJITSU
does not warrant proper operation of the device with respect to use based on such information. When you develop
equipment incorporating the device based on such information, you must assume any responsibility arising out of such
use of the information. FUJITSU assumes no liability for any damages whatsoever arising out of the use of the information.
• Any information in this document, including descriptions of function and schematic diagrams, shall not be construed
as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right
of FUJITSU or any third party or does FUJITSU warrant non-infringement of any third-party’s intellectual property
right or other right by using such information. FUJITSU assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
• The products described in this document are designed, developed and manufactured as contemplated for general use,
including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not
designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless
extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal
injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air
traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2)
for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU will not be liable against you and/or any third party for any claims or damages arising in
connection with above-mentioned uses of the products.
• Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.
• If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be
required for export of those products from Japan.
©2004 FUJITSU LIMITED Printed in Japan
iii
1. Product outline
This product is a development support tool for performing the development and evaluation of an application product which used F2MC-8FX family *2 of Fujitsu 8 bit microcontroller.
By connecting the MCU board (Part number : MB 2146-3xx) on which evaluation MCU was mounted, it is the evaluation board which enables verification of the evaluation MCU before user systems
development of operation, and development evaluation of a firmware (This board is called henceforth).
To build an F2MC-8FX family evaluation enviroment,combine three products : This board, MCU
board and BGM adapter (Part number : MB2146-09) .
BGM adapter
(MB2146-09) *
MCU board
(MB2146-3xx) *
MB2146-09
Host computer
USB Cable
(Appended to MB2146-09)
Evaluation MCU
Built in
Evaluation board
(MB2146-401)
* : Option (Sold separetery)
Figure. 1 System configuration figure
■ Product composition
The product composition of this board is shown in Table 1, and an option (sold separately) is shown
in Table 2.
Table 1 Product composition
Name
Part number
Description
2
F MC-8FX Evaluation
board
MB2146-401
Evaluation MCU not built in
AC adapter
(Denshi Tsusho.co)
3A-211DA-05
Input power supply : AC100 V-240 V,
50/60 Hz
Output power supply : DC5V 4A
Remarks
⎯
Include
Table 2 Option(Sold separately)
Name
MCU board
Part number
Description
MB2146-3xx
MB95FV100-xxx built in
Remarks
F2MC-8FX *
* : Please refer to a data sheet and a hardware manual about Evaluation MCU.
1
■ Appearance and part name
The name and dimensions of the appearance of this board and each part are shown.
150 mm
SW1
TP8
TP7
TP6
TP5
TP4
TP3
LED17
JP3
10
U7
JP7 JP6 JP5
221
SW2
1
2
CN5
CN1
JP2
1
H1
CN3
1
111
L1
JP8
2
JP1
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED9
LED10
LED11
LED12
LED13
LED14
LED15
LED16
CN2
1
PJ1
119
120
119
120
230
1.6 mm
1
2
39
40
CN4
7.5 mm
1
11
100 mm
TP2
JP4
U1
Rubber leg
TP2 - TP8
JP1/JP2
JP3/JP4
JP5
JP6
JP7
JP8
CN1/CN2
CN3
CN4
CN5
LED1 - LED16
LED17
U1
U7
SW1
SW2
PJ1
L1
H1
: External power supply input terminal
: LED connection change jumper plug
: 5 V/3.3 V power supply selection jumper plug
: AVCC VCC supply jumper plug
: AVR VCC supply jumper plug
: AVSS - VSS connection jumper plug
: MOD selecter jumper plug
: MCU board I/F connector
: C pin socket
: For extension I/F connector
: Incorrect insertion prevention socket
: LED port
: POWER LED (The light is switched on by VCC power supply supply.)
: Evaluation MCU all the through holes for a terminal check
: Series regulator (5 V -> 3.3 V)
: Reset switch (This board/Evaluation MCU reset)
: AC adapter power supply switch
: AC adapter pin jack
: AC adapter side coil
: AC adapter side poly switch
Figure. 2 Functional name and dimensions
2
2. Checking the Delivered Product
Before using the Evaluation board,confirm that the following components are included in the box:
• Evaluation board
:1
• AC adaputer *
:1
• Operation manual (Japanese, English (this manual) )
: 1 (part each)
* : 3A-211DA-05 (Denshi Tsusho Co., LTD)
3. Connecting
■ Attachment of a MCU board / AC adapter
Please connect CN1/CN2 of the connection of a MCU board with this board, and this board, and
CN1/CN2 of a MCU board.Since the incorrect insertion prevention socket of two pins is mounted in
this board and the MCU board by each, please become a diagonal position (refer to Figure 3) .
The power supply of this board has the method of supplying from attached AC adapter, and the method of supplying from the terminal for an external power supply input.Please connect AC adapter to
PJ1 of this board the case where a power supply is supplied, from AC adapter (refer to Figure 4) .
When you supply from the terminal for an external power supply input, please refer to "4. Board setup/function ■Power supply from the external power supply input terminal".
Note : Please do not use AC adapter except accessories.
MCU board
CN2
CN5
CN1
Evaluation board
CN2
CN5
CN1
Figure. 3 MCU board connection
3
RESET
LVSS LVCC AVSS AVR AVCC VSS
SW1
TP8
TP7
TP5
TP4
VCC POWER
TP3
TP2
POWER
10
+5V
JP7 JP6 JP5
H1
JP8
CAP.
CN3
SW2
1
CN1
2
CN5
Evaluation
MCU
POWER-SW
PJ1
119
120
120
119
230
221
U7
JP3
JP4
MOD
1
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED9
LED10
LED11
LED12
LED13
LED14
LED15
LED16
2
JP2
1
P00C
P01C
P02C
P03C
P04C
P05C
P06C
P07C
P60
P61
P62
P63
P64
P65
P66
P67
CN2
JP1
1
111
LED17
+3.3V
AVSS AVR AVCC
U1
1
11
TP6
1
2
39
40
CN4
MCU board
AC adapter
Figure. 4 AC adapter connection
■ Note on use
Be careful of the following thing the time of using this board.
• Please do not use AC adapter except accessories.
• When you supply a power supply from AC adapter, terminals TP2 (VCC) and TP3 (VSS) for
an external power supply input should presuppose that it is open,and should not supply an external power supply.
• Terminal for an external power supply input When you supply a power supply from TP2
(VCC) and TP3 (VSS), please set SW2 (AC adapter power supply switch) to OFF by setting
5 V/3.3 V power supply selection jumper plug (JP3/JP4) as opening,and use AC adpter side
power supply supply, separating it completely
• Be sure to use 5 V/3.3 V power supply selection jumper plug (JP3/JP4) by the same setup.
When a different setup is performed, 5 V power supply and 3.3 V power supply may shortcircuit, and it may become the cause of incorrect operation.
4
4. Board setup/function
■ Power supply from AC adapter
When supplying the power supply from AC adapter, TP2 (VCC) and TP3 (VSS) of the terminal for
an external power supply input should presuppose that it is open of it. Moreover, they must not supply an external power supply.
■ Power supply from the external power supply input terminal
The details in the case of supplying a power supply from the terminal of an external power supply
input (TP2-TP8) are shown in Table 3.
When you supply the power supply from the terminals TP2 (VCC) and TP3 (VSS) for an external
power supply input, please set the jumper plug (JP3/JP4) of the power supply selection of 5V/3.3V
to opening, set SW2 (AC adapter power supply switch) to OFF, separate it completely, and use AC
adapter side power supply supply.
Table 3 Terminal for external power supply input
Position
Description
TP2
VCC Power supply supply terminal
TP3
VSS Power supply supply terminal
TP4
AVCC Power supply supply terminal
TP5
AVR Power supply supply terminal
TP6
AVSS Power supply supply terminal
TP7
LVCC Power supply supply terminal
TP8
LVSS Power supply supply terminal
■ LED port selection
It is decided whether a light emitting diode connection change jumper plug (JP1/JP2) connects the
light emitting diode port on this board to each port of the evaluation MCU carried on the MCU board,
or it does not carry out.
When using a Light Emitting Diode port,an attached jumper plug is connected to this board. A jumper plug is not connected when not using a light emitting diode port.
About the switch of the state of the terminal of the evaluation MCU port corresponding to each light
emitting diode, lighting is deleted on L level. Moreover, lighting has H level given.
Correspondence of a Light Emitting Diode port is shown in Table 4.
Table 4 Correspondence of LED port
Position
Evaluation MCU port Light Emitting Diode port
JP1/JP2
Terminal
JP1
1-2
P00C
LED1
JP1
3-4
P01C
LED2
JP1
5-6
P02C
LED3
JP1
7-8
P03C
LED4
JP1
9 - 10
P04C
LED5
JP1
11 - 12
P05C
LED6
JP1
13 - 14
P06C
LED7
JP1
15 - 16
P07C
LED8
JP2
1-2
P60
LED9
JP2
3-4
P61
LED10
JP2
5-6
P62
LED11
JP2
7-8
P63
LED12
JP2
9 - 10
P64
LED13
JP2
11 - 12
P65
LED14
JP2
13 - 14
P66
LED15
JP2
15 - 16
P67
LED16
5
■ Selection of 5 V/3.3 V power supply
The details of a setup of 5 V/3.3 V power supply jumper plug selection (JP3/JP4) are shown in Table
5. When you supply the power supply from the external power supply input terminals TP2 (VCC)
and TP3 (VSS), please open the power supply selection jumper plug (JP3/JP4) of 5 V/3.3 V.
Note : Be sure to give a setup of JP3/JP4 as the same. When a different setup is performed,
the power supply which is 5 V/3.3 V short-circuits, and has a possibility of becoming
the cause of the operation which is not right, or failure.
Table 5 5 V/3.3 V power supply selection jumper plug
VCC Power supply suply origin
Supply voltage
AC adapter
Setup
JP3
JP4
+ 3.3 V
3-2
3-2
AC adapter
+ 5.0 V
1-2
1-2
External power supply input terminal
+ 3.3 V
Open
Open
External power supply input terminal
+ 5.0 V
Open
Open
■ How to supply VCC of this board to the AVCC terminal of evaluation MCU
When you supply VCC of this board to the analog power supply terminal (AVCC) of Evaluation
MCU built in the MCU board,please connect an attachied jumper plug to this board at an AVCC VCC supply jumper plug (JP5). However, when you supply the AVCC power supply from an external power supply input terminal (AVCC), please give as open.
■ How to supply VCC of this board to the AVR terminal of evaluation MCU
When you supply VCC of this board to the analog standard voltage terminal (AVR) of Evaluation
MCU built in the MCU board,please connect an attachied jumper plug to this board at an AVR -VCC
supply jumper plug (JP6). However, when you supply the AVR standard voltage from an external
power supply input terminal (AVR), please give as open.
■ How to supply VCC of this board to the AVCC terminal and AVR terminal of evaluation MCU
When you supply VCC of this board to the analog power supply terminal (AVCC) and analog standard voltage terminal (AVR) of Evaluation MCU built in the MCU board,please connect an attachied
jumper plug to this board at an AVSS - VSS connection jumper plug (JP7). However, when you supply an AVCC power supply from the terminal (AVCC) for an external power supply input, or when
you supply AVR standard voltage from the terminal (AVR) for an external power supply input, be
sure to give as open.
■ Selection of the supply level to the MOD terminal of evaluation MCU
The supply level to the mode terminal (MOD) of Evaluation MCU carried in the MCU board is chosen with an MOD selection jumper plug (JP8). Details are shown in Table 6. Be referred to as "short"
of a jumper plug, and give an MOD terminal state as an "L level".
Table 6 MOD selection jumper plug
Jumper plug
MOD terminal state
Open
H Level
Short
L Level
Remarks
VCC pull-up : Prohibition of a setup
VSS
■ Connection of the capacitor between the Cpin terminal and the VSS terminal of evaluation MCU
Between the Cpin terminal of the evaluation MCU built on the MCU board, and a VSS terminal,
when you connect a capacitor, please mount the capacitor to the socket for C terminals (CN3).
• Mounting capacitor : 2.54 mm Pitch Lead type
6
■ Reset of this board and evaluation MCU
By pushing a reset switch (SW1), a RSTX signal (L) is outputted and this board and Evaluation
MCU are reset.
■ POWER LED (LED17)
It is not concerned with AC adapter power supply supply and the terminal for an external power supply input, but the light is switched on when a VCC power supply is supplied..
■ Series regulator 5V -> 3.3V (U7)
+3.3 V power supply is generated from +5 V power supply supplied from AC adapter.
• Rating current : 3A (max.)
7
5. Specification
■ General specification
The general specification of this board is shown in Table 7.
Table 7 General specification
Item
Description
Operating/storage temperature
5 °C to 35 °C (at operating) , 0 °C to 70 °C (at storage)
Operating/storage humidity
20 % to 80 % (at operating) , 20 % to 80 % (at storage)
Dimensions
About 100 mm × 150 mm × 20 mm
Weight
This board : about 90 g
AC adapter : about 190 g
■ Functional block diagram
A functional block diagram is shown in Figure. 5.
5V/3.3V POWER SELECT
JUMPER PLUG
POWER
LED
VCC
VSS
AVCC
AVR
AVSS
LVCC
LVSS
EXTERNAL POWER SUPPLY
INPUT PIN
REGULATER
3.3V
5V
EVALUATION MCU ALL PIN CHECK
THROUGH HOLE
AVSS VSS
VSS
Cpin
Cpin
M OD SELECTOR
C-pin SOCKET
MOD
MOD
LED PORT
VSS
LED CHANGE JUMPER PLUG
Others Pin
Others Pin
for EXTENSION I/F CONNECTOR
RSTX
RSTX
RESET CIRCUIT
RESET SWITCH
Figure. 5 Functional block diagram
8
AC ADAPTER
POWER SWITCH
AVC C VC C
AV R VC C
MCU BOARD I/F CONNECTOR
VCC
AVCC
AVR
AVSS
LVCC
LVSS
VCC
AVCC
AVR
AVSS
LVCC
LVSS
AC ADAPTER
PIN JACK
■ Main component material
The main component material of this board is shown in Table 8.
Table 8 Main component material
Item
Part number
Description
Manufacture
Input power supply : AC100 V - 240 V,
50/60 Hz
output power supply : DC5 V, 4 A
Plug : Outer diameter = φ 5.5 mm,
Denshi Tsusyo Co.
Inner diameter = φ 2.1 mm,
Plug length = 9.5 mm
Center plus
AC adapter
3A-211DA-05
AC adapter pin jack
The above-mentioned AC adapter corHoshiden.co
HEC0470-01-630 respondence
Rating current 3 A
AC adapter side coil
CDRH125-100NC
10 µH
Rating current 4 A
Sumida.co
AC adapter side poly switch
RGE500
Preserve current 5 A/25 °C
Raychem
MCU board I/F connector
WR-120SB-VF-1
120pins 0.5 mm pitch 2piece
Connector (straight) × 2
JAE
I/F connector for extension
XG4C-4034
40pins 2.54 mm pitch 2piece
Connector (light angle)
OMRON
C pin socket
IC26-2010-GS4
2pins 2.54 mm pitch 1piece
Socket (straight) It cuts into two pins.
YAMAICHI
ELECTORONICS
Incorrect insertion prevention socket PCW-3-1-1PW
2pins 2.54 mm pitch 1piece
Socket (straight)
MAC EIGHT
5V/3.3V power supply selectionjumper plug
XJ8B-0311
3 × 1pin terminal block
Rating current 2 A × 2 (total 4 A)
OMRON
AVCC VCC supply jumper plug
XJ8B-0211
2 × 1pin terminal block
Rating current 2 A
OMRON
AVR VCC supply jumper plug
XJ8B-0211
2 × 1pin terminal block
Rating current 2 A
OMRON
AVSS - VSS supply jumper plug
XJ8B-0211
2 × 1pin terminal block
Rating current 2 A
OMRON
LED connection change jumper plug XJ8C-1611
2 × 8 pin terminal block
Rating current 2 A × 2
OMRON
Terminal block jumper plug
2 × 1pin jumper plug
Rating current 2 A × 21
OMRON
External power supply input terminal ST-2-1
Test point terminal × 7
H = 4.5 mm
MAC EIGHT
AC adapter power supply switch
CW-SB21KKGH
Locker switch
Rating current 4 A
Nihon Kaiheiki
Ind.Co.,LTD
Reset switch
JB-15HFBP2
Tactile switch
Nihon Kaiheiki
Ind.Co.,LTD
Series regulator
LT1085CM
5V -> 3.3V, 3 A max.
Linear technology
TLSU1002A
LEDPOWER (led) × 1
TOSHIBA
TLGU1002A
LED port (green) × 16
TOSHIBA
LED
XJ8A-0211
9
■ MCU board I/F connector (CN1/CN2/CN5)
CN5 is the incorrect insertion prevention socket of a MCU board.
CN1/CN2 are a MCU board I/F connector.The pin assignment of CN1 is shown in Table 9, and the
pin assignment of CN2 is shown in Table 10.
Table 9 Pin assignment of MCU board I/F connector CN1
Connector
Pin
Number
10
Evaluation
Connector Evaluation
MCU
Signal name
Pin
MCU
Signal name
Pin No.
Number
Pin No.
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal name
1
A9
PC4
41
E2
LVR3
81
P3
BSOUT
2
B9
PC1
42
E1
LVSS
82
P4
BDBMX
3
C9
PC2
43
F4
LVDREXT
83
R1
P83
4
D9
PC3
44
F3
LVDBGR
84
R2
BRSTX
5
A8
PC0
45
F2
LVDENX
85
R3
X0A
6
B8
PB4
46
F1
P22A
86
R4
RSTX
7
C8
PB5
47
−
GND
87
T1
ROMS1
8
D8
PB6
48
−
GND
88
T2
BSIN
9
A7
PB7
49
G4
P20A
89
T3
Vss
10
B7
PB2
50
G3
NC1
90
T4
X0
11
C7
PB0
51
G2
P21A
91
U1
BEXCK
12
D7
PB1
52
G1
P23A
92
U2
X1
13
A6
PB3
53
H4
P24A
93
U3
MOD
14
B6
PA2
54
H3
P25A
94
U4
PF2
15
C6
P95
55
H2
P26A
95
V1
X1A
16
D6
PA0
56
H1
P27A
96
V2
Vcc53
17
A5
PA3
57
J4
P24B
97
−
GND
18
B5
P94
58
J3
P50
98
−
GND
19
C5
P90
59
J2
P23B
99
V3
PINT0
20
D5
P91
60
J1
P51
100
V4
PSEL_EXT
21
A4
PA1
61
K1
P52
101
R5
PF1
22
A3
P93
62
K2
P55
102
T5
PF0
23
−
GND
63
K3
P54
103
U5
NC2
24
−
GND
64
K4
P53
104
V5
PENABLE
25
A2
CSVENX
65
L1
P70
105
R6
APBENX
26
A1
Vss
66
L2
P74
106
T6
PINT1
27
B4
P92
67
L3
P73
107
U6
PCLK
28
B3
TCLK
68
L4
P72
108
V6
PADDR0
29
B2
LVCC
69
M1
P71
109
R7
PACTIVE
30
B1
LVDIN
70
M2
P76
110
T7
PLOCK
31
C4
Cpin
71
M3
P80
111
U7
PWRITE
32
C3
Vcc51
72
M4
P77
112
V7
PADDR1
33
C2
LVDENX2
73
−
GND
113
R8
PADDR2
34
C1
LVR4
74
−
GND
114
T8
PADDR3
35
D4
TESTO
75
N1
P75
115
U8
PADDR4
36
D3
LVDOUT
76
N2
P82
116
V8
PADDR5
37
D2
LVR2
77
N3
PG0
117
R9
PADDR7
38
D1
BGOENX
78
N4
P84
118
T9
PRDATA0
39
E4
LVR1
79
P1
P81
119
U9
PADDR6
40
E3
LVR0
80
P2
ROMS0
120
V9
PRDATA1
Table 10 Pin assignment of MCU board I/F connector CN2
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal name
Connector
Pin
Number
Evaluation
Connector
MCU
Signal name
Pin
Pin No.
Number
Evaluation
MCU
Pin No.
Signal name
1
A10
PC5
41
E17
NC4
81
P16
P34
2
B10
PD0
42
E18
SEL0
82
P15
P35
3
C10
PC6
43
F15
SEL3
83
R18
P44
4
D10
PC7
44
F16
SEL4
84
R17
P36
5
A11
PD1
45
F17
SEL1
85
R16
P31
6
B11
PD2
46
F18
P04C
86
R15
AVcc3
7
C11
PD3
47
−
GND
87
T18
P40
8
D11
PD4
48
−
GND
88
T17
P32
9
A12
PD5
49
G15
P06C
89
T16
AVss
10
B12
PD7
50
G16
P07C
90
T15
AVR
11
C12
P61
51
G17
P05C
91
U18
P33
12
D12
P60
52
G18
P00C
92
U17
P30
13
A13
PD6
53
H15
P01C
93
U16
AVR3
14
B13
P64
54
H16
P02C
94
U15
P15
15
C13
P66
55
H17
P03C
95
V18
AVcc
16
D13
P65
56
H18
P07A
96
V17
DA0
17
A14
P62
57
J15
P04A
97
−
GND
18
B14
PE0A
58
J16
P05A
98
−
GND
19
C14
PE3A
59
J17
P06A
99
V16
P14
20
D14
PE2A
60
J18
P03A
100
V15
P10
21
A15
P63
61
K18
P02A
101
R14
P16
22
A16
P67
62
K17
P07B
102
T14
DA1
23
−
GND
63
K16
P01A
103
U14
P13
24
−
GND
64
K15
P00A
104
V14
PWDATA7
25
A17
PE4A
65
L18
P06B
105
R13
P11
26
A18
Vcc54
66
L17
P05B
106
T13
P12
27
B15
PE1A
67
L16
P04B
107
U13
NC3
28
B16
PE5A
68
L15
P03B
108
V13
PWDATA3
29
B17
PE7A
69
M18
P02B
109
R12
PWDATA5
30
B18
PE3B
70
M17
P00B
110
T12
PWDATA6
31
C15
PE6A
71
M16
P46
111
U12
PWDATA4
32
C16
Vss
72
M15
P47
112
V12
PRDATA7
33
C17
PE2B
73
−
GND
113
R11
PWDATA0
34
C18
PE7B
74
−
GND
114
T11
PWDATA1
35
D15
PE1B
75
N18
P01B
115
U11
PWDATA2
36
D16
PE0B
76
N17
P43
116
V11
PRDATA6
37
D17
PE6B
77
N16
P41
117
R10
PRDATA3
38
D18
SEL2
78
N15
P42
118
T10
PRDATA4
39
E15
PE5B
79
P18
P45
119
U10
PRDATA5
40
E16
PE4B
80
P17
P37
120
V10
PRDATA2
11
■ The I/F connector for extension (CN4)
The pin assignment of the I/F connector for extension is shown in Table 11. Table 12 lists recommended connectors.
Table 11 I/F connector for extension
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal name
Connector
Pin Number
Evaluation
MCU
Pin No.
Signal name
1
−
VCC
21
T9
PRDATA0
2
−
VCC
22
V9
PRDATA1
3
R4
RSTX
23
V10
PRDATA2
4
V3
PINT0
24
R10
PRDATA3
5
T6
PINT1
25
T10
PRDATA4
6
R6
APBENX
26
U10
PRDATA5
7
U6
PCLK
27
V11
PRDATA6
8
V4
PSEL_EXT
28
V12
PRDATA7
9
V5
PENABLE
29
R11
PWDATA0
10
T7
PLOCK
30
T11
PWDATA1
11
R7
PACTIVE
31
U11
PWDATA2
12
U7
PWRITE
32
V13
PWDATA3
13
V6
PADDR0
33
U12
PWDATA4
14
V7
PADDR1
34
R12
PWDATA5
15
R8
PADDR2
35
T12
PWDATA6
16
T8
PADDR3
36
V14
PWDATA7
17
U8
PADDR4
37
−
VSS
18
V8
PADDR5
38
−
VSS
19
U9
PADDR6
39
−
N.C
20
R9
PADDR7
40
−
N.C
Table 12 Recommended connector
Part number
12
Specifications
Manufacture
XG4M-4030-U
MIL-type strain relief (with lock)
OMRON
XG4M-4030-T
MIL-type strain relief
OMRON
XG5M-4032-N
Discrete-wire IDC connector 2-row socket
OMRON
XG5M-4035-N
Discrete-wire IDC connector 2-row socket
OMRON
■ Through evaluation MCU all hole for a terminal check (U1)
The pin assignment of a through evaluation MCU all hole for a terminal check is shown in Table 13.
Table 13 Pin assignment of through evaluation MCU all hole for terminal check (continued)
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal name
Connector Evaluation
Connector Evaluation
Pin
MCU
Signal name
Pin
MCU
Signal name
Number
Pin No.
Number
Pin No.
1
C3
Vcc51
41
M3
P80
81
U9
PADDR6
2
B2
LVCC
42
P1
P81
82
R9
PADDR7
3
D3
LVDOUT
43
N2
P82
83
T9
PRDATA0
4
C2
LVDENX2
44
R1
P83
84
V9
PRDATA1
5
B1
LVDIN
45
N4
P84
85
V10
PRDATA2
6
E3
LVR0
46
N3
PG0
86
R10
PRDATA3
7
E4
LVR1
47
P2
ROMS0
87
T10
PRDATA4
8
D2
LVR2
48
T1
ROMS1
88
U10
PRDATA5
9
E2
LVR3
49
R2
BRSTX
89
V11
PRDATA6
10
C1
LVR4
50
P4
BDBMX
90
V12
PRDATA7
11
F3
LVDBGR
51
P3
BSOUT
91
R11
PWDATA0
12
F4
LVDREXT
52
U1
BEXCK
92
T11
PWDATA1
13
F2
LVDENX
53
T2
BSIN
93
U11
PWDATA2
14
D1
BGOENX
54
R4
RSTX
94
V13
PWDATA3
15
E1
LVSS
55
R3
X0A
95
U12
PWDATA4
16
G3
NC1
56
V1
X1A
96
R12
PWDATA5
17
G4
P20A
57
A1
Vss_1
97
T12
PWDATA6
18
G2
P21A
58
U2
X1
98
V14
PWDATA7
19
F1
P22A
59
T4
X0
99
U13
NC3
20
G1
P23A
60
U3
MOD
100
V15
P10
21
H4
P24A
61
V2
Vcc53
101
R13
P11
22
H3
P25A
62
T5
PF0
102
T13
P12
23
H2
P26A
63
R5
PF1
103
U14
P13
24
H1
P27A
64
U4
PF2
104
V16
P14
25
J2
P23B
65
U5
NC2
105
U15
P15
26
J4
P24B
66
V3
PINT0
106
R14
P16
27
J3
P50
67
T6
PINT1
107
T14
DA1
28
J1
P51
68
R6
APBENX
108
V17
DA0
29
K1
P52
69
U6
PCLK
109
U16
AVR3
30
K4
P53
70
V4
PSEL_EXT
110
R15
AVcc3
31
K3
P54
71
V5
PENABLE
111
T15
AVR
32
K2
P55
72
T7
PLOCK
112
V18
AVcc
33
L1
P70
73
R7
PACTIVE
113
T16
AVss
34
M1
P71
74
U7
PWRITE
114
U17
P30
35
L4
P72
75
V6
PADDR0
115
R16
P31
36
L3
P73
76
V7
PADDR1
116
T17
P32
37
L2
P74
77
R8
PADDR2
117
U18
P33
38
N1
P75
78
T8
PADDR3
118
P16
P34
39
M2
P76
79
U8
PADDR4
119
P15
P35
40
M4
P77
80
V8
PADDR5
120
R17
P36
13
Table 13 Pin assignment of through evaluation MCU all hole for terminal check(continue)
Connector Evaluation
Connector
Pin
MCU
Signal name
Pin
Number
Pin No.
Number
14
Evaluation
MCU
Signal name
Pin No.
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal name
121
P17
P37
161
D17
PE6B
201
A8
PC0
122
T18
P40
162
E15
PE5B
202
A7
PB7
123
N16
P41
163
E16
PE4B
203
D8
PB6
124
N15
P42
164
B18
PE3B
204
C8
PB5
125
N17
P43
165
C17
PE2B
205
B8
PB4
126
R18
P44
166
D15
PE1B
206
A6
PB3
127
P18
P45
167
D16
PE0B
207
B7
PB2
128
M16
P46
168
A18
Vcc54
208
D7
PB1
129
M15
P47
169
T3
Vss_2
209
C7
PB0
130
M17
P00B
170
B17
PE7A
210
A5
PA3
131
N18
P01B
171
C15
PE6A
211
B6
PA2
132
M18
P02B
172
B16
PE5A
212
A4
PA1
133
L15
P03B
173
A17
PE4A
213
D6
PA0
134
L16
P04B
174
C14
PE3A
214
C6
P95
135
L17
P05B
175
D14
PE2A
215
B5
P94
136
L18
P06B
176
B15
PE1A
216
A3
P93
137
K17
P07B
177
B14
PE0A
217
B4
P92
138
K15
P00A
178
A16
P67
218
D5
P91
139
K16
P01A
179
C13
P66
219
C5
P90
140
K18
P02A
180
D13
P65
220
A2
CSVENX
141
J18
P03A
181
B13
P64
221
B3
TCLK
142
J15
P04A
182
A15
P63
222
D4
TESTO
143
J16
P05A
183
A14
P62
223
C4
Cpin
144
J17
P06A
184
C12
P61
224
C16
Vss
145
H18
P07A
185
D12
P60
225
−
VSS
146
G18
P00C
186
B12
PD7
226
−
VSS
147
H15
P01C
187
A13
PD6
227
−
VCC
148
H16
P02C
188
A12
PD5
228
−
VCC
149
H17
P03C
189
D11
PD4
229
−
N.C
150
F18
P04C
190
C11
PD3
230
−
N.C
151
G17
P05C
191
B11
PD2
152
G15
P06C
192
A11
PD1
153
G16
P07C
193
B10
PD0
154
E18
SEL0
194
D10
PC7
155
F17
SEL1
195
C10
PC6
156
D18
SEL2
196
A10
PC5
157
F15
SEL3
197
A9
PC4
158
F16
SEL4
198
D9
PC3
159
E17
NC4
199
C9
PC2
160
C18
PE7B
200
B9
PC1
■ Product selection correspondence evaluation MCU all the terminal for a terminal check
The terminal position of a through evaluation MCU all hole for a terminal check is shown in Table
24 from Table 14 for every setup of the product selection switch on a MCU board.
Table 14 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 100-pin-LCD-less selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
Vss
−
−
41
P46
AN14
128
81
PD5
−
188
2
PG0
(Cpin)
46
42
P47
AN15
129
82
PD6
−
187
3
P00
INT00/HC00
146
43
P20
PPG00
17
83
PD7
−
186
4
P01
INT01/HC01
147
44
P21
PPG01
18
84
PE0
INT10
167
5
P02
INT02/HC02
148
45
P22
TO00
19
85
PE1
INT11
166
6
P03
INT03/HC03
149
46
P23
TO01
20
86
PE2
INT12
165
7
P04
INT04/HC04
150
47
P24
EC0
21
87
PE3
INT13
164
8
P05
INT05/HC05
151
48
RSTX
FTEST
54
88
PE4
INT14
163
9
P06
INT06/HC06
152
49
X0A
PG1
55
89
PE5
INT15
162
10
P07
INT07/HC07
153
50
X1A
PG2
56
90
PE6
INT16
161
11
P10
UI0
100
51
Vss
−
−
91
PE7
INT17
160
12
P11
UO0
101
52
X1
−
58
92
P60
PPG10
185
13
P12
UCK0
102
53
X0
−
59
93
P61
PPG11
184
14
P13
TRG0/ADTG
103
54
MOD
−
60
94
P62
TO10
183
15
P14
PPG0
104
55
P25
PPG2
22
95
P63
TO11
182
16
P15
−
105
56
P26
TRG2
23
96
P64
EC1
181
17
P16
−
106
57
P27
−
24
97
P65
SCK
180
18
P50
SCL0
27
58
P70
TO0
33
98
P66
SOT
179
19
P51
SDA0
28
59
P71
TI0
34
99
P67
SIN
178
20
P52
PPG1
29
60
P72
SCL1
35
100
Vcc
−
−
21
P53
TRG1
30
61
P73
SDA1
36
22
P54
TO1
31
62
P74
−
37
23
P55
TI1
32
63
P75
UCK1
38
24
AVR
−
111
64
P76
UO1
39
25
AVcc
−
112
65
P77
UI1
40
26
AVss
−
113
66
P80
−
41
27
P30
AN00
114
67
P81
−
42
28
P31
AN01
115
68
P82
−
43
29
P32
AN02
116
69
P83
−
44
30
P33
AN03
117
70
P84
−
45
31
P34
AN04
118
71
PA0
−
213
32
P35
AN05
119
72
PA1
−
212
33
P36
AN06
120
73
PA2
−
211
34
P37
AN07
121
74
PA3
−
210
35
P40
AN08
122
75
PD0
−
193
36
P41
AN09
123
76
Vcc
−
−
37
P42
AN10
124
77
PD1
−
192
38
P43
AN11
125
78
PD2
−
191
39
P44
AN12
126
79
PD3
−
190
40
P45
AN13
127
80
PD4
−
189
15
Table 15 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of selection with 100pin LCD (U1)
No.
Port
Function
1
Vss
−
−
2
PG0
(Cpin)
3
P00
4
16
U1 No. No.
Port
Function
U1 No.
No.
Port
Function U1 No.
41
P71
TI0
34
81
PC0
S08
201
46
42
P67
S39/SIN
178
82
PB7
S07
202
INT00/HC00
146
43
P66
S38/SOT
179
83
PB6
S06
203
P01
INT01/HC01
147
44
P65
S37/SCK
180
84
PB5
S05
204
5
P02
INT02/HC02
148
45
P64
S36/EC1
181
85
PB4
S04
205
6
P03
INT03/HC03
149
46
P63
S35/TO11
182
86
PB3
S03
206
7
P04
INT04/HC04
150
47
P62
S34/TO10
183
87
PB2
S02
207
8
P05
INT05/HC05
151
48
RSTX
FTEST
54
88
PB1
S01
208
9
P06
INT06/HC06
152
49
X0A
−
55
89
PB0
S00
209
10
P07
INT07/HC07
153
50
X1A
−
56
90
PA3
COM3
210
11
P10
UI0
100
51
Vss
−
−
91
PA2
COM2
211
12
P11
UO0
101
52
X1
−
58
92
PA1
COM1
212
13
P12
UCK0
102
53
X0
−
59
93
PA0
COM0
213
14
P13
TRG0/ADTG
103
54
MOD
−
60
94
P95
C1
214
15
P14
PPG0
104
55
P61
S33/PPG11
184
95
P94
C0
215
16
P20
PPG00
17
56
P60
S32/PPG10
185
96
P93
V0
216
17
P21
PPG01
18
57
PE7
S31/INT13
170
97
P92
V1
217
18
P22
TO00
19
58
PE6
S30/INT12
171
98
P91
V2
218
19
P23
TO01
20
59
PE5
S29/INT11
172
99
P90
V3
219
20
P24
EC0
21
60
PE4
S28/INT10
173
100
Vcc
−
−
21
P50
SCL0
27
61
PE3
S27
174
22
P51
SDA0
28
62
PE2
S26
175
23
P52
PPG1
29
63
PE1
S25
176
24
AVR
−
111
64
PE0
S24
177
25
AVcc
−
112
65
PD7
S23
186
26
AVss
−
113
66
PD6
S22
187
27
P30
AN00
114
67
PD5
S21
188
28
P31
AN01
115
68
PD4
S20
189
29
P32
AN02
116
69
PD3
S19
190
30
P33
AN03
117
70
PD2
S18
191
31
P34
AN04
118
71
PD1
S17
192
32
P35
AN05
119
72
PD0
S16
193
33
P36
AN06
120
73
PC7
S15
194
34
P37
AN07
121
74
PC6
S14
195
35
P40
AN08
122
75
PC5
S13
196
36
P41
AN09
123
76
Vcc
−
−
37
P42
AN10
124
77
PC4
S12
197
38
P43
AN11
125
78
PC3
S11
198
39
P53
TRG1
30
79
PC2
S10
199
40
P70
TO0
33
80
PC1
S09
200
Table 16 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 80-pin-LCD-less selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
AVcc
−
112
41
P22
TO00
19
2
AVR
−
111
42
P23
TO01
20
3
P74
−
37
43
P24
EC0
21
4
P75
UCK1
38
44
P25
PPG2
22
5
P76
UO1
39
45
P26
TRG2
23
6
P77
UI1
40
46
P50
SCL0
27
7
P81
−
41
47
P51
SDA0
28
8
P80
−
42
48
P52
PPG1
29
9
PE7
INT17
160
49
P53
TRG1
30
10
PE6
INT16
161
50
P54
TO1
31
11
PE5
INT15
162
51
P55
TI1
32
12
PE4
INT14
163
52
P60
PPG10
185
13
PE3
INT13
164
53
P61
PPG11
184
14
PE2
INT12
165
54
P62
TO10
183
15
PE1
INT11
166
55
P63
TO11
182
16
PE0
INT10
167
56
P64
EC1
181
17
MOD
−
60
57
P65
SCK
180
18
X0
−
59
58
P66
SOT
179
19
X1
−
58
59
P67
SIN
178
20
Vss
−
−
60
P70
TO0
33
21
Vcc
−
−
61
P71
TI0
34
22
PG0
(Cpin)
46
62
P72
SCL1
35
23
X1A
PG2
56
63
P73
SDA1
36
24
X0A
PG1
55
64
P47
AN15
129
25
RSTX
FTEST
54
65
P46
AN14
128
26
P00
INT00/HC00
146
66
P45
AN13
127
27
P01
INT01/HC01
147
67
P44
AN12
126
28
P02
INT02/HC02
148
68
P43
AN11
125
29
P03
INT03/HC03
149
69
P42
AN10
124
30
P04
INT04/HC04
150
70
P41
AN09
123
31
P05
INT05/HC05
151
71
P40
AN08
122
32
P06
INT06/HC06
152
72
P37
AN07
121
33
P07
INT07/HC07
153
73
P36
AN06
120
34
P10
UI0
100
74
P35
AN05
119
35
P11
UO0
101
75
P34
AN04
118
36
P12
UCK0
102
76
P33
AN03
117
37
P13
TRG0/ADTG
103
77
P32
AN02
116
38
P14
PPG0
104
78
P31
AN01
115
39
P20
PPG00
17
79
P30
AN00
114
40
P21
PPG01
18
80
AVss
−
113
17
Table 17 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of selection with 80pin LCD (U1)
18
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
AVcc
−
112
41
PB5
S05
204
2
AVR
−
111
42
PB6
S06
203
3
P14
PPG0
104
43
PB7
S07
202
4
P13
TRG0/ADTG
103
44
PC0
S08
201
5
P12
UCK0
102
45
PC1
S09
200
6
P11
UO0
101
46
PC2
S10
199
7
P10
UI0
100
47
PC3
S11
198
8
P24
EC0
21
48
PC4
S12
197
9
P23
TO01
20
49
PC5
S13
196
10
P22
TO00
19
50
PC6
S14
195
11
P21
PPG01
18
51
PC7
S15
194
12
P20
PPG00
17
52
P60
S16/PPG10
185
13
P53
TRG1
30
53
P61
S17/PPG11
184
14
P52
PPG1
29
54
P62
S18/TO10
183
15
P51
SDA0
28
55
P63
S19/TO11
182
16
P50
SCL0
27
56
P64
S20/EC1
181
17
MOD
−
60
57
P65
S21/SCK
180
18
X0
−
59
58
P66
S22/SOT
179
19
X1
−
58
59
P67
S23/SIN
178
20
Vss
−
−
60
PE0
S24
177
21
Vcc
−
−
61
PE1
S25
176
22
PG0
(Cpin)
46
62
PE2
S26
175
23
X1A
−
56
63
PE3
S27
174
24
X0A
−
55
64
PE4
S28/INT10
173
25
RSTX
FTEST
54
65
PE5
S29/INT11
172
26
P90
V3
219
66
PE6
S30/INT12
171
27
P91
V2
218
67
PE7
S31/INT13
170
28
P92
V1
217
68
P43
AN11
125
29
P93
V0
216
69
P42
AN10
124
30
P94
C0
215
70
P41
AN09
123
31
P95
C1
214
71
P40
AN08
122
32
PA0
COM0
213
72
P07
INT07/AN07
137
33
PA1
COM1
212
73
P06
INT06/AN06
136
34
PA2
COM2
211
74
P05
INT05/AN05
135
35
PA3
COM3
210
75
P04
INT04/AN04
134
36
PB0
S00
209
76
P03
INT03/AN03
133
37
PB1
S01
208
77
P02
INT02/AN02
132
38
PB2
S02
207
78
P01
INT01/AN01
131
39
PB3
S03
206
79
P00
INT00/AN00
130
40
PB4
S04
205
80
AVss
−
113
Table 18 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 64-pin-LCD-less selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
AVcc
−
112
33
P13
TRG0/ADTG
103
2
AVR
−
111
34
P14
PPG0
104
3
PE3
INT13
164
35
P20
PPG00
17
4
PE2
INT12
165
36
P21
PPG01
18
5
PE1
INT11
166
37
P22
TO00
19
6
PE0
INT10
167
38
P23
TO01
20
7
P83
−
44
39
P24
EC0
21
8
P82
−
43
40
P50
SCL0
27
9
P81
−
42
41
P51
SDA0
28
10
P80
−
41
42
P52
PPG1
29
11
P71
TI0
34
43
P53
TRG1
30
12
P70
TO0
33
44
P60
PPG10
185
13
MOD
−
60
45
P61
PPG11
184
14
X0
−
59
46
P62
TO10
183
15
X1
−
58
47
P63
TO11
182
16
Vss
−
−
48
P64
EC1
181
17
Vcc
−
−
49
P65
SCK
180
18
PG0
(Cpin)
46
50
P66
SOT
179
19
X1A
PG2
56
51
P67
SIN
178
20
X0A
PG1
55
52
P43
AN11
125
21
RSTX
FTEST
54
53
P42
AN10
124
22
P00
INT00/HC00
146
54
P41
AN09
123
23
P01
INT01/HC01
147
55
P40
AN08
122
24
P02
INT02/HC02
148
56
P37
AN07
121
25
P03
INT03/HC03
149
57
P36
AN06
120
26
P04
INT04/HC04
150
58
P35
AN05
119
27
P05
INT05/HC05
151
59
P34
AN04
118
28
P06
INT06/HC06
152
60
P33
AN03
117
29
P07
INT07/HC07
153
61
P32
AN02
116
30
P10
UI0
100
62
P31
AN01
115
31
P11
UO0
101
63
P30
AN00
114
32
P12
UCK0
102
64
AVss
−
113
19
Table 19 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of selection with 64pin LCD (U1)
20
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
AVcc
−
112
33
PB1
S01
208
2
AVR
−
111
34
PB2
S02
207
3
P14
PPG0
104
35
PB3
S03
206
4
P13
TRG0/ADTG
103
36
PB4
S04
205
5
P12
UCK0
102
37
PB5
S05
204
6
P11
UO0
101
38
PB6
S06
203
7
P10
UI0
100
39
PB7
S07
202
8
P24
EC0/SDA0
26
40
PC0
S08
201
9
P23
TO01/SCL0
25
41
PC1
S09
200
10
P22
TO00
19
42
PC2
S10
199
11
P21
PPG01
18
43
PC3
S11
198
12
P20
PPG00
17
44
PC4
S12
197
13
MOD
−
60
45
PC5
S13
196
14
X0
−
59
46
PC6
S14
195
15
X1
−
58
47
PC7
S15
194
16
Vss
−
−
48
P60
S16/PPG10
185
17
Vcc
−
−
49
P61
S17/PPG11
184
18
PG0
(Cpin)
46
50
P62
S18/TO10
183
19
X1A
−
56
51
P63
S19/TO11
182
20
X0A
−
55
52
P64
S20/EC1
181
21
RSTX
FTEST
54
53
P65
S21/SCK
180
22
P90
V3
219
54
P66
S22/SOT
179
23
P91
V2
218
55
P67
S23/SIN
178
24
P92
V1
217
56
P07
INT07/AN07/S24
145
25
P93
V0
216
57
P06
INT06/AN06/S25
144
26
P94
C0
215
58
P05
INT05/AN05/S26
143
27
P95
C1
214
59
P04
INT04/AN04/S27
142
28
PA0
COM0
213
60
P03
INT03/AN03/S28
141
29
PA1
COM1
212
61
P02
INT02/AN02/S29
140
30
PA2
COM2
211
62
P01
INT01/AN01/S30
139
31
PA3
COM3
210
63
P00
INT00/AN00/S31
138
32
PB0
S00
209
64
AVss
−
113
Table 20 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 48-pin-LCD-less selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
P65
SCK
180
25
Vcc
−
−
2
P66
SOT
179
26
PG0
(Cpin)
46
3
P67
SIN
178
27
X1A
PG2
56
4
P37
AN07
121
28
X0A
PG1
55
5
P36
AN06
120
29
RSTX
FTEST
54
6
P35
AN05
119
30
P00
INT00/HC00
146
7
P34
AN04
118
31
P01
INT01/HC01
147
8
P33
AN03
117
32
P02
INT02/HC02
148
9
P32
AN02
116
33
P03
INT03/HC03
149
10
P31
AN01
115
34
P04
INT04/HC04
150
11
P30
AN00
114
35
P05
INT05/HC05
151
12
AVss
−
113
36
P06
INT06/HC06
152
13
AVcc
−
112
37
P07
INT07/HC07
153
14
P24
EC0
21
38
P10
UI0
100
15
P23
TO01
20
39
P11
UO0
101
16
P22
TO00
19
40
P12
UCK0
102
17
P21
PPG01
18
41
P13
TRG0/ADTG
103
18
P20
PPG00
17
42
P14
PPG0
104
19
P51
SDA0
28
43
P15
−
105
20
P50
SCL0
27
44
P60
PPG10
185
21
MOD
−
60
45
P61
PPG11
184
22
X0
−
59
46
P62
TO10
183
23
X1
−
58
47
P63
TO11
182
24
Vss
−
−
48
P64
EC1
181
21
Table 21 Correspondence terminal position of through evaluation MCU all
hole for terminal check at time of selection with 48pin LCD (U1)
22
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
P61
S09/PPG11
184
25
Vcc
−
−
2
P62
S10/TO10
183
26
PG0
(Cpin)
46
3
P63
S11/TO11
182
27
X1A
−
56
4
P64
S12/EC1
181
28
X0A
−
55
5
P65
S13/SCK
180
29
RSTX
FTEST
54
6
P66
S14/SOT
179
30
P90
V3
219
7
P67
S15/SIN
178
31
P91
V2
218
8
P14
PPG0
104
32
P92
V1
217
9
P13
TRG0/ADTG
103
33
P93
V0
216
10
P12
UCK0
102
34
P94
C0
215
11
P11
UO0
101
35
P95
C1
214
12
P10
UI0
100
36
PA0
COM0
213
13
P07
INT07/AN07
137
37
PA1
COM1
212
14
P06
INT06/AN06
136
38
PA2
COM2
211
15
P05
INT05/AN05
135
39
PA3
COM3
210
16
P04
INT04/AN04
134
40
PB0
S00
209
17
P03
INT03/AN03
133
41
PB1
S01
208
18
P02
INT02/AN02
132
42
PB2
S02
207
19
P01
INT01/AN01
131
43
PB3
S03/PPG00
206
20
P00
INT00/AN00
130
44
PB4
S04/PPG01
205
21
MOD
−
60
45
PB5
S05/TO00
204
22
X0
−
59
46
PB6
S06/TO01
203
23
X1
−
58
47
PB7
S07/EC0
202
24
Vss
−
−
48
P60
S08/PPG10
185
Table 22 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 32pin selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
P64
EC1
181
17
PF2
HC12
64
2
P63
TO11
182
18
AVcc
−
112
3
P62
TO10
183
19
AVss
−
113
4
P61
PPG11
184
20
P00
INT00/AN00/PPG00
130
5
MOD
−
60
21
P01
INT01/AN01/PPG01
131
6
X0
−
59
22
P02
INT02/AN02/SCK
132
7
X1
−
58
23
P03
INT03/AN03/SOT
133
8
Vss
−
−
24
P04
INT04/AN04/SIN
134
9
Vcc
−
−
25
P05
INT05/AN05/TO00
135
10
PG0
(Cpin)
46
26
P06
INT06/AN06/TO01
136
11
X1A
PG2
56
27
P07
INT07/AN07
137
12
X0A
PG1
55
28
P10
UI0
100
13
RSTX
FTEST
54
29
P11
UO0
101
14
P60
PPG10
185
30
P12
UCK0/EC0
102
15
PF0
HC10
62
31
P13
TRG0/ADTG
103
16
PF1
HC11
63
32
P14
PPG0
104
Table 23 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 28pin selection (U1)
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
P16
−
106
15
P00
INT00/AN00/PPG00
130
2
PF0
HC10
62
16
P01
INT01/AN01/PPG01
131
3
PF1
HC11
63
17
P02
INT02/AN02/SCK
132
4
MOD
−
60
18
P03
INT03/AN03/SOT
133
5
X0
−
59
19
P04
INT04/AN04/SIN
134
6
X1
−
58
20
P05
INT05/AN05/TO00
135
7
Vss
−
−
21
P06
INT06/AN06/TO01
136
8
Vcc
−
−
22
P07
INT07/AN07
137
9
PG0
(Cpin)
46
23
P10
UI0
100
10
X1A
PG2
56
24
P11
UO0
101
11
X0A
PG1
55
25
P12
UCK0/EC0
102
12
RSTX
FTEST
54
26
P13
TRG0/ADTG
103
13
AVcc
−
112
27
P14
PPG0
104
14
AVss
−
113
28
P15
−
105
23
Table 24 Correspondence terminal position of through evaluation MCU all hole
for terminal check at time of 20pin selection (U1)
24
No.
Port
Function
U1 No.
No.
Port
Function
U1 No.
1
RSTX
FTEST
54
11
P11
UO0
101
2
MOD
−
60
12
P10
UI0
100
3
X0
−
59
13
P07
INT07/AN07
137
4
X1
−
58
14
P06
INT06/AN06/TO01
136
5
Vss
−
−
15
P05
INT05/AN05/TO00
135
6
Vcc
−
−
16
P04
INT04/AN04/SIN
134
7
PG0
(Cpin)
46
17
P03
INT03/AN03/SOT
133
8
P14
PPG0
104
18
P02
INT02/AN02/SCK
132
9
P13
TRG0/ADTG
103
19
P01
INT01/AN01/PPG01
131
10
P12
UCK0/EC0
102
20
P00
INT00/AN00/PPG00
130
[2,3] P R D A T A [ 7 : 0 ]
[2] D A 1
[2,3] P W D A T A [ 7 : 0 ]
[2] P1[6:0]
[2] D A 0
[2,4] A V R
[2] A V c c 3
[2] P3[7:0]
[2] P4[7:0]
[2] P0B[7:0]
[2] P0A[7:0]
[2,3] P0C[7:0]
[2] SEL[4:0]
[2] PEB[7:0]
[2] PEA[7:0]
[2,3] P6[7:0]
[2] PD[7:0]
[2] PC[7:0]
VCC
PWDATA7
P12
PWDATA3
PWDATA6
PRDATA7
PWDATA1
PRDATA6
PRDATA4
PRDATA2
P10
P30
P15
P32
P43
P42
P37
P35
P36
P0C7
P0C0
P0C2
P0A7
P0A5
P0A3
P0B7
P0A0
P0B5
P0B3
P0B0
P47
PEB7
PEB0
SEL2
PEB4
SEL0
SEL4
P0C4
PEA5
PEB3
PD0
PC7
PD2
PD4
PD7
P60
P64
P65
PEA0
PEA2
P67
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
WR-120SB-VF-1
PD0
PC7
PD2
PD4
PD7
P60
P64
P65
PE0A
PE2A
P67
GND_2
Vcc54
PE5A
PE3B
Vss
PE7B
PE0B
SEL2
PE4B
SEL0
SEL4
P04C
GND_4
P07C
P00C
P02C
P07A
P05A
CONNECTOR
P03A
P07B
P00A
P05B
P03B
P00B
P47
GND_6
P43
P42
P37
P35
P36
AVcc3
P32
AVR
P30
P15
DA0
GND_8
P10
DA1
PWDATA7
P12
PWDATA3
PWDATA6
PRDATA7
PWDATA1
PRDATA6
PRDATA4
PRDATA2
CN2
PC5
PC6
PD1
PD3
PD5
P61
PD6
P66
P62
PE3A
P63
GND_1
PE4A
PE1A
PE7A
PE6A
PE2B
PE1B
PE6B
PE5B
NC4
SEL3
SEL1
GND_3
P06C
P05C
P01C
P03C
P04A
B
P06A
P02A
P01A
P06B
P04B
P02B
P46
GND_5
P01B
P41
P45
P34
P44
P31
P40
AVss
P33
AVR3
AVcc
GND_7
P14
P16
P13
P11
NC3
PWDATA5
PWDATA4
PWDATA0
PWDATA2
PRDATA3
PRDATA5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
PWDATA5
PWDATA4
PWDATA0
PWDATA2
PRDATA3
PRDATA5
P14
P16
P13
P11
P33
P0B1
P41
P45
P34
P44
P31
P40
P0C6
P0C5
P0C1
P0C3
P0A4
P0A6
P0A2
P0A1
P0B6
P0B4
P0B2
P46
SEL3
SEL1
PEA4
PEA1
PEA7
PEA6
PEB2
PEB1
PEB6
PEB5
PC5
PC6
PD1
PD3
PD5
P61
PD6
P66
P62
PEA3
P63
P R D A T A [ 7 : 0 ] [2,3]
N C 3 [2]
P W D A T A [ 7 : 0 ] [2,3]
P1[6:0] [2]
A V R 3 [2]
A V c c [2,4]
A V s s [2,4]
P3[7:0] [2]
P4[7:0] [2]
P0B[7:0] [2]
P0A[7:0] [2]
[2,3] P R D A T A [ 7 : 0 ]
[2,3] P E N A B L E
[2,3] P I N T 1
[2,3] P A D D R [ 7 : 0 ]
[2,3] P L O C K
[2,3] P S E L _ E X T
[2] R O M S 0
[2] B D B M X
[2] B R S T X
[2,3] R S T X
[2] B S I N
[2] X 0
[2] X 1
[2] PF[2:0]
[2] P8[4:0]
[2] P7[7:0]
[2] P5[5:0]
[2] N C 1
[2,4] L V S S
[2] L V D B G R
[2] P2A[7:0]
N C 4 [2]
SEL[4:0] [2]
P0C[7:0] [2,3]
[2] LVR[4:0]
[2] L V D O U T
[2] B G O E N X
[2] T C L K
[2] L V D I N
[2] P9[5:0]
PEB[7:0] [2]
PEA[7:0] [2]
[2] PA[3:0]
[2] PB[7:0]
PD[7:0] [2]
P6[7:0] [2,3]
[2] PC[7:0]
PC[7:0] [2]
VCC
WR-120SB-VF-1
PC4
PC1
PC2
PC3
PC0
PB4
PB5
PB6
PB7
PB2
PB0
PB1
PB3
PA2
P95
PA0
PA3
P94
P90
P91
PA1
P93
GND_1
GND_2
CSVENX
Vss_1
P92
TCLK
LVCC
LVDIN
Cpin
Vcc51
LVDENX2
LVR4
TESTO
LVDOUT
LVR2
BGOENX
LVR1
LVR0
LVR3
LVSS
LVDREXT
LVDBGR
LVDENX
P22A
GND_3
GND_4
P20A
NC1
P21A
P23A
P24A
P25A
P26A
P27A
P24B
P50
P23B
P51
CONNECTOR A
P52
P55
P54
P53
P70
P74
P73
P72
P71
P76
P80
P77
GND_5
GND_6
P75
P82
PG0
P84
P81
ROMS0
BSOUT
BDBMX
P83
BRSTX
X0A
RSTX
ROMS1
BSIN
Vss_2
X0
BEXCK
X1
MOD
PF2
X1A
Vcc53
GND_7
GND_8
PINT0
PSEL_EXT
PF1
PF0
NC2
PENABLE
APBENX
PINT1
PCLK
PADDR0
PACTIVE
PLOCK
PWRITE
PADDR1
PADDR2
PADDR3
PADDR4
PADDR5
PADDR7
PRDATA0
PADDR6
PRDATA1
CN1
2
PCW-3-1-1PW
1
CN5
Incorrect insertion preventive measures
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
JP8
2
XJ8B-0211
1
JP Name display
[MOD]
PADDR2
PADDR4
PADDR7
PADDR6
PF1
P83
P81
P75
P2A0
P2A1
P2A4
P2A6
P2B4
P2B3
P52
P54
P70
P73
P71
P80
LVR2
LVR1
LVR3
P92
PC4
PC2
PC0
PB5
PB7
PB0
PB3
P95
PA3
P90
PA1
1
4.7K
R8
Rev.
Zone
Date
By
DR.
H.Hojo
CH.
H.Hojo
APR.
-
Sect.
ITF-SUWA
Sect.
ITF-SUWA
Date.
2004-02-03
2
VCC
RD1-TCO3Y9BD
Document Number
1
Page
/4
P I N T 0 [2,3]
PF[2:0] [2]
N C 2 [2]
A P B E N X [2,3]
P C L K [2,3]
P A C T I V E [2,3]
P W R I T E [2,3]
P A D D R [ 7 : 0 ] [2,3]
B E X C K [2]
M O D [2]
X 1 A [2]
X 0 A [2]
R O M S 1 [2]
B S O U T [2]
P G 0 [2]
P8[4:0] [2]
P7[7:0] [2]
P5[5:0] [2]
P2B[4:3] [2]
P2A[7:0] [2]
L V D R E X T [2]
L V D E N X [2]
L V C C [2,4]
C p i n [2]
L V D E N X 2 [2]
T E S T O [2]
LVR[4:0] [2]
C S V E N X [2]
PA[3:0] [2]
P9[5:0] [2]
PB[7:0] [2]
PC[7:0] [2]
F2MC-8FX Standard evaluation Board Assy
Title
F2MC-8FX ADAPTER BOARD INTERFACE
PADDR1
PADDR3
PADDR5
PRDATA0
PRDATA1
PADDR0
PF0
PF2
P82
P84
P2A3
P2A5
P2A7
P50
P51
P55
P53
P74
P72
P76
P77
P2A2
LVR0
LVR4
PC1
PC3
PB4
PB6
PB2
PB1
PA2
PA0
P94
P91
P93
1
2
CAP-SOCKET
IC26-2010-GS4(2pin)
1
2
CN3
[Cap.]
CN name silk display
■ Circuit diagram
25
5
225
1
221
230
10
LVDBGR
LVDREXT
LVDENX
BGOENX
LVSS
NC1
P2A[7:0]
[1]
[1]
[1]
[1]
[1,4]
[1]
[1]
PG0
ROMS0
ROMS1
BRSTX
BDBMX
BSOUT
BEXCK
BSIN
RSTX
X0A
X1A
PINT1
APBENX
PCLK
PSEL_EXT
PENABLE
PLOCK
PACTIVE
PWRITE
[1] D A 1
[1] D A 0
[1] P1[6:0]
[1] N C 3
[1,3] PADDR[7:0]
[1,3] PRDATA[7:0]
[1,3] P W D A T A [ 7 : 0 ]
[1,3]
[1,3]
[1,3]
[1,3]
[1,3]
[1,3]
[1,3]
[1,3]
[1] N C 2
[1,3] PINT0
[1] X1
[1] X0
[1] M O D
[1] PF[2:0]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1,3]
[1]
[1]
[1] P8[4:0]
[1] P7[7:0]
[1] P5[5:0]
[1] P2B[4:3]
LVCC
LVDOUT
LVDENX2
LVDIN
LVR[4:0]
[1,4]
[1]
[1]
[1]
[1]
A pin number is silk-displayed every five pins.
φ1.0 Through hole
U1: 2.54mm pitch 10×23 total 230pin
[1] C S V E N X
[1] T C L K
[1] T E S T O
[1] Cpin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
F2MC-8FX_EVA_10x23
Vcc_1
LVCC
LVDOUT
LVDENX2
LVDIN
LVR0
LVR1
LVR2
LVR3
LVR4
LVDBGR
LVDREXT
LVDENX
BGOENX
LVSS
NC1
P20A
P21A
P22A
P23A
P24A
P25A
P26A
P27A
P23B
P24B
P50
P51
P52
P53
P54
P55
P70
P71
P72
P73
P74
P75
P76
P77
P80
P81
P82
P83
P84
PG0
ROMS0
ROMS1
BRSTX
BDBMX
BSOUT
BEXCK
BSIN
RSTX
X0A
X1A
Vss_1
X1
X0
MOD
Vcc_2
PF0
PF1
PF2
NC2
PINT0
U1
F2MC-8FXEVA CHIP ALL TERMINAL CHECK THROUGH HOLE
PF0
PF1
PF2
P2A0
P2A1
P2A2
P2A3
P2A4
P2A5
P2A6
P2A7
P2B3
P2B4
P50
P51
P52
P53
P54
P55
P70
P71
P72
P73
P74
P75
P76
P77
P80
P81
P82
P83
P84
LVR0
LVR1
LVR2
LVR3
LVR4
VCC
PADDR0
PADDR1
PADDR2
PADDR3
PADDR4
PADDR5
PADDR6
PADDR7
PRDATA0
PRDATA1
PRDATA2
PRDATA3
PRDATA4
PRDATA5
PRDATA6
PRDATA7
PWDATA0
PWDATA1
PWDATA2
PWDATA3
PWDATA4
PWDATA5
PWDATA6
PWDATA7
[1] P9[5:0]
P10
P11
P12
P13
P14
P15
P16
[1] PA[3:0]
P90
P91
P92
P93
P94
P95
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
P60
P61
P62
P63
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
NC6
NC5
Vcc_5
Vcc_4
Vss_5
Vss_4
Vss_3
Cpin
TESTO
TCLK
CSVENX
P90
P91
P92
P93
P94
P95
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
P60
P61
P62
P63
PINT1
APBENX
PCLK
PSEL_EXT
PENABLE
PLOCK
PACTIVE
PWRITE
PADDR[0]
PADDR[1]
PADDR[2]
PADDR[3]
PADDR[4]
PADDR[5]
PADDR[6]
PADDR[7]
PRDATA[0]
PRDATA[1]
PRDATA[2]
PRDATA[3]
PRDATA[4]
PRDATA[5]
PRDATA[6]
PRDATA[7]
PWDATA[0]
PWDATA[1]
PWDATA[2]
PWDATA[3]
PWDATA[4]
PWDATA[5]
PWDATA[6]
PWDATA[7]
NC3
P10
P11
P12
P13
P14
P15
P16
DA1
DA0
AVR3
AVcc3
AVR
AVcc
AVss
P30
P31
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
Rev.
P30
P31
26
Zone
Date
P64
P65
P66
P67
PE0A
PE1A
PE2A
PE3A
PE4A
PE5A
PE6A
PE7A
Vss_2
Vcc_3
PE0B
PE1B
PE2B
PE3B
PE4B
PE5B
PE6B
PE7B
NC4
SEL4
SEL3
SEL2
SEL1
SEL0
P07C
P06C
P05C
P04C
P03C
P02C
P01C
P00C
P07A
P06A
P05A
P04A
P03A
P02A
P01A
P00A
P07B
P06B
P05B
P04B
P03B
P02B
P01B
P00B
P47
P46
P45
P44
P43
P42
P41
P40
P37
P36
P35
P34
P33
P32
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
By
DR.
H.Hojo
CH.
H.Hojo
APR.
-
SEL4
SEL3
SEL2
SEL1
SEL0
P0C7
P0C6
P0C5
P0C4
P0C3
P0C2
P0C1
P0C0
P0A7
P0A6
P0A5
P0A4
P0A3
P0A2
P0A1
P0A0
P0B7
P0B6
P0B5
P0B4
P0B3
P0B2
P0B1
P0B0
P47
P46
P45
P44
P43
P42
P41
P40
P37
P36
P35
P34
P33
P32
PEB0
PEB1
PEB2
PEB3
PEB4
PEB5
PEB6
PEB7
P64
P65
P66
P67
PEA0
PEA1
PEA2
PEA3
PEA4
PEA5
PEA6
PEA7
Sect.
ITF-SUWA
ITF-SUWA
Date.
2004-02-03
Sect.
[1,3]
RD1-TCO3Y9BD
Document Number
2
Page
/4
F2MC-8FX Standard evaluation Board Assy
Title
A V s s [1,4]
A V c c [1,4]
A V R [1,4]
A V c c 3 [1]
A V R 3 [1]
P3[7:0] [1]
P4[7:0] [1]
P0B[7:0] [1]
P0A[7:0] [1]
P0C[7:0]
N C 4 [1]
SEL[4:0] [1]
PEB[7:0] [1]
PEA[7:0] [1]
P6[7:0] [1,3]
PD[7:0] [1]
PC[7:0] [1]
PB[7:0] [1]
[1,2] P6[7:0]
[1,2] P 0 C [ 7 : 0 ]
[1,2] P W D A T A [ 7 : 0 ]
[1,2] P R D A T A [ 7 : 0 ]
P60
P61
P62
P63
P64
P65
P66
P67
P0C0
P0C1
P0C2
P0C3
P0C4
P0C5
P0C6
P0C7
JP2
XJ8C-1611
1
3
5
7
9
11
13
15
XJ8C-1611
1
3
5
7
9
11
13
15
JP1
PADDR0
PADDR2
PADDR4
PADDR6
PRDATA0
PRDATA2
PRDATA4
PRDATA6
PWDATA0
PWDATA2
PWDATA4
PWDATA6
10K
RA8
2
4
6
8
10
12
14
16
10K
RA7
10K
RA4
2
4
6
8
10
12
14
16
10K
RA3
1
19
2
4
6
8
11
13
15
17
1
19
2
4
6
8
11
13
15
17
XG4C-4034
Vcc_1
RSTX
PINT1
PCLK
PENABLE
PACTIVE
PADDR[0]
PADDR[2]
PADDR[4]
PADDR[6]
PRDATA[0]
PRDATA[2]
PRDATA[4]
PRDATA[6]
PWDATA[0]
PWDATA[2]
PWDATA[4]
PWDATA[6]
Vss_1
NC_1
2
VCC
GND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
0.1uF
C5
U6
2
VCC
GND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
0.1uF
C7
TC74VHC240F
1G
2G
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1
TC74VHC240F
1G
2G
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
U5
1
Vcc_2
PINT0
APBENX
PSEL_EXT
PLOCK
PWRITE
PADDR[1]
PADDR[3]
PADDR[5]
PADDR[7]
PRDATA[1]
PRDATA[3]
PRDATA[5]
PRDATA[7]
PWDATA[1]
PWDATA[3]
PWDATA[5]
PWDATA[7]
Vss_2
NC_2
20
10
18
16
14
12
9
7
5
3
20
10
18
16
14
12
9
7
5
3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VCC
VCC
VCC
VCC
PADDR1
PADDR3
PADDR5
PADDR7
PRDATA1
PRDATA3
PRDATA5
PRDATA7
PWDATA1
PWDATA3
PWDATA5
PWDATA7
VCC
TLGU1002A
LED9
470
RA5
TLGU1002A
LED1
RA1
470
TLGU1002A
LED10
TLGU1002A
LED2
TLGU1002A
LED11
TLGU1002A
LED3
LED Name silk display
P W D A T A [ 7 : 0 ] [1,2]
P R D A T A [ 7 : 0 ] [1,2]
P I N T 0 [1,2]
A P B E N X [1,2]
P S E L _ E X T [1,2]
P L O C K [1,2]
P W R I T E [1,2]
P A D D R [ 7 : 0 ] [1,2]
3
4
A 2
TLGU1002A
LED12
10K
R1
1
VCC
R3
Unmounting
VCC
TLGU1002A
LED4
JB-15HFBP2
1
2
SW1
[RESET]
A 2
1
2
1
2
CN4
VCC
TLGU1002A
LED13
470
RA6
TLGU1002A
LED5
470
RA2
C1
0.1uF
TL7700CPS
VS VCC
CT
VSS
R
TLGU1002A
LED14
TLGU1002A
LED6
TLGU1002A
LED15
TLGU1002A
LED7
LED Name Silk display
C3
0.1uF
2
1
4
U2
8
5
C4
0.1uF
4.7K
R2
TLGU1002A
LED16
TLGU1002A
LED8
VCC
VCC
1
2
TLSU1002A
LED17
470
R5
TC74VHC14F
U3A
VCC
K
A 2
3
VCC
C6
0.1uF
4
TC74VHC14F
U3B
VCC
5
9
11
13
6
8
10
12
TC74VHC14F
U3F
TC74VHC14F
U3E
TC74VHC14F
U3D
TC74VHC14F
U3C
R S T X [1,2]
Rev.
Zone
Date
By
DR.
H.Hojo
CH.
H.Hojo
APR.
-
Sect.
ITF-SUWA
Sect.
ITF-SUWA
Date.
2004-02-03
RD1-TCO3Y9BD
Document Number
F2MC-8FX Standard evaluation Board Assy
Title
3
Page
/4
F2MC-8FX FOR EXTENSION INTERFACE/LED/RSTX CONTROL
C2
0.1uF
TP1
TEST_PIN
1
2
[1,2] P I N T 1
[1,2] P C L K
[1,2] P E N A B L E
[1,2] P A C T I V E
[1,2] P A D D R [ 7 : 0 ]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
2
1
2
name silk display
1
2
SW
[POWER]
EX_RSTX
VCC
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
[P00C]
[P60]
A 2
8
7
6
5
1
2
3
4
A 2
K
1
8
7
6
5
1
2
3
4
A 2
K
1
[P01C]
[P61]
K
1
A 2
K
1
[P02C]
[P62]
K
1
A 2
K
1
[P03C]
[P63]
K
1
A 2
K
1
[P04C]
[P64]
A 2
K
1
A 2
K
A 2
2
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
1
[P05C]
[P65]
A 2
K
1
A 2
K
1
[P06C]
[P66]
K
1
A 2
K
1
[P07C]
[P67]
K
1
A 2
K
1
14
7
14
7
1
2
2
1
1
2
14
7
14
7
14
7
14
7
A
27
PLUS
PLUS
MINUS
HEC0470-01-630
PJ1
SW2
2A
1A
TEST_PIN
TEST_PIN
TEST_PIN
TEST_PIN
TEST_PIN
TEST_PIN
TEST_PIN
[VCC]
[VSS]
[AVCC]
[AVR]
{AVSS]
[LVCC]
[LVSS]
TP name Silk display
TP8
TP7
TP6
TP5
TP4
TP3
TP2
Line directions and VCC+5V, and +3.3V shortest-wire
a power supply pattern thickly above.
SW name Silk display
CW-SB21KKGH
2
3
2
1
1
[POWER-SW]
1
2
SW name Silk display
H1
C12
10uF/10V
C15
10uF/10V
C13
10uF/10V
5A
2
2
10uH
CDRH125-100NC
L1
10uF/10V
C9
1
C14
VCC
2
R6
2
JP5
2
JP6
2
JP7
2
XJ8B-0211
1
[AVSS]
XJ8B-0211
1
{AVR]
XJ8B-0211
1
{AVCC]
JP name display
120
R7
75
1
3A
U7
Vout
LT1085CM
Vin
10uF/10V
3
TAB IS OUTPUT(Vout)
+5V
RGE500
1
1
2
1
2
1
2
1
2
ADJ
1
2
1
+5V
1
C10
10uF/10V
C11
10uF/10V
+3.3V
2
1
2
28
L V S S [1,2]
L V C C [1,2]
A V s s [1,2]
A V R [1,2]
A V c c [1,2]
JP3
3
2
XJ8B-0311
XJ8B-0311
JP4
1
3
2
1
[+3.3V]
Silk display
JP4
3
JP3
2
1
Silk display
[+5V]
Rev.
Zone
Date
By
DR.
H.Hojo
CH.
H.Hojo
APR.
-
Sect.
ITF-SUWA
Sect.
ITF-SUWA
Date.
2004-02-03
RD1-TCO3Y9BD
Document Number
4
Page
Title
F2MC-8FX Standard evaluation board Assy
/4
F2MC-8FX POWER SUPPLY
/POWER SUPPLY SELECTION/C PIN SOCKET CONTROL
VCC
SS01-26001-1E
FUJITSU SEMICONDUCTOR • SUPPORT SYSTEM
F2MC-8FX Family
EVALUATION BOARD
MB2146-401
OPERATION MANUAL
December 2004 the first edition
Published FUJITSU LIMITED Electronic Devices
Edited
Business Promotion Dept.