The following document contains information on Cypress products. FUJITSU SEMICONDUCTOR SUPPORT SYSTEM SS01-26002-1E F2MC-8FX Family LQFP-64P(0.5mm Pitch) HEADER BOARD MB2146-220 OPERATION MANUAL PREFACE Thank you for purchasing the LQFP-64P (0.5 mm pitch) *1 header board (MB2146-220) for the F2MC *2 -8FX family. The LQFP-64P header board is used in the header board unit to connect the MCU board (MB21463xx) which mounted F2MC-8FX family evaluation MCU board to a user system. This manual explains the handling of the MB2146-220 header board for the F2MC-8FX family. Before using the MB2146-220 header board, be sure to read this manual. Consult the Sales representatives or the Support representatives of Fujitsu Limited for mass-produced MCUs and evaluation MCUs which correspond on a MB2146-220 header board. *1 : The lead pitch of PACKAGE (FPT-64P-M03) is 0.5 mm and the body size is 10 mm × 10 F2MC is the abbreviation used for FUJITSU Flexible Micro Controller. *2 : mm.Using the product safely. ■■ Caution of the products described in this document The following precautions apply to the product described in this manual. CAUTION The wrong use of a device will give an injury and may cause malfunction on customers system. Cuts This product has parts with sharp points that are exposed. Do not touch edge of the product with your bare hands. Damage When connect the header board to the user system, correctly position the index mark (▲) on the NQPACK mounted on the user system with the 1 pin direction(1) on the header board, otherwise the MCU bord and user system might be damaged. Damage When mounting a mass production MCU, correctly position pin 1, otherwise the mass production MCU and user system might be damaged. i • The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. • The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU semiconductor device; FUJITSU does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU assumes no liability for any damages whatsoever arising out of the use of the information. • Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU or any third party or does FUJITSU warrant non-infringement of any third-party’s intellectual property right or other right by using such information. FUJITSU assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. • The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. • Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. • If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. ©2004 FUJITSU LIMITED Printed in Japan ii 1. Product outline ■■ Product outline This product is a header board used to connect the MCU board (Part number : MB2146-3xx) carrying an evaluation MCU in the F2MC-8FX Family of Fujitsu 8-bit microcontrollers to a user system. To build an F2MC-8FX evaluation environment, combine three products: the header board, MCU board, and BGM adapter (Part number : MB2146-09). MB2146-09 MCU board BGM adapter Header board Figure 1 system-configuration ■■ Product configuration Tables 1, and Table 2. list the product configuration in the header board package and options. Table 1 product cofiguration Name Description Remarks F2MC-8FX LQFP-64P (0.5 mm pitch) Header board [Part number:MB2146-220] Connector/LQFP64pin (0.5 mm pitch) Package conversion [Part number : YQPACK064SD] (Tokyo Eletech Corporation) Header board-I/F between NQPACK Include (Finishing connection) [Part number : NQPACK064SD] (Tokyo Eletech Corporation) User system mounting Include [Part number : HQPACK064SD] (Tokyo Eletech Corporation) It is used at the time of mass-production Include MCU mounting to NQPACK. Table 2 option (sold separately) Name Description BGM adapter [Part number : MB2146-09] The ICE unit for F2MC-8FX MCU board [Part number : MB2146-3xx] MB95FV100-xxx Built in Remarks F2MC-8FX evaluation MCU Built in * * : Several types of evaluation MCUs are available depending on their applications. Purchase the one that satisfy the service conditions. 1 2. Checking the Delivered Product Before using the LQFP-64P header board, confirm that the following components are included in the box: • LQFP-64P (0.5 mm pitch) Header board *1 :1 • Screws for securing Header board (M2 × 10 mm, 0.4 mm pitch) :4 2 • NQPACK064SD * :1 • HQPACK064SD *3 :1 • Operation manual (English version, this manual) :1 *1 : Referred to as “header board”. Header board is mounted on YQPACK064SD (Tokyo Eletech Corporation), referred to as “YQPACK”. *2 : IC socket manufactured by Tokyo Eletech Corporation, referred to as “NQPACK”, and supplied with a special screwdriver and 2 guide pins. A socket offering higher reliability, NQPACK064SD-SL (Tokyo Eletech Corporation, sold separately), can be used by making an IC socket mounting hole on the user system board.For more information,contact Tokyo Eletech Corporation. *3 : IC socket cover manufactured by Tokyo Eletech Corporation,referred to as “HQPACK”, with 4 screws for securing HQPACK( M2 × 6 mm, 0.4 mm pitch). 3.Handling Precautions The header board is precision-manufactured to improve dimensional accuracy and to ensure reliable contact. The header is therefore sensitive to mechanical shock. To ensure correct use of the header in the proper environment, observe the following points regarding its insertion and removal: • To avoid placing stress on the NQPACK mounted on the user system board during connecting the header board. 2 4. Notes on Designing ■■ Restrictions of PC board for the user system If a tall component is mounted around the NQPACK mounted on the user system, the header board connected to the user system touches the component. To prevent this, design the pc board of the user system such that the height specified in Figure 2 is not exceeded. Figure 2 shows dimension figure of the header board. 13.0 mm 40.0 mm 30.0 mm 32 U1 64 17 16 WR-120SB-VF-1 : JAE 119 119 1 120 CN1 33 120 40.0 mm CN2 48 49 1 2 1 2 CN3 18.0 mm PCW-1-1PW :MAC EIGHT 4-R5.0 YQSOCKET064SDF :Tokyo Eletech Corporation YQPACK064SD :Tokyo Eletech Corporation 1.6 mm 4.85 mm Approximately 15.85 mm * WR-120SB-VF-1 : JAE NQPACK064SD :Tokyo Eletech Corporation User system U1:User system I/F connector CN3:Incorrect insertion preventive socket CN1/CN2:MCU board I/F connector * : The height differs slightly depending on how the socket are engaged. Figure 2 Header board dimensions 3 ■■ MCU footprint design notes 0.5 mm 0.25 mm 2.0 mm Figure 3 shows the recommended dimensions of the NQPACK footprint mounted on the PC board of the user system. The PC board of the user system must be designed with due consideration given to this footprint as well as to the mass production MCU. To follow updated information, be sure to contact Tokyo Eletech Corporation whenever designing the PC board. 2.0 mm Figure 3 Recommended dimensions of the footprint for mounting the NQPACK 4 14 mm 10 mm No.1 Pin 5. Procedure for Connecting the User System ■■ Connecting Before using the LQFP-64P (0.5 mm pitch) header board, mount the supplied NQPACK on the user system. 17 64 1 48 33 16 32 49 1. To connect the header board to the user system, match the index mark (▲) on the NQPACK mounted on the user system with the index mark (the notched corner of silk-screen printing) on the header board and then insert it (See Figure 4) . The pin of YQPACK is thin and easy to bent. Insert NQPACK after confirm that the pin of YQPACK is not bent. NQPACK Index Header board Index Figure 4 Index Position 2. Insert each screw for securing header board in each of the four drilled holes on the header board, and then first tighten the screws in opposing corners followed by the two remaining screws (See Figure 4) . The center screw hole is not used. To tighten the screws, use the special screwdriver supplied with the NQPACK to finally tighten the four screws in sequence. Tightening the screws too tight might result in a defective contact. 3. Connect the MCU board to the header board while being careful not to excessively force the NQPACK. The MCU board can be connected to the header board only in the correct orientation as they have a Incorrect insertion header socket to prevent reverse connection. Figure 5 illustrates how the MCU board, header board, NQPACK, and user system are connected together. 5 MCU board Evaluation MCU MCU board Screws for securing YQPACK Header board YQSOCKET Connection at the time of shipment YQPACK NQPACK User system Figure 5 MCU board / header board Connection ■■ Disconnection 1. Remove the MCU board from the header board. Detach the four corners slowly in sequence not to excessively force the junction with the NQPACK. 2. Remove all of the four screws from the header board. 3. Pull out the header board vertically from the NQPACK. Remove the header board slowly not to excessively force the junction with the NQPACK. 6 6. Mounting Mass Production MCUs To mount a mass production MCU on the user system, use the supplied HQPACK (See Figure 6). ■■ Mounting 1. To mount a mass production MCU on the user system, match the index mark (▲) on the NQPACK mounted on the user system with the index mark (●) on the mass production MCU. 2. Confirm that the mass production MCU is correctly mounted on the NQPACK. Next, insert the HQPACK into a NQPACK. The pin of HQPACK is thin and easy to bent. Insert NQPACK after confirm that the pin of HQPACK is not bent. 3. Insert each screw for securing HQPACK in each of four drilled holes on the HQPACK, and then first tighten the screws in opposing corners followed by the two remaining screws. To tighten the screws, use the special screwdriver supplied with the NQPACK to finally tighten the four screws in sequence. Tightening the screws too tight might result in a defective contact. Screws for securing HQPACK HQPACK Mass production MCU NQPACK User system Figure 6 Mounting a mass production MCU ■■ Disconnection To remove the HQPACK, remove all of the four screws and pull out the HQPACK vertically from the NQPACK. If you take out an Mass production MCU, use a dropper jig dedicated to IC removal to remove the Mass production MCU by suction force. Do not attempt to remove the Mass production MCU forcibly, for example, using a screwdriver as doing so can bend the Mass production MCU leads or break the NQPACK. 7 7. Product specification ■■ General specification The general specification of a header board is shown in Table 3. Table 3 General specification Item Description Operating/storage temperature 5 °C to 35 °C (At the time of operation) 0 °C to 40 °C (At the time of storage) Operating/storage humidity 20% to 80% (At the time of operation) 20% to 80% (At the time of storage) Dimensions 40 mm × 40 mm × 16 mm (Height contains YQPACK and NQPACK) Weight Header board : About 11g ■■ main composition The main composition component of a header board is shown in Table 4. Table 4 main composition Item Description 120 pins 0.5 mm pitch 2 piece connector (straight) × 2 [Model number: WR-120SB-VF-1 (JAE)] MCU board I/F connector 2 pins 2.54 mm pitch 1 piece socket Incorrect insertion preventive socket (Straight) [Model number:PCW-3-1-1PW (MAC EIGHT)] User target system I/F connector socket 64 pin 0.5 mm pitch [Model number:YQSOCKET064SDF (Tokyo Eletech Corporation)] ■■ Functional block diagram A header board performs socket conversion between the I/F connector of a MCU board, and YQPACK. Parts, such as IC, are not in an inside. A block diagram is shown in Figure 7. MCU board I/F connector USER target system I/F connector (Package correspondence socket) Figure 7 Functional block diagram 8 ■■ MCU board I/F connector(CN1/CN2/CN3) CN1 and CN2 are MCU board I/F connectors. CN3 is the incorrect insertion prevention socket of a MCU board. The pin assignment of the MCU board I/F connector CN1 is shown in Table 5, and the pin assignment of the MCU board I/F connector CN2 is shown in Table 6. Table 5 Pin assignment of the MCU board I/F connector CN1 Connector Pin Numbers Evaluation MCU Pin Numbers Signal name Connector Pin Numbers Evaluation MCU Pin Numbers Signal name 1 A9 PC4 41 E2 LVR3 2 B9 PC1 42 E1 LVSS 3 C9 PC2 43 F4 LVDREXT 4 D9 PC3 44 F3 LVDBGR 5 A8 PC0 45 F2 LVDENX 6 B8 PB4 46 F1 7 C8 PB5 47 − 8 D8 PB6 48 9 A7 PB7 10 B7 11 C7 12 13 ConnecEvaluation tor Pin MCU Numbers. Pin Numbers 81 Signal name P3 BSOUT 82 P4 BDBMX 83 R1 P83 84 R2 BRSTX 85 R3 X0A P22A 86 R4 RSTX GND 87 T1 ROMS1 − GND 88 T2 BSIN 49 G4 P20A 89 T3 Vss PB2 50 G3 NC1 90 T4 X0 PB0 51 G2 P21A 91 U1 BEXCK D7 PB1 52 G1 P23A 92 U2 X1 A6 PB3 53 H4 P24A 93 U3 MOD 14 B6 PA2 54 H3 P25A 94 U4 PF2 15 C6 P95 55 H2 P26A 95 V1 X1A 16 D6 PA0 56 H1 P27A 96 V2 Vcc53 17 A5 PA3 57 J4 P24B 97 − GND 18 B5 P94 58 J3 P50 98 − GND 19 C5 P90 59 J2 P23B 99 V3 PINT0 20 D5 P91 60 J1 P51 100 V4 PSEL_EXT 21 A4 PA1 61 K1 P52 101 R5 PF1 22 A3 P93 62 K2 P55 102 T5 PF0 23 − GND 63 K3 P54 103 U5 NC2 24 − GND 64 K4 P53 104 V5 PENABLE 25 A2 CSVENX 65 L1 P70 105 R6 APBENX 26 A1 Vss 66 L2 P74 106 T6 PINT1 27 B4 P92 67 L3 P73 107 U6 PCLK 28 B3 TCLK 68 L4 P72 108 V6 PADDR0 29 B2 LVCC 69 M1 P71 109 R7 PACTIVE 30 B1 LVDIN 70 M2 P76 110 T7 PLOCK 31 C4 Cpin 71 M3 P80 111 U7 PWRITE 32 C3 Vcc51 72 M4 P77 112 V7 PADDR1 33 C2 LVDENX2 73 − GND 113 R8 PADDR2 34 C1 LVR4 74 − GND 114 T8 PADDR3 35 D4 TESTO 75 N1 P75 115 U8 PADDR4 36 D3 LVDOUT 76 N2 P82 116 V8 PADDR5 37 D2 LVR2 77 N3 PG0 117 R9 PADDR7 38 D1 BGOENX 78 N4 P84 118 T9 PRDATA0 39 E4 LVR1 79 P1 P81 119 U9 PADDR6 40 E3 LVR0 80 P2 ROMS0 120 V9 PRDATA1 9 Table 6 Pin assignment of the MCU board I/F connector CN2 ConnecEvaluation Connector Pin MCU Signal name tor Pin Numbers Pin Numbers Numbers 10 Evaluation ConnecEvaluation MCU Signal name tor Pin MCU Pin Numbers Numbers Pin Numbers Signal name 1 A10 PC5 41 E17 NC4 81 P16 P34 2 B10 PD0 42 E18 SEL0 82 P15 P35 3 C10 PC6 43 F15 SEL3 83 R18 P44 4 D10 PC7 44 F16 SEL4 84 R17 P36 5 A11 PD1 45 F17 SEL1 85 R16 P31 6 B11 PD2 46 F18 P04C 86 R15 AVcc3 7 C11 PD3 47 − GND 87 T18 P40 8 D11 PD4 48 − GND 88 T17 P32 9 A12 PD5 49 G15 P06C 89 T16 AVss 10 B12 PD7 50 G16 P07C 90 T15 AVR 11 C12 P61 51 G17 P05C 91 U18 P33 12 D12 P60 52 G18 P00C 92 U17 P30 13 A13 PD6 53 H15 P01C 93 U16 AVR3 14 B13 P64 54 H16 P02C 94 U15 P15 15 C13 P66 55 H17 P03C 95 V18 AVcc 16 D13 P65 56 H18 P07A 96 V17 DA0 17 A14 P62 57 J15 P04A 97 − GND 18 B14 PE0A 58 J16 P05A 98 − GND 19 C14 PE3A 59 J17 P06A 99 V16 P14 20 D14 PE2A 60 J18 P03A 100 V15 P10 21 A15 P63 61 K18 P02A 101 R14 P16 22 A16 P67 62 K17 P07B 102 T14 DA1 23 − GND 63 K16 P01A 103 U14 P13 24 − GND 64 K15 P00A 104 V14 PWDATA7 25 A17 PE4A 65 L18 P06B 105 R13 P11 26 A18 Vcc54 66 L17 P05B 106 T13 P12 27 B15 PE1A 67 L16 P04B 107 U13 NC3 28 B16 PE5A 68 L15 P03B 108 V13 PWDATA3 29 B17 PE7A 69 M18 P02B 109 R12 PWDATA5 30 B18 PE3B 70 M17 P00B 110 T12 PWDATA6 31 C15 PE6A 71 M16 P46 111 U12 PWDATA4 32 C16 Vss 72 M15 P47 112 V12 PRDATA7 33 C17 PE2B 73 − GND 113 R11 PWDATA0 34 C18 PE7B 74 − GND 114 T11 PWDATA1 35 D15 PE1B 75 N18 P01B 115 U11 PWDATA2 36 D16 PE0B 76 N17 P43 116 V11 PRDATA6 37 D17 PE6B 77 N16 P41 117 R10 PRDATA3 38 D18 SEL2 78 N15 P42 118 T10 PRDATA4 39 E15 PE5B 79 P18 P45 119 U10 PRDATA5 40 E16 PE4B 80 P17 P37 120 V10 PRDATA2 ■■ User system I/F YQPACK (U1) The user system I/F YQPACK pin assignment of a header board is shown in Table 7. Table 7 Pin assignment of the User system I/F YQPACK Connector Pin Numbers Signal name Connector Pin Numbers Signal name 1 AVcc 33 P13/TRG0/ADTG 2 AVR 34 P14/PPG0 3 PE3/INT13 35 P20/PPG00 4 PE2/INT12 36 P21/PPG01 5 PE1/INT11 37 P22/TO00 6 PE0/INT10 38 P23/TO01 7 P83 39 P24/EC0 8 P82 40 P50/SCL0 9 P81 41 P51/SDA0 10 P80 42 P52/PPG1 11 P71/TI0 43 P53/TRG1 12 P70/TO0 44 P60/PPG10 13 MOD 45 P61/PPG11 14 X0 46 P62/TO10 15 X1 47 P63/TO11 16 VSS 48 P64/EC1 17 VCC 49 P65/SCK 18 PG0/(Cpin) 50 P66/SOT 19 X1A/PG2 51 P67/SIN 20 X0A/PG1 52 P43/AN11 21 RSTX/FTEST 53 P42/AN10 22 P00/INT00/HC00 54 P41/AN09 23 P01/INT01/HC01 55 P40/AN08 24 P02/INT02/HC02 56 P37/AN07 25 P03/INT03/HC03 57 P36/AN06 26 P04/INT04/HC04 58 P35/AN05 27 P05/INT05/HC05 59 P34/AN04 28 P06/INT06/HC06 60 P33/AN03 29 P07/INT07/HC07 61 P32/AN02 30 P10/UI0 62 P31/AN01 31 P11/UO0 63 P30/AN00 32 P12/UCK0 64 AVss 11 P12 P10 P30 P32 P43 P42 P37 P35 P36 P07 P00 P02 P04 PE0 PE3 P67 P60 P64 P65 Figure 8 Header board circuit diagram 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 [GND] TP1 TEST_PIN VCC [VCC] TP2 TEST_PIN Silk display WR-120SB-VF-1 VCC PD0 PC5 PC7 PC6 PD2 PD1 PD4 PD3 PD7 PD5 P60 P61 P64 PD6 P65 P66 PE0A P62 PE2A PE3A P67 P63 GND_2 GND_1 Vcc54 PE4A PE5A PE1A PE3B PE7A Vss PE6A PE7B PE2B PE0B PE1B SEL2 PE6B PE4B PE5B SEL0 NC4 SEL4 SEL3 P04C SEL1 GND_4 GND_3 P07C P06C P00C P05C P02C P01C P07A P03C P05A P04A P03A P06A CONNECTOR B P07B P02A P00A P01A P05B P06B P03B P04B P00B P02B P47 P46 GND_6 GND_5 P43 P01B P42 P41 P37 P45 P35 P34 P36 P44 AVcc3 P31 P32 P40 AVR AVss P30 P33 P15 AVR3 DA0 AVcc GND_8 GND_7 P10 P14 DA1 P16 PWDATA7 P13 P12 P11 PWDATA3 NC3 PWDATA6 PWDATA5 PRDATA7 PWDATA4 PWDATA1 PWDATA0 PRDATA6 PWDATA2 PRDATA4 PRDATA3 PRDATA2 PRDATA5 CN2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 P13 P11 P14 P33 P31 P40 P34 P41 P06 P05 P01 P03 PE2 PE1 P63 P66 P62 P61 P4[3:0] P3[7:0] P1[4:0] P6[7:0] P3[7:0] P4[3:0] P6[7:0] AVR AVcc P65 P66 P67 P43 P42 P41 P40 P37 P36 P35 P34 P33 P32 P31 P30 AVss P65/SCK P66/SOT P67/SIN P43/AN11 P42/AN10 P41/AN09 P40/AN08 P37/AN07 P36/AN06 P35/AN05 P34/AN04 P33/AN03 P32/AN02 P31/AN01 P30/AN00 AVss PE[3:0] 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 U1 P8[3:0] P7[1:0] 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PG1 PG2 PG0 P12 P11 P10 P07 P06 P05 P04 P03 P02 P01 P00 YQSOCKET064SDF P12/UCK0 P11/UO0 P10/UI0 P07/INT07/HC07 P06/INT06/HC06 P05/INT05/HC05 P04/INT04/HC04 P03/INT03/HC03 P02/INT02/HC02 P01/INT01/HC01 P00/INT00/HC00 RSTX/FTEST X0A/PG1 X1A/PG2 PG0/(Cpin) Vcc PE3 PE2 PE1 PE0 P83 P82 P81 P80 P71 P70 PE[3:0] P64 P63 P62 P61 P60 P53 P52 P51 P50 P24 P23 P22 P21 P20 P14 P13 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P64/EC1 P63/TO11 P62/TO10 P61/PPG11 P60/PPG10 P53/TRG1 P52/PPG1 P51/SDA0 P50/SCL0 P24/EC0 P23/TO01 P22/TO00 P21/PPG01 P20/PPG00 P14/PPG0 P13/TRG0/ADTG AVcc AVR PE3/INT13 PE2/INT12 PE1/INT11 PE0/INT10 P83 P82 P81 P80 P71/TI0 P70/TO0 MOD X0 X1 Vss 12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P0[7:0] Rev. PG[2:0] MOD X0 X1 RSTX P82 P53 P50 P51 P23 P22 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 WR-120SB-VF-1 PC1 PC4 PC3 PC2 PB4 PC0 PB6 PB5 PB2 PB7 PB1 PB0 PA2 PB3 PA0 P95 P94 PA3 P91 P90 P93 PA1 GND_2 GND_1 Vss_1 CSVENX TCLK P92 LVDIN LVCC Vcc51 Cpin LVR4 LVDENX2 LVDOUT TESTO BGOENX LVR2 LVR0 LVR1 LVSS LVR3 LVDBGR LVDREXT P22A LVDENX GND_4 GND_3 NC1 P20A P23A P21A P25A P24A P27A P26A P50 P24B P51 P23B CONNECTOR A P55 P52 P53 P54 P74 P70 P72 P73 P76 P71 P77 P80 GND_6 GND_5 P82 P75 P84 PG0 ROMS0 P81 BDBMX BSOUT BRSTX P83 RSTX X0A BSIN ROMS1 X0 Vss_2 X1 BEXCK PF2 MOD Vcc53 X1A GND_8 GND_7 PSEL_EXT PINT0 PF0 PF1 PENABLE NC2 PINT1 APBENX PADDR0 PCLK PLOCK PACTIVE PADDR1 PWRITE PADDR3 PADDR2 PADDR5 PADDR4 PRDATA0 PADDR7 PRDATA1 PADDR6 CN1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 CN3 2 PCW-3-1-1PW 1 Incorrect insertion preventive measures VCC Zone Date By DR. H.Hojo CH. H.Hojo APR. - ITF-SUWA Date. 2004-02-10 Sect. Sect. ITF-SUWA PG2 P83 PG1 P81 P71 P80 P70 P52 P20 P21 P24 PG0 RD1-TCO3Y9BK Document Number 1 Page / F2MC-8FX LQPF64(0.50) Header Board Assy Title F2MC-8FX LQFP64pin(0.50mmPitch) Header board P7[1:0] P8[3:0] PG[2:0] P2[4:0] P1[4:0] P0[7:0] P5[3:0] P2[4:0] P5[3:0] 1 ■■ Circuit diagram The circuit diagram of a header board is shown in Figure 8. SS01-26002-1E FUJITSU SEMICONDUCTOR • SUPPORT SYSTEM F2MC-8FX Family LQFP-64P(0.5mm Pitch) HEADER BOARD MB2146-220 OPERATION MANUAL July 2004 the first edition Published FUJITSU LIMITED Electronic Devices Edited Business Promotion Dept.