The following document contains information on Cypress products. CM71-10115-1ET2 Errata This errata sheet is for MB91F127/128 Hardware Manual Rev.1 (CM71-10115-1E) FR30 32-BIT MICROCONTROLLER MB91F127/128 HARDWARE MANUAL Date 2008/ 12/24 Page 70 Item 3.11.5 2008.12.24 Description The following description of " [Bit 08] CHC" in "■ GCR Configuration" was corrected as indicated by the shading below. （誤） CHC 0 1 Clock selection Uses half the clock cycle from the oscillation circuit as reference clock [default]. Uses the oscillation output from the PLL as reference clock. CHC 0 1 Clock selection Uses the oscillation output from the PLL as reference clock. Uses half the clock cycle from the oscillation circuit as reference clock [default]. （正） [mcu_doc0631] 2004/ 4/21 273 13.2.3 The figure 13.2-5 to be corrected as indicated by shading below: •Error Initial value •Correct Initial value 2004/ 4/21 371 A The table A-1 to be corrected as indicated by shading below: •Error Address +0 0000D4H - Register +1 AIC3 [R/W] 11111111 +2 +3 - - +2 +3 - - Internal resource A/D converter •Correct Address +0 0000D4H - Register +1 AIC3 [W] 11111111 1/1 Internal resource A/D converter