Datasheet

UNISONIC TECHNOLOGIES CO., LTD
U74LVC563
CMOS IC
OCTAL TRANSPARENT D-TYPE
LATCHES WITH 3-STATE OUTPUTS
„
DESCRIPTION
The U74LVC563 is a octal transparent D-TYPE latches with 3-state
outputs. When the latch-enable (LE) is high, the Q outputs follow the
complements of the D inputs. When LE is low, the Q outputs are latched at
the inverses of the levels set up at the D inputs.
When the output-enable ( OE ) input is high, the Q outputs are in a
high-impedance state, and the outputs neither load nor drive the bus lines.
The high-impedance state and increased drive provide the capability to drive
bus lines without interface or pull-up components. While the outputs are in
the high-impedance state, old data can be retained or new data can be
entered, i.e. OE does not affect the internal operations of the latches. When
OE is low, the Q outputs are in a normal logic state (high or low levels).
The U74LVC563 is designed for 1.65V to 3.6V operation. Inputs can be
driven from either 3.3V or 5V devices, so the U74LVC563 can be used in a
mixed 3.3V/5V system environment.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pull-up resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
„
FEATURES
* Wide supply voltage range from 1.65V to 3.6V
* Max tPD of 6.8 ns from D to Q at 3.3V
* Max tPD of 7.6 ns from LE to Q at 3.3V
* Up to 5.5V inputs accept voltages
* Low power consumption, ICC = 10μA (Max.) at 3.6V
* ±24mA output driver at 3V
* IOFF supports partial-power-down mode operation
„
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
U74LVC563L-P20-R
U74LVC563G-P20-R
U74LVC563L-P20-T
U74LVC563G-P20-T
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Copyright © 2011 Unisonic Technologies Co., Ltd
Package
Packing
TSSOP-20
TSSOP-20
Tape Reel
Tube
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CMOS IC
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PIN CONFIGURATION
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FUNCTION TABLE (each latch)
OE
L
L
L
H
„
INPUTS
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
L
H
Q0
Z
LOGIC DIAGRAM (positive logic)
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CMOS IC
ABSOLUTE MAXIMUM RATING (unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VCC
-0.5~6.5
V
Input Voltage
VIN
-0.5~6.5
V
Output Voltage
VOUT
-0.5~6.5
V
(any output in the high-impedance or power-off state)
Output Voltage (any output in the high or low state)
VOUT
-0.5~VCC+0.5
V
Input Clamp Current
IIK
-50
mA
Output Clamp Current
IOK
-50
mA
Output Current
IOUT
±50
mA
VCC or GND Current
ICC
±100
mA
Storage Temperature
TSTG
-65 ~ +150
°C
Note: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
RECOMMENDED OPERATING COMDITIONS
PARAMETER
SYMBOL
Supply Voltage
VCC
High-Level Input Voltage
VIH
Low-Level Input Voltage
VIL
Input Voltage
VIN
Output Voltage
VOUT
High-Level Output Current
IOH
Low-Level Output Current
IOL
Input Transition Rise or Fall Rate
Operating Temperature
CONDITIONS
Operating
Data retention only
VCC = 1.65V to 1.95V
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 1.65V to 1.95V
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
High or low state
3 state
VCC=1.65V
VCC=2.3V
VCC=2.7V
VCC=3V
VCC=1.65V
VCC=2.3V
VCC=2.7V
VCC=3V
Δt/Δv
TA
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MIN
1.65
1.5
0.65* VCC
1.7
2
0
0
0
0
-40
MAX
3.6
UNIT
V
V
0.35* VCC
0.7
0.8
5.5
VCC
5.5
-4
-8
-12
-24
4
8
12
24
10
85
V
V
V
mA
mA
ns/V
°C
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CMOS IC
ELECTRICAL CHARACTERISTICS (TA =25°C , unless otherwise specified)
PARAMETER
High-Level Output Voltage
Low-Level Output Voltage
Input Leakage Current
(D, LE, or OE inputs)
OFF-state Current
High-impedance state Current
SYMBOL
VOH
VOL
II(LEAK)
TEST CONDITIONS
IOH = -100μA, VCC = 1.65V to 3.6V
IOH = -4mA, VCC = 1.65V
IOH = -8mA, VCC = 2.3V
IOH = -12mA, VCC = 2.7V
IOH = -12mA, VCC = 3V
IOH = -24mA, VCC = 3V
IOL = 100μA, VCC = 1.65V to 3.6V
IOL = 4mA, VCC = 1.65V
IOL = 8mA, VCC = 2.3V
IOL = 12mA, VCC = 2.7V
IOL = 24mA, VCC = 3V
MIN
TYP
VCC-0.2
1.2
1.7
2.2
2.4
2.2
IOFF
IOZ
SYMBOL
Pulse duration, LE high
tW
Setup time, data before LE↓
tSU
Hold time, data after LE↓
tH
V
±5
μA
±10
±10
10
10
μA
μA
500
μA
4
5.5
μA
pF
pF
TEST CONDITIONS
VCC = 2.7V
VCC = 3.3V±0.3V
VCC = 2.7V
VCC = 3.3V±0.3V
VCC = 2.7V
VCC = 3.3V±0.3V
MIN
3.3
3.3
2
2
1.5
1.5
MAX UNIT
MIN
MAX UNIT
7.8
ns
6.8
8.2
ns
7.6
8.7
ns
7.7
7.6
ns
7
ns
ns
ns
SWITCHING CHARACTERISTICS (TA =25°C)
PARAMETER
Propagation delay
from input D to output Q
Propagation delay
from input LE to output Q
Propagation delay
from input OE to output Q
Propagation delay
from input OE to output Q
„
0.2
0.45
0.7
0.4
0.55
TIMING REQUIREMENTS(TA =25°C)
PARAMETER
„
UNIT
V
VIN = 0 to 5.5V, VCC = 3.6V
VIN or VO = 5.5V, VCC = 0V
VO = 0 to 5.5V, VCC = 3.6V
IOUT = 0, VIN = VCC or GND,
Quiescent Supply Current
ICC
VCC=3.6V VIN=3.6V to 5.5V,in disabled state
One input at VCC-0.6V,VCC=2.7V to 3.6V,
Additional quiescent Supply
Δ ICC
Current
other inputs at VCC or GND
Input Capacitance
CIN
VIN = VCC or GND, VCC=3.3V (Note 1)
Output Capacitance
COUT
VOUT = VCC or GND, VCC=3.3V (Note 1)
Note: 1. All typical values are at VCC = 3.3 V, TA = 25 °C.
„
MAX
SYMBOL
TEST CONDITIONS
tPLH/tPHL VCC=2.7V, CL=50pF, RL=500Ω
(tPD)
VCC=3.3±0.3V, CL=50pF, RL=500Ω
tPLH/tPHL VCC=2.7V, CL=50pF, RL=500Ω
(tPD)
VCC=3.3±0.3V, CL=50pF, RL=500Ω
tPZL/tPZH VCC=2.7V, CL=50pF, RL=500Ω
(tEN)
VCC=3.3±0.3V, CL=50pF, RL=500Ω
tPLZ/tPHZ VCC=2.7V, CL=50pF, RL=500Ω
(tDIS)
VCC=3.3±0.3V, CL=50pF, RL=500Ω
1.5
2
1.5
1.5
OPERATING CHARACTERISTICS (TA =25°C)
PARAMETER
Power Dissipation Capacitance
SYMBOL
CPD
TEST CONDITIONS
OE = 0, f=10MHz, outputs enabled
TYP
46
OE = 1, f=10MHz, outputs disabled
3
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UNIT
pF
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CMOS IC
TEST CIRCUIT AND WAVEFORMS
VCC
2.7V
3.3V±0.3V
Inputs
VIN
VCC
VCC
tR, tF
≤2.5ns
≤2.5ns
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
VM
VLOAD
CL
RL
VΔ
1.5V
1.5V
6V
6V
50pF
50pF
500Ω
500Ω
0.3V
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CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
VIN
Input
VM
VM
tPLH
tPHL
0V
VOH
Output
VM
VM
VOL
tPLH
tPHL
VOH
VM
Output
VM
VOL
Voltage Waveforms Propagation Delay Times
VIN
Input
VM
VM
0V
tPLZ
tPZL
VLOAD/2
Output
VM
S1 at VLOAD
VOL+VΔ
tPHZ
tPZH
Output
VM
S1 at Open
VOL
VOH-VΔ
VOH
0V
Voltage Waveforms Enable and Disable Times
Notes: 1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤10MHz, ZO = 50Ω.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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