April 2015 I N T H I S I S S U E patent-pending boost-buck LED driver topology 8 I2C programmable supervisors with EEPROM 12 Volume 25 Number 1 Industry’s First 0.8µVRMS Noise LDO Has 79dB Power Supply Rejection Ratio at 1MHz Amit Patel 18V buck-boost converter with intelligent PowerPath control delivers >2A 16 advantages of 75W boost mode LED driver 22 how to design an isolated, high frequency, push-pull DC/DC converter 25 When it comes to powering noise-sensitive analog/RF applications, low dropout (LDO) linear regulators are generally preferred over their switching counterparts. Low noise LDOs power a wide range of analog/RF designs, including frequency synthesizers (PLLs/VCOs), RF mixers and modulators, high speed and high resolution data converters (ADCs and DACs) and precision sensors. Nevertheless, these applications have reached capabilities and sensitivities that are testing the limits of conventional low noise LDOs. For instance, in many high end VCOs, power supply noise directly affects the VCO output phase noise (jitter). Moreover, to meet overall system efficiency requirements, the LDO usually post-regulates the output of a relatively noisy switching converter, so the high frequency power supply rejection ratio (PSRR) performance of the LDO becomes paramount. With its ultralow output noise and ultrahigh PSRR performance, the LT®3042 can directly power some of most noise-sensitive applications while post-regulating the output of a switching converter, without requiring bulky filtering. Table 1 compares the LT3042’s noise performance with conventional low noise regulators. PERFORMANCE, ROBUSTNESS & SIMPLICITY The LT3042 is a high performance low dropout linear regulator featuring Linear Technology’s ultralow noise and ultrahigh PSRR architecture for powering noise-sensitive The LT3042 brings noise-free power to high performance electronics. w w w. li n ea r.com (continued on page 4) Linear in the News In this issue... COVER STORY Industry’s First 0.8µVRMS Noise LDO Has 79dB Power Supply Rejection Ratio at 1MHz Amit Patel 1 New Analog Circuit Design Book Published by Elsevier 8 The third volume in Linear Technology’s Analog Circuit Design book series has been published by Elsevier/Newnes Publishers. The book, Analog Circuit Design, Volume 3, Design Note Collection, edited by Bob Dobkin and John Hamburger, is a compilation of applied circuit design solutions that can be used in a broad range of applications and systems. DESIGN FEATURES Boost-Buck LED Driver Topology for Automotive LEDs Operates with Low Input and Output Ripple Keith Szolusha 12 The book is a comprehensive collection of Linear Technology’s highly regarded Design Notes. The Notes have been written over the past 25 years by some of the leading lights of analog design, including Jim Williams, Bob Dobkin, Carl Nelson and George Erdi, among many others. They serve as a framework to provide circuit design techniques for a range of analog design challenges. 16 The book is logically organized for easy reference. It includes an in-depth Power Management section, including such topics as: I2C Programmable Multichannel Voltage Supervisors with EEPROM Michael Petersen 18V Buck-Boost Converter with Intelligent PowerPath™ Control Delivers >2A at 95% Efficiency from Dual Inputs Eddy Wells DESIGN IDEAS What’s New with LTspice IV? Gabino Alonso 20 Can’t Find the Right Synchronous Boost LED Driver? Use a Synchronous Buck Converter Instead: Boost Mode Topology Drives 25V, 3A LEDs from 12V Keith Szolusha 22 How to Design an Isolated, High Frequency, Push-Pull DC/DC Converter Dawson Huang 25 new product briefs 30 back page circuits 32 •Power management design •Microprocessor power design •Switching regulator design for step-down and boost converters, buck-boost controllers and DC/DC controllers •Linear regulator design •µModule® power design •Battery management •Power over Ethernet •Powering LED lighting •Automotive and industrial power design The Mixed Signal section spans a range of topics, including: •Data conversion—analog-to-digital and digital-to-analog •Data acquisition •Communications interface design •Instrumentation design The Signal Conditioning section covers: •Operational amplifier design techniques •Special function amplifier design •Voltage reference design •Filter design •Comparator design techniques •System timing design • RMS-to-DC conversion 2 | April 2015 : LT Journal of Analog Innovation Linear in the news reception of the two prior books in this series, Analog Circuit Design, A Tutorial Guide to Applications and Solutions, and Analog Circuit Design, Volume 2, Immersion in the Black Art of Analog Design, both edited by Bob Dobkin and Jim Williams. For more information on the book, a video interview with Bob Dobkin and ordering information from either Elsevier or Amazon, visit www.linear. com/designtools/acd_book.php Analog Circuit Design, Volume 3, Design Note Collection, recently published by Elsevier/Newnes Publishers, is the latest volume in the Linear book series. The final section of the book covers a range of topics in Wireless, RF and Communications Design. In his introduction to the book, Bob Dobkin, CTO & Co-founder of Linear Technology, states, “The teaching designs in this Design Note Collection help bring new designers up to speed and give experienced designers a starting point for even more sophisticated designs. This book has two purposes: to speed designs by presenting finished examples, as well as providing a teaching resource for designers.” Bill Schweber, Contributing Editor to EE Times Planet Analog, stated in his review of the book, “There are so many good circuit ideas and topologies along with analysis of subtleties and design issues, that anyone who is a serious student or practitioner of the art and reality of analog design will receive a substantial return on time invested.” Analog Circuit Design, Volume 3, Design Note Collection, follows the positive •The LTC2323-16 Dual, 16-Bit, 5Msps Differential Input ADC with Wide Input Common Mode Range was selected as the Most Competitive ADC Product for 2014. CONFERENCES & EVENTS IPC & Embedded Expo 2015, Shenzhen Convention & Exhibition Center, Shenzhen, China, April 15–17—Linear is presenting “99.999% AWARDS Reliable Wireless Sensor Network that Uses Low Power” at 11:20 am, April 16 at their 3rd Internet of Things Conference. More info at en.embeddedexpo.com/ Technical Support Award 2nd Annual LTspice Users Conference, Tokyo Linear Technology was presented with the award for Best Technical Support by SPDEI, the French Association of Electronic Components Distributors at an event in Paris in December. Conference Center, Tokyo, Japan, April 17, Halls A & B—Mike Engelhardt, a developer of LTspice® design tools, will make a presentation on the latest developments regarding LTspice software. For registration and more info, visit www.ltspice.jp EEPW Editors’ Choice Award Linear’s LTC®2338-18 18-bit, 1Msps, ±10.24V true bipolar SAR ADC (analogto-digital converter) was selected for the Best Mixed-Signal Chip Award by the editors of Electronic Engineering & Product World (China). Operating from a single 5V supply, the LTC2338-18 has a ±10.24V true bipolar input range, making it ideal for high voltage applications which require a wide dynamic range. The fast 1Msps throughput with no cycle latency makes the LTC2338-18 ideally suited for a wide variety of high speed applications. China Electronic Market Editors’ Choice Awards Two Linear Technology products were selected by the editors of China Electronic Market magazine for Editors’ Choice Awards: Wireless Japan 2015, Tokyo Big Site, Tokyo, Japan, May 27–29—Presenting customer case studies of Linear’s Dust Networks® products, as well as industrial wireless sensor network solutions at the Linear Technology booth. More info at www8.ric.co.jp/expo/wj/en/index.html Sensors Expo/Energy Harvesting Pavilion, Long Beach Convention Center, Long Beach, CA, June 9–11, Booth 649—Presenting Linear’s energy harvesting family and low power wireless sensor networks. Sam Nork is presenting “Energy Harvesting for Battery-Operated Applications” and Joy Weiss is presenting “Low Power Wireless Sensor Networks for IoT.” For more info, visit www.sensorsexpo.com •The LTC3355 20V 1A Buck DC/DC with Integrated Supercap Charger and Backup Regulator was chosen as the Most Competitive Power Product for 2014. April 2015 : LT Journal of Analog Innovation | 3 The LT3042 is a high performance low dropout regulator featuring Linear’s ultralow noise and ultrahigh PSRR architecture for powering noise-sensitive applications. Even with its high performance, the LT3042 maintains simplicity and robustness. (LT3042, continued from page 1) Table 1. The LT3042 vs traditional low noise LDOs applications. Even with its high performance, the LT3042 maintains simplicity and robustness. Figure 1 is a typical application and Figure 2 shows a complete demonstration circuit. The LT3042’s tiny 3mm × 3mm DFN package and minimal component requirements keep overall solution size small. LT3062 LT3082 LT3042 RMS Noise (10Hz to 100kHz) 20µV RMS 30µV RMS 33µV RMS 0.8µV RMS Spot Noise (10kHz) 35nV/√Hz 80nV/√Hz 100nV/√Hz 2nV/√Hz PSRR at 1MHz 22dB 55dB 45dB 79dB Minimum PSRR (DC to 1MHz) 22dB 30dB 40dB 77dB L L Programmable Current Limit L Programmable Power Good L Fast Start-up Capability L Rail-to-Rail Output Range L Quiescent Current Figure 2. LT3042 demonstration circuit LT3042 IN 4.7µF 30µA systems, such as programmable current limit, programmable power good threshold and fast start-up capability. Furthermore, the LT3042 incorporates protection features for battery-powered systems. Its reverse input protection circuitry tolerates negative voltages at the input without damaging the IC or developing negative voltages at the output—essentially acting as if an ideal diode In addition to offering ultralow noise and ultrahigh PSRR performance, the LT3042 includes features desired in modern VIN 5V ±5% LT1763 Directly Parallelable Designed as a precision current reference followed by a high performance voltage buffer, the LT3042 is easily paralleled to increase output current, spread heat on the PCB and further reduce noise—output noise decreases by the square-root of the number of devices in parallel. Its current-reference based architecture offers wide output voltage range (0V to 15V) while maintaining unity-gain operation, thereby providing virtually constant output noise, PSRR, bandwidth and load regulation, independent of the programmed output voltage. Figure 1. Typical LT3042 application PARAMETER 100µA EN/UV 200k – + VOUT 3.3V IOUT(MAX) 200mA OUT PG OUTS SET GND ILIM PGFB 4.7µF 450k 4.7µF 4 | April 2015 : LT Journal of Analog Innovation 33.2k 499Ω 50k 45µA 300µA 2mA is connected in series with the input. In battery backup systems where the output can be held higher than the input, the LT3042’s reverse output-to-input protection circuitry prevents reverse current flow to the input supply. The LT3042 includes internal foldback current limit, as well as thermal limit with hysteresis for safe-operating-area protection. design features Designed as a precision current reference followed by a high performance voltage buffer, the LT3042 is easily paralleled to increase output current, spread heat on the PCB and further reduce noise—output noise decreases by the square-root of the number of devices in parallel. 50µV/DIV LT1763 LT3042 100 10 1 10ms/DIV Figure 3. Output noise: 10Hz to 100kHz ULTRALOW OUTPUT NOISE With its 0.8µVRMS output noise* in 10Hz to 100kHz bandwidth, the LT3042 is the industry’s first sub-1µVRMS noise regulator. Figure 3 compares the LT3042’s integrated output noise from 10Hz to 100kHz to that of the LT1763, Linear’s lowest noise regulator for over a decade. The LT3042’s ultralow noise performance opens up applications that were previously not possible, or otherwise required expensive and bulky filtering components. The SET pin capacitor (CSET) bypasses the reference current noise, the base current noise (of the error amplifier’s input stage) and the SET pin resistor’s (RSET) inherent thermal noise. As shown in Figure 4, low frequency noise performance is significantly improved with increasing CSET. With a 22µF CSET, the output noise is under 20nV/√Hz at 10Hz. Note that capacitors can also produce 1/f noise, particularly electrolytic capacitors. To minimize 1/f noise, use ceramic, tantalum or film capacitors on the SET pin. Actively driving the SET pin with either a battery or a lower noise voltage reference CSET = 0.047µF CSET = 0.47µF CSET = 1µF CSET = 4.7µF CSET = 22µF 0.1 VIN = 5V RSET = 33.2kΩ COUT = 4.7µF IL = 200mA 10 100 9 8 RMS OUTPUT NOISE (µVRMS) OUTPUT NOISE (nV/√Hz) 1000 7 VIN = 5V RSET = 33.2kΩ COUT = 4.7µF IL = 200mA 6 5 4 3 2 1 1k 10k 100k FREQUENCY (Hz) 1M 10M 0 0.01 0.1 1 10 SET PIN CAPACITANCE (µF) 100 Figure 4. Noise spectral density Figure 5. Integrated RMS output noise (10Hz to 100kHz) reduces noise below 10Hz. Doing so essentially eliminates the reference current noise at lower frequencies, leaving only the extremely low error amplifier noise. This ability to drive the SET pin is another advantage of the current-reference architecture. The integrated RMS noise also improves as the SET pin capacitance increases, dropping below 1µVRMS with just 2.2µ F CSET, as shown in Figure 5. Increasing SET pin bypass capacitance for lower output noise generally leads to increased start-up time. But the LT3042’s fast start-up circuitry alleviates this trade-off. The fast start-up circuitry is easily configured using two resistors; Figure 6 shows the significant improvement in start-up time. Figure 6. Fast start-up capability OUTPUT WITH FAST START-UP (SET AT 95%) 500mV/DIV OUTPUT WITHOUT FAST START-UP 500mV/DIV PULSE EN/UV 2V/DIV VIN = 5V RSET = 33k COUT = 4.7µF 100ms/DIV CSET = 4.7µF RL = 16.5Ω ULTRAHIGH PSRR PERFORMANCE LT3042’s high PSRR* is important when powering noise-sensitive applications. Figure 7 shows the LT3042’s incredible low and high frequency PSRR performance—approaching almost 120dB at 120Hz , 79d B at 1MHz , and better than 70dB all the way to 3MHz. PSRR performance is even better with decreasing load currents, as shown in Figure 8. Unlike conventional LDOs whose PSRR performance deteriorates into the 10s of dB as you approach dropout, the LT3042 maintains high PSRR at even low input-to-output differentials. As Figure 9 illustrates, LT3042 maintains 70dB PSRR April 2015 : LT Journal of Analog Innovation | 5 120 100 110 110 90 100 100 80 90 90 70 80 80 60 70 60 50 40 30 20 10 100 1k 10k 100k FREQUENCY (Hz) 70 60 50 VIN = 5V RSET = 33.2kΩ CSET = 4.7µF COUT = 4.7µF IL = 200mA 40 30 1M 10M PSRR (dB) 120 PSRR (dB) PSRR (dB) For perspective, trying to achieve 80dB rejection at 500kHz without using the ultrahigh PSRR LT3042 LDO is a tall order. Alternatives don’t measure up. For instance, an LC filter would require nearly 40µH of inductance and 40µF of capacitance to achieve 80dB rejection at 500kHz, adding large, expensive components. 20 VIN = 5V RSET = 33.2kΩ COUT = 4.7µF CSET = 0.47µF 10 100 1k 10k 100k FREQUENCY (Hz) IL = 200mA IL = 100mA IL = 50mA IL = 1mA 1M 10M IL = 200mA RSET = 33.2kΩ COUT = 4.7µF CSET = 0.47µF 50 40 30 100kHz 500kHz 1MHz 2MHz 20 10 0 0 1 2 3 4 INPUT-TO-OUTPUT DIFFERENTIAL (V) 5 Figure 7. PSRR performance Figure 8. PSRR for various load currents Figure 9. PSRR vs input-to-output differential up to 2MHz with only 1V input-to-output differential and almost 60dB PSRR up to 2MHz at a mere 600mV input-to-output differential. This capability allows the LT3042 to post-regulate switching converters at low input-to-output differentials—for high efficiency—while its PSRR performance satisfies the requirements of noise-sensitive applications. ultralow noise devices like the LT3042 and its load. While the LT3042’s orientation with respect to the “warm-loop” can be optimized for minimum magnetic coupling, it can be challenging in practice to achieve 80dB of rejection simply with optimized orientation—multiple iterations of the PC board may be required. This is peculiarly counter-intuitive—adding input capacitance generally reduces output ripple—but at 80dB rejection, the magnetic coupling, which is usually insignificant, resulting from moderately high frequency (500kHz) switching currents flowing though this 4.7µ F capacitor, significantly degrades output ripple. While changing the orientation of the 4.7µ F input capacitor and the traces connecting the switcher’s output to this capacitor help minimize magnetic coupling, it remains rather difficult to achieve nearly 80dB of rejection at these frequencies, not to mention the multiple PC board iterations it may require. POST-REGULATING A SWITCHER In applications where the LT3042 is post-regulating the output of a switching converter to achieve ultrahigh PSRR at high frequencies, care must be taken with the electromagnetic coupling from the switching converter to the output of the LT3042. In particular, while the “hotloop” of the switching converter should be as small as possible, the “warm-loop” (with AC currents flowing at the switching frequency) formed by the switcher IC, output inductor, and output capacitor (for a buck converter) should also be minimized, and it should either be shielded or placed a couple of inches away from 6 | April 2015 : LT Journal of Analog Innovation Consider Figure 10, where the LT3042 is post-regulating the LT8614 Silent Switcher® regulator running at 500kHz with an EMI filter at switching regulator input. With the LT3042 located just one to two inches from the switching converter and its external components, almost 80dB rejection at 500kHz is achieved without any shielding. To achieve this performance, however, as Figure 11a highlights, no additional capacitor—other than the 22µ F at switcher’s output—is placed at the input of the LT3042. However, as shown in Figure 11b, even placing a small 4.7µ F capacitor directly at the input of the LT3042 results in over 10× degradation in PSRR. The relatively high input impedance of the LT3042 prevents high frequency AC currents from flowing to its input terminal. Given that the LT3042 is stable without an input capacitor if located within three inches of the pre-regulating switching power supply’s output capacitor, to achieve best PSRR performance, design features FERRITE BEAD VIN 12V 4.7µF//0.1µF 10µF EN/UV VIN1 22µF//10µF VIN2 1µF EMI FILTER LT3042 IN 6.8µH 1µF LT8614 GND1 GND2 INTVCC BIAS NO CAPACITOR NEEDED AT THE INPUT OF THE LT3042 IF LOCATED LESS THAN THREE INCHES FROM THE LT8614’s COUT 100µA EN/UV PGFB 1µF MODE BST 0.1µF PG SW TR/SS 1M GND 4.7pF OUTS SET 5V 3.3µH FB Rt 1nF OUT PG GND VOUT 3.3V 200mA 4.7µF ILIM COUT(LT8614) 22µF 0.47µF 33.2k 243k 88.7k Figure 10. The LT3042 post-regulating LT8614 Silent Switcher regulator we recommend not placing a capacitor at the LT3042’s input, or minimizing it. A couple of inches of trace inductance connecting the LT8614 to the LT3042 input significantly attenuates the very high frequency power switch transition spikes. Some spikes still propagate to the output due to magnetic coupling from the LT8614’s “hot-loop.” Optimizing the LT3042 board orientation reduces the remaining spikes. Due to instrumentation bandwidth limitation, these very high frequency spikes are not shown in Figure 11’s output ripple. For perspective, trying to achieve 80dB rejection at 500kHz without using the ultrahigh PSRR LT3042 LDO is a tall order. Alternatives don’t measure up. For instance, an LC filter would require nearly 40µ H of inductance and 40µ F of capacitance to achieve 80dB rejection at 500kHz , adding large, expensive components. Costs and board real estate aside, the LC can resonate if not properly damped, adding complexity. Using an RC filter is untenable, requiring impractical resistance to achieve 80dB rejection. Similarly, using conventional LDOs require cascading at least two of them to achieve 80dB rejection at 500kHz , which requires additional components and cost, and degrades the dropout voltage. Figure 11. The LT3042 post-regulating the LT8614 Silent Switcher (a) without any capacitor at the LT3042 input, (b) with a 4.7µF capacitor at LT3042 input (a) (b) Input Ripple Input Ripple 10mV/DIV 10mV/DIV Additionally, to achieve 80dB rejection, these alternatives also require attention to magnetic field couplings. In particular, high frequency AC currents must be minimized. Owing to its ultrahigh PSRR over a wide frequency range, the LT3042 allows lower frequency operation of the upstream switching converter—for improved efficiency and EMI—without requiring any increase in filter component size for powering noise-sensitive applications. CONCLUSION The LT3042’s breakthrough noise and PSRR performance, coupled with its robustness and ease-of-use, make it ideal for powering noise-sensitive applications. With its current-reference based architecture, noise and PSRR performance remain independent of the output voltage. Additionally, multiple LT3042s can be directly paralleled to further reduce output noise, increase output current and spread heat on the PCB. n NOTES *Proper measurement of noise and PSRR at these levels requires extreme care and special instrumentation. These measurement processes will be comprehensively treated in a forthcoming Linear Application Note. 50µV/DIV 10µV/DIV Output Ripple Output Ripple 1µs/DIV 1µs/DIV April 2015 : LT Journal of Analog Innovation | 7 Boost-Buck LED Driver Topology for Automotive LEDs Operates with Low Input and Output Ripple Keith Szolusha Automotive LED drivers often require step-up/step-down DC/DC converters that can produce constant current at a voltage stepped up and stepped down from a varying input voltage (battery). Another important requirement for automotive applications is low EMI, namely, low input and output ripple. EMI requirements can be difficult to satisfy, as few of the most commonly used step-up/step-down DC/DC converter topologies can operate with both low input and low output ripple, while also meeting other requirements. These demands, however, are easily met by the unique, patent-pending, boost-buck topology described here. This new topology is not the only stepup/step-down topology available. There are a number of other topologies that can convert a wide-ranging input voltage to a VLED within that range. The most commonly used nonisolated step-up/ step-down LED driver topologies include: •4-switch buck-boost for very high power and efficiency The overall size of the combined boostbuck inductors (or coupled inductor) is similar to the single inductor in buck-boost mode. The input ripple is similar to a SEPIC, but the output ripple is much lower. The inductor size LED– Figure 1. The LT3952 8V–36V input to 6V–18V LED 1A boostbuck LED driver has low input and output ripple with 300:1 PWM dimming capability at 120Hz and 90% efficiency. There are advantages to each of these topologies, but none can produce both truly low input and output ripple. Linear Technology’s patent-pending “boostbuck” (boost-then-buck-mode) floating output LED driver topology features low input and output ripple, due to the input-and output-facing inductors (or coupled windings). In various ways, it resembles a single inductor buck-boost mode, a single-switch-node SEPIC and a positive version of a Cuk (which also has low input and output ripple, but requires a negative-referenced feedback circuit). 8 | April 2015 : LT Journal of Analog Innovation TG ISN 250mΩ ISP VIN 8V TO 36V • L2 L1 22µH 22µH 1µF 50V 10µF 50V DFLS260 • •positive-to-negative (buck-based) single inductor buck-boost. ES1B M1 6V TO 18V LED 1A 10µF 25V •coupled or uncoupled SEPIC •single inductor buck-boost mode LED+ 4.7µF 100V 499k VIN IVINP IVINN 365k SW GND EN/UVLO FB OVLO 93.1k VIN 100k Q1 LED– 22.6k VREF 1M LT3952 CTRL ANALOG DIM DIM 143k 3.3k 0.1µF ISN ISMON TG VC SS ISP PWM IVINCOMP 4.7nF ISP ISN RT SYNC/SPRD 287k 350kHz PWM TG OPENLED OPENLED SHORTLED SHORTLED INTVCC 100k 2.2µF L1: SUMIDA CDRH8D43-220NC (UNCOUPLED) L2: SUMIDA CDRH6D38-220NC L1A, L1B: COILCRAFT MSD1278-223ML (COUPLED) M1: VISHAY Si7309DN Q1: ZETEX FMMT591A 100k design features There are several step-up/step-down topologies, but none can produce both truly low input and output ripple. Linear Technology’s patent-pending “boost-buck” (boostthen-buck-mode) floating output LED driver topology features low input and output ripple, due to the input- and output-facing inductors (or coupled windings). LED– LED+ Figure 2. The LT3952 single inductor buck-boost mode LED driver used for comparison to Figure 1 boost-buck topology ES1B M1 6V TO 18V LED 1A TG ISN 10µF 25V 250mΩ ISP VIN 8V TO 36V L1 10µH DFLS260 1µF 50V 10µF 50V 4.7µF 100V 499k VIN IVINP IVINN 365k SW GND EN/UVLO Q1 FB OVLO 93.1k VIN 100k LED– 22.6k VREF 1M LT3952 CTRL ANALOG DIM 2.7k 0.1µF ISN TG VC SS ISP PWM IVINCOMP 2.2nF ISP ISN ISMON DIM 143k PWM TG OPENLED OPENLED SHORTLED SHORTLED RT SYNC/SPRD 287k 350kHz INTVCC 100k 100k 2.2µF L1: SUMIDA CDRH104R-100 M1: VISHAY Si7309DN Q1: ZETEX FMMT591A 100 1A ILED EFFICIENCY (%) 95 17.5V LED 90 14.5V LED 85 80 7.3V LED 9.7V LED 75 70 5 10 15 20 25 VIN (V) 30 35 40 Figure 3. Boost-buck efficiency of Figure 1 is as high as 90% with 12V input and 17.5V 1A LED string. A low EMI positive boost-buck can easily be built with a boost LED driver, such as the LT3952. is the same as a SEPIC, but with a single switch node instead of two (a smaller hot-loop) and without the complication of a coupling capacitor between the two windings. The input and output ripple resemble that of a low input and output ripple (inverting) Cuk converter, but again, with a single switch node instead of two, and most importantly, without the need for a negative-referenced circuit feedback architecture. BOOST-BUCK TOPOLOGY AND FLOATING LED OUTPUT Figure 1 shows a single switch 60V monolithic LT3952 LED driver with 4A peak switch current, which can be used as an automotive boost-buck LED driver. This 350kHz , 1A LED driver can power 6V to 18V of LEDs from an 8V to 36V input with up to 90% efficiency at maximum load. High conversion efficiency is a result of the powerful internal MOS switch. Efficiencies with various LED string voltages are shown in Figure 3. Like other LED drivers, the LT3952’s versatile single, low side power switch architecture can be used to power floating output step-up and step-down converters such as boost-buck and single inductor buck-boost mode. The LED string’s voltage reference to ground is not important since LED output is visible light only. Because of this, the unique floating LED driver topologies such as boost-buck and buck-boost mode are possible. The LT3952’s ability to PWM dim the floating LED string with the floating top gate (TG) pin PWM MOSFET driver easily supports floating LED loads. The boostbuck in Figure 1 can PWM dim at ratios of 300:1 and higher (at a “no-flicker” 120Hz). The high side TG driver effortlessly provides PWM dimming to boost, SEPIC, buck-boost mode, buck mode and boost-buck LED drivers. It even doubles as a short-circuit protection disconnect April 2015 : LT Journal of Analog Innovation | 9 100 PEAK AMPLITUDE (dBµV) The boost-buck LED driver topology can both step-up and step-down the inputto-output voltage as it regulates the LED current. Boost-buck duty cycle, efficiency, switch current and VOUT node voltage are the same as both single inductor buckboost mode and SEPIC. Here are some properties of the boost-buck LED driver: 80 70 FIGURE 1 BOOST-BUCK 60 50 40 30 20 10M FREQUENCY (Hz) separation of input and output windings prevents the output ripple current from coupling to the input capacitor of the boost-buck, thus reducing EMI. The EMI in Figure 4 shows low AM band EMI from 530kHz to 1.8Mhz, reducing the requirement for a large EMI input filter. • IL(P–P) = IL1(P–P) + IL2(P–P) LOW INPUT AND OUTPUT RIPPLE TOPOLOGY = LOW EMI Figure 2 shows an “equivalent” single inductor buck-boost driver—comparable to the boost-buck driver shown in Figure 1. Although there are similarities between the two, they differ greatly in input and output ripple. Figure 4 demonstrates the reduced conducted EMI of the boost-buck driver (Figure 1) versus the buck-boost mode version (Figure 2). The Figure 5 compares the input and output ripple paths of the boost-buck topology with those of a SEPIC converter, which does not have the same low output ripple. High ripple on either the input or output lines can radiate and increase EMI, especially if those lines are several meters INVERTING CUK SW1 • • SW2 L1 L2 S1 HOT LOOP –VOUT COUT SEPIC SW1 SW2 • VIN VOUT • L1 CIN S1 L2 HOT LOOP COUT SW1 S1 HOT LOOP L1 CIN • • FLOATING OUTPUT POSITIVE BOOST-BUCK LED DRIVER VIN L2 LED– COUT VOUT 10 | April 2015 : LT Journal of Analog Innovation 80 70 60 FIGURE 2 BUCK-BOOST MODE FIGURE 1 BOOST-BUCK 50 40 30 20 0 150k 10M FREQUENCY (Hz) Figure 4. (a) Figure 1 boost-buck conducted EMI is much lower than (b) Figure 2 buck-boost mode conducted EMI for 12V input, 18V, 1A LED string. • ISW(PEAK) = IIN + ILED + IL(P–P) /2 CIN AVERAGE VIN = 12V, VLED = 18V, 1A 10 0 150k • DC = VLED /(VIN + VLED) VIN 90 FIGURE 2 BUCK-BOOST MODE 10 • VOUT = VIN + VLED Figure 5. Boost-buck LED driver is similar to SEPIC LED driver topology 100 PEAK VIN = 12V, VLED = 18V, 1A 90 AVERAGE AMPLITUDE (dBµV) to protect against dreaded LED+-to-GND conditions. The LT3952 protects against and reports short-circuit and open LED conditions in boost-buck topology. LED+ long, as in a car. Mitigating radiated EMI with additional LC filtering on the output of an LED driver is not recommended, since it can inhibit optimal PWM dimming performance by slowing PWM transitions and causing unwanted ringing. The low ripple, output-facing inductor of the boost-buck yields the best combination of PWM dimming performance and low output EMI, similar to a buck-only converter. Note that the positive-to-negative single inductor buck-boost converter also has low output ripple and high bandwidth, but its input and output ripple are coupled into the large system input capacitance, creating greater conducted EMI. Both the input and output capacitors in the boost-buck topology easily filter low triangular ripple current equal to IL1(P–P) /√12. A bit more capacitance or inductance can further reduce EMI in this topology. Neither the input nor output capacitor is crucial in the converter’s high dI/dt hot-loop. In this topology, the critical hot-loop is constrained to the catch diode, OUT-to-GND capacitor, and the internal low side switch, as indicated in Figure 5, simplifying the layout. If the two inductors or windings of the boost-buck are tied together and the LED− node is connected to the input, the boost-buck is converted to buck-boost mode. In this scenario, the hot-loop currents and the input and design features 9V TO 16V 1µF 25V 200k 1% EN EN/UVLO M1 VIN TG 220nF L2 4.7µH BOOST 38.3k D1 INTVCC CTRLT VREF 2V 2.2nF 100k 10k 1% 10µF 25V ×2 LT3744 SGND FAULT CTRL1 CTRL2,3 30.1k 2V 0V PWM1 PWM2,3 10nF VEE 10k VEE VFNEG FB SS VC1 VC2,3 PWM_OUT2,3 RT LED_ISN VEE 1M D2 10µF 25V ×4 M2 BG LED_ISP VEE 10µF 50V ×4 L1 4.7µH 5mΩ PWM_OUT1 102k 400kHz VEE ISN ISP SW SYNC 4.7nF 12V TO 16V 3A LED 10µF VEE 71.5k VEE M2 10Ω 10Ω 20mΩ VEE M1, M2: INFINEON BSC067N06LS3 M3: INFINEON BSC010N04LS L1: WÜRTH 7443551470 4.7µH L2: WÜRTH 744325420 4.2µH D1: PMEG4002EB D2: PMEG4010 Figure 6. The LT3744 9V–16V input, 16V, 3A LED string positive-to-negative boost-buck LED driver has low input and output ripple and high 93% efficiency at 48W LED. output ripple currents can find their way onto the input and output capacitors, respectively, resulting in increased input and output ripple measurements. frequency boost response and higher frequency buck response of this boostbuck can be seen in both the loop Bode plots and in the transient response. LOOP ANALYSIS FOR STABILITY (SEPIC-LIKE CONTROL LOOP) POSITIVE-TO-NEGATIVE BOOSTMODE-THEN-BUCK TOPOLOGY WITH SIMILAR PERFORMANCE ADVANTAGES The control loop of the boost-buck converter has the personality of a SEPIC. The loop response can be measured with a network analyzer by injecting a noise perturbation into the ISN line and measuring the gain and phase of the loop response at the sense resistor. The uncoupled boost-buck in Figure 1 produces a 7kHz crossover frequency and well over 60° of phase margin and 10° of gain margin at 12V input to 18V VLED at 1A. If no network analyzer is available, the loop dynamics can be determined by the shape of LED current transient response waveforms when the CTRL input is toggled from 50% to 100% LED current or vice versa. The merged lower Another patent-pending boost-buck LED driver topology with low ripple input and output is shown in Figure 6. The LT3744 positive-to-negative boost-buck (boostmode-then-buck) is also a low input and output ripple LED driver, but instead uses using a synchronous step-down converter with negative regulation capability. when driving a high power LED string, such as the 3A, 48W LED load in Figure 6. Synchronous step-up and down boostbuck LED drivers are possible with both synchronous boost and buck LED drivers. CONCLUSION New, patent-pending boost-buck LED driver topologies from Linear Technology provide step-up and step-down input to VLED ratios with low input and output ripple. New LED drivers such as the LT3952 and LT3744 can be used for both simple and high power LED strings in automotive and industrial applications, where high power and low noise are crucial, without sacrificing PWM dimming performance. n This unique floating negative output topology takes advantage of the strengths of the synchronous step-down LT3744 LED driver with PWM and output flag level-shift capabilities. One of those strengths is the high efficiency that is only possible with a synchronous switching IC, especially April 2015 : LT Journal of Analog Innovation | 11 I2C Programmable Multichannel Voltage Supervisors with EEPROM Michael Petersen The LTC2933 and LTC2936 are 6-channel, I2C/SMBus programmable voltage supervisors with EEPROM. Table 1 shows Linear Technology’s broad line of programmable voltage supervisors and Power System Managers. The LTC2933 and LTC2936 are well suited for multirail systems that require accurate power supply overvoltage (OV) and undervoltage (UV) detection. UNMATCHED VERSATILITY •Comparator output mapping to dedicated comparator output pins (LTC2936 only) The following features can be configured, read, modified, and stored in the onboard EEPROM via the I2C/SMBus interface: • I2C/SMBus write protection •Two voltage thresholds for each of the six inputs •First fault snapshot The threshold settings for each channel are programmable over multiple voltage ranges and feature 256 settings per range (see Tables 2 and 3). Programmability eliminates the need to qualify, source or stock unique parts for different threshold voltages or other feature combinations. •Comparator polarity and mapping to GPIO pins • GPIO mode, polarity, and delay • GPI mode, polarity, and mapping to GPIO pins A snapshot of the first fault to occur after power-up is stored in the EEPROM, which can be used for debugging power failures in complex systems. These devices also record subsequent faults in the volatile memory. Both the instantaneous status and the fault history can be accessed remotely through the I2C/SMBus interface. Various combinations of faults and input signals can be mapped to any general purpose input-output (GPIO) pin, providing flexibility in application design. The GPIO pins can also be programmed to act as SMBus ALERT outputs. The Table 1. Feature comparison of Linear’s programmable voltage supervisors LTC2974 LTC2975 LTC2977 LTC2978 LTM ® 2987 L L L L L L L L L L L L L L L L L Monitor Telemetry L L L L L L Manage Faults L L L L L L L L L L L 4 4 8 8 16 LTC2933 LTC2936 LTC2970 Sequence Trim and Margin Supervise L L Create Fault logs L L Number of Channels 6 6 Autonomous Operation L L L L L L L LTpowerPlay GUI Support L L L L L L L L L L L L 9×9 QFN 9×9 QFN 9×9 QFN 9×9 QFN 15×15 BGA 2 PMBus Compliant Command Set Package 5×4 DFN 12 | April 2015 : LT Journal of Analog Innovation 4×5 QFN 4×5 QFN design features The threshold settings for each channel are programmable over multiple voltage ranges and feature 256 steps per range (see Tables 1 and 2). Programmability eliminates the need to qualify, source or stock unique parts for different threshold voltages or other feature combinations. LTC2936 has six dedicated comparator outputs (CMPn), which can be used in simple sequencing applications. An additional pair of auxiliary comparators, on the general purpose input (GPIn) pins, are available with 500mV preset thresholds and programmable polarities. The outputs of these auxiliary comparators can be mapped to any of the GPIOn pins, allowing the device to supervise up to eight inputs. The GPIn pins can also be configured to mask any UV faults (UVDIS), mask both UV and OV faults (MARG), act as a manual reset input (MR) or write protect the part (WP, LTC2936 only). Masking of the OV and UV faults can be used for sequencing or power supply margining purposes. An accurate linear regulator output (3.3V ± 2.5%) can be used as a reference voltage for level shifting negative power supply rails into a range where they can be supervised by the device. The high input impedance Precision Range enables this capability with an input current less than 10n A. This mode is available on V5 and V6 of the LTC2933 and all inputs of the LTC2936. The LTC2933 automatically selects the highest voltage applied on channels V1–V4 as the supply voltage. This increases system reliability when multiple power rails might fail in a multirail system. The LTC2936 uses a dedicated power supply input. This input can be driven by an external 3.3V regulator, or from a 3.4V to 13.9V power supply. Table 2. LTC2933 voltage threshold summary V1 V2–V6 Range High Medium Medium Low Precision Limits 2.5V–13.9V 1V–5.8V 1V–5.8V 0.5V–3V 0.2V–1.2V Step Size 50mV 20mV 20mV 10mV 4mV Table 3. LTC2936 voltage threshold summary V1–V6 Range Medium Low Precision Limits 1V–5.8V 0.5V–3V 0.2V–1.2V Step Size 20mV 10mV 4mV THRESHOLD ACCURACY In most applications, the supply voltages must be maintained within relatively narrow tolerances. The effective tolerance a supervisor can guarantee is a function of both the threshold setting resolution and the comparator accuracy. The LTC2933 and LTC2936 provide multiple threshold ranges, each with 256 threshold settings. By selecting the smallest range that encompasses the expected variation of the supply voltage being supervised, the error due to the threshold setting resolution can be minimized. The devices are also guaranteed to have less than 1% threshold error across a broad range of threshold settings. PREVENTING FALSE ALARMS False triggering of a supervisor can happen when excessive noise is present on the voltage rail being supervised. To handle this noise, the LTC2933 and 12V 5V 3.3V DC/DC CONVERTERS 2.5V 1.8V 1.5V Figure 1. Typical application 100nF SYSTEM V1 V2 V3 V4 V5 V6 220nF GPIO1 VDD33 MR GPIO2 LTC2933 GPI1 GPIO3 RST OV ALERT SDA GPI2 GND ASEL SCL April 2015 : LT Journal of Analog Innovation | 13 Table 4. LTC2933 slave addresses Table 5. LTC2936 slave addresses ASEL 0 HI-Z 1 ASEL0 0 Hi-Z 1 0 Hi-Z 1 0 Hi-Z 1 7-Bit Address 0x1C 0x1D 0x1E ASEL1 0 0 0 Hi-Z Hi-Z Hi-Z 1 1 1 8-Bit Address 0x38 0x3A 0x3C 7-Bit Address 0x50 0x51 0x52 0x53 0x54 0x55 0x58 0x59 0x5A 8-Bit Address 0xA0 0xA2 0xA4 0xA6 0xA8 0xAA 0xB0 0xB2 0xB4 LTC2936 internally filter these transients. Additionally, the GPIOn pins can be configured to have an output delay of up to 1.6s, which can also be used to mask transients on the supply. CONNECTING MULTIPLE OPENDRAIN OUTPUTS The GPIOn outputs of the LTC2933 and LTC2936 can be configured to address the needs of a wide variety of applications. The factory default output type is an active low, open-drain output. Multiple devices can pull the line low, in a wired-OR configuration, allowing a single line to communicate fault information from multiple supervisors. If configured as an ALERT output, this feature can be used to allow the SMBus master to determine which device triggered an alert by accessing all slave devices using the Alert Response Address (ARA) protocol. Only a slave device that asserted ALERT acknowledges the ARA by sending its address to the SMBus master and releasing the ALERT line. When multiple devices assert ALERT at the same time, arbitration of the returned address occurs, with the lowest address winning arbitration. By reading the ARA address until the ALERT line is released by all devices, a list of device addresses can be obtained and the SMBus master can take further action. WRITE PROTECTION delay times can be used to guarantee a minimum reset pulse width. The LTC2933 and LTC2936 contain writeprotect features that prevent accidental I2C/SMBus writes to the user configuration. By setting the lock bit, writes to any user configuration commands are ignored. To unlock the part, a user-configurable, 14-bit unlock key must be written. Additionally, the LTC2936 provides a hardware write-protect input as one of the configuration options for the GPIn pins. The manual reset input can also be configured to clear the fault history in volatile memory and re-enable the fault snapshot in EEPROM. This allows for a full pushbutton system reset. MARGINING Designing a robust system typically involves some form of power supply margining. The LTC2933 and LTC2936 have modes that allow the power supply voltages to be margined beyond their normal tolerances, without triggering faults, by configuring a GPIn pin as a margin (MARG) or UV disable (UVDIS) input and pulling the GPIn pin low during system margin testing. The MARG mode ignores both OV and UV faults as detected by the comparators, while the UVDIS mode ignores only UV faults from the comparators. Figure 2. Negative power supply monitor I 2C/SMBus INTERFACE The LTC2933 and LTC2936 are I2C/SMBus transmit/receive slave-only devices. The LTC2933 can respond to one of three addresses, depending on whether the address select pin is grounded, floating, or tied to the VDD33 supply pin (Table 4). All LTC2933 parts respond to the global address 0x1B (7-bit)/0x36 (8-bit), regardless of the address select pin. 5V DC/DC 5V 3.3V 3.3V 1.5V 1.5V –5V –5V R1 249k 0.22µF 0.1µF SYSTEM R2 100k VDD33 V1 V2 V3 V4 V5 MANUAL RESET Any GPIn pin can be programmed as an active low, manual reset input. This input can be mapped to any GPIOn pin to force a reset or trigger an interrupt. Programmable output 14 | April 2015 : LT Journal of Analog Innovation V6 GPIO1 GPIO2 GPI1 MR LTC2933 GPIO3 OV ALERT SDA SCL GND NOTE: INTERNAL GPI01-3 PULL-UP ENABLED RST ASEL GPI2 MARG design features 5V Figure 3. Five-supply power-up sequencer VIN VOUT 3.3V LT3028 SHDN 3.3V 10k VOUT 2.5V LT3028 SHDN 2.5V 10k VOUT LT3028 SHDN 1.8V 1.8V 10k –5V –5V VIN VIN VOUT LT3704 RUN/UVLO VIN 10k 12V VIN 270k 5V VOUT LTM4600 RUN GND CMP1 CMP2 CMP3 CMP4 VPWR GPIO1 GPIO2 GPI1 10k EN INT LTC2950-1 PB GND KILL VIN ON/OFF SYSTEM 1M V1 V2 V3 V4 LTC2936 GND ASEL0 ASEL1 0.1µF 0.1µF 100k V5 V6 CMP5 CMP6 SDA SCL GPI2 10k 10k 10k 10k DONE 12V STATUS VDD33 100k 0.1µF The LTC2936 has two ternary address select pins, allowing it to respond to nine different addresses (Table 5). All LTC2936 parts respond to the global address 0x73 (7-bit)/0xE6 (8-bit), regardless of the address select pins. Five Supply Power-Up Sequencer All threshold voltages and configurations for the comparators, GPIn pins, and GPIOn pins can be programmed and read back through the I2C/SMBus interface. The interface can also be used to read the current status, read the fault snapshot, clear the volatile fault history and store and restore configuration in EEPROM. When the pushbutton is pressed, the LTC2950-1 turns on the LTM4600 by taking its RUN pin high. The LTM4600 generates a 5V intermediate rail, which supplies the other four DC/DC converters. When the programmed UV threshold is reached on V1, the CMP1 output goes high enabling the 3.3V supply. When the programmed UV threshold is reached on V2, the CMP2 output goes high, enabling the 2.5V supply. Once all the converters have been enabled and power is good, CMP5 goes high, signaling the system that sequencing is complete. GPIO1 is configured to go high 6.4ms after CMP5, disabling the KILL input of the LTC2950-1. APPLICATIONS Negative Power Supply Monitor Figure 2 illustrates how to configure the LTC2933 to monitor a negative supply rail. A voltage divider from VDD33 is used to level-shift the negative supply into the input range of the LTC2933. The precision input range should be used to minimize the error caused by leakage current into the V5 pin. Figure 3 illustrates how to use the LTC2936 dedicated comparator outputs to enable DC/DC converters sequentially, at powerup. The system is powered by a 12V power source, which is also monitored. If the KILL input of the LTC2950-1 does not go high within 512ms of initial power-up, the LTC2950-1 disables the supplies by pulling the LTM4600 RUN pin low. Additionally, if the external 12V supply drops below its UV threshold, as measured on V6, CMP6 and GPIO2 go low, causing the LTC2950-1 to disable the LTM4600. CONCLUSION The LTC2933 and LTC2936 complement Linear Technology’s portfolio of voltage supervisors and Power System Managers. They are ideal for simple, yet flexible, power system monitoring and provide programmability, versatile features, and accurate supervision. n April 2015 : LT Journal of Analog Innovation | 15 18V Buck-Boost Converter with Intelligent PowerPath Control Delivers >2A at 95% Efficiency from Dual Inputs Eddy Wells The requirement to operate from multiple input sources is increasingly common for applications powered from various battery chemistries, wall adapters and DC voltage rails such as USB. The ability to provide step-up or step-down conversion is often necessary, depending on the voltage range of each input and the desired output voltage. While powering from multiple sources is conceptually straightforward, implementation can be complicated. Losses in the power path, prioritization of the input sources and voltage spikes resulting from inductive cable insertion can all add cost and complexity to the system. with the ability to deliver over 2A current to the load. The LTC3118’s current mode control architecture responds rapidly to line or load transients, maintaining tight regulation of the output. For battery powered applications, extended run times are achieved with Burst Mode® operation. The LTC3118 addresses these issues by combining a dual, low loss PowerPath controller with a high efficiency buckboost converter, as shown in Figure 1. The unique architecture allows conversion from either input source, VIN1 or VIN2, to a regulated output voltage, VOUT, which can be above or below either input. Operation up to 18V provides sufficient voltage margin for 12V nominal supplies. The converter supports power hungry designs LTC3118-BASED DESIGNS ARE FLEXIBLE, POWER EFFICIENT AND SMALL Figure 1. LTC3118’s dual buck-boost switch architecture A1 VIN1 VOUT D A2 SW1 VIN2 L SW2 B C GND 16 | April 2015 : LT Journal of Analog Innovation Multi-input designs are often implemented with external diode-OR circuits. Though low cost and simple, these circuits suffer efficiency losses from the active diode’s forward drop and reverse leakage current in the blocking diode at elevated temperatures. Ideal diode ICs from Linear Technology can be used to improve efficiency and minimize leakage, but are restricted to operating from the higher input source. Highest VIN operation is undesirable if the secondary source is higher voltage than the primary source where energy is more abundant. The LTC3118 offers operation in “priority” mode, where VOUT is powered from VIN1 (if present and valid) regardless of the voltage at VIN2 . Diode-OR operation is still available in “ideal diode” mode, with added hysteresis to prevent chatter when the inputs are GND VIN1 VOUT GND VIN2 GND Figure 2. LTC3118 demo board equal. As with ideal diode ICs, the forward diode drop is eliminated with the LTC3118’s all N-channel MOSFET design. For flexibility, each input source has an independent UVLO threshold, which should be programmed to set the input’s minimum operating voltage. Additional pins are available to provide the system with VIN and VOUT status, enabling improved monitoring and control. The intelligent PowerPath controller plus a single inductor buck-boost converter are integrated in a 4mm × 5mm QFN or 28-pin TSSOP package. The simplicity, flexibility and board area savings of this solution is unrivaled by either an ideal diode or conventional diode-OR power path, followed by a separate buck-boost DC/DC converter. The LTC3118 operates at a fixed 1.2MHz frequency, optimizing the trade-off between switching losses and external component size. A complete LTC3118-based system is shown in Figure 2, and is capable of providing over 24W of power in a 400mm2 footprint. design features 6.8µH + + VIN1 0.1µF SW1 BST1 BST2 SW2 Li-Ion 1100k RUN1 22µF FB 100k 100k CM1 CM2 CP1 CP2 47nF 10nF 10nF VC V1GD V2GD PGD 12V WALL ADAPTER SEL MODE 750k 100µF 70 60 50 PWM 40 30 POWER GOOD INDICATORS 20 VCC VIN2 + 80 1.2nF 60.4k BURST VIN1 VIN2 10 CN2 CN1 10V TO 14V 90 PGND 22pF LTC3118 100 100µF GND PGND 47nF 12V AT 800mA VOUT 402k EFFICIENCY (%) 0.1µF 6V TO 8.2V 0 0.0001 0.001 4.7µF 0.01 0.1 LOAD CURRENT (A) 1 10 RUN2 100k PGND Figure 3. (a) LTC3118 schematic (b) efficiency curves 2-CELL LI-ION OR WALL ADAPTER TO 12V OUTPUT WITH IMPROVED SWITCHOVER PERFORMANCE Figure 3 shows an application where a 2-cell Li-ion battery is placed on VIN1 and a 12V wall adapter is placed on VIN2 . In this example, ideal diode mode is selected to force operation from the 12V adapter when present. As shown, high efficiency is achieved over a wide load range from either input source. The battery is placed on VIN1 in this application as VIN1 has lower RDS(ON) MOSFETs and is able to support slightly more load current at low VIN in step-up mode. Maximum load current is limited to 800m A when operating from the low end of the battery’s voltage range at 6V. If needed, the power good indicator V2GD can be monitored to allow increased load current when the 12V adapter is present. Designs with multiple sources often involve “hot plugging” a power source, such as the wall adapter, causing noise and inductive ringing at the input. These transients can be mitigated by reducing the inductance of the cable or increasing the amount of capacitance and/or resistance at the input terminals, but this is impractical in some systems. A LTC3118based design is better able to manage these transitions and transients in several ways. The wide 2.5V to 18V input voltage range is tolerant of inductive cable ringing in both the positive and negative directions. Separate RUN1 and RUN2 pins allow custom UVLO levels to be set for each input, as shown in Figure 3. 12VOUT TRANSIENT 500mV/DIV VIN2 5V/DIV Figure 4a shows a hot-plug event where an inductive cable is inserted on VIN2 in ideal diode mode. As shown, the 12V wall adapter overshoots to 17V due to the inductance of a long cable. Figure 4b shows the response when the cable is unplugged. As shown, the LTC3118 operates from VIN2 until its UVLO engages around 9V and operation from VIN1 resumes. In both cases the average current loop commands the necessary inductor current rapidly, resulting in minimal transients at the output with a 100µ F capacitor. VOUT = 12V CABLE INSERTION CABLE REMOVAL VIN2 = 12V VIN1 = 6V VIN1 5V/DIV SWITCHOVER TO VIN2 SWITCHOVER TO VIN1 INDUCTOR CURRENT 2A/DIV 100µs/DIV 200µs/DIV Figure 4. (a) Wall adapter plugged in (b) wall adapter unplugged April 2015 : LT Journal of Analog Innovation | 17 3.3µH 0.1µF VIN1 + 0.1µF BST1 SW1 SW2 BST2 232k SYSTEM POWER 402k RUN1 22µF 5V UP TO 1.5A, VIN > 4.5V VOUT 100µF FB PGND PGND CM1 CM2 CP1 CP2 47nF 10nF LTC3118 10nF 7.5V TO 12.6V + + + 22µF V1GD V2GD PGD CN2 CN1 VCC VIN2 SEL 80 1.8nF 40.2k POWER GOOD INDICATORS 70 60 PWM 50 40 30 4.7µF 20 BAT-54 SCHOTTKY DIODE VIN1 VIN2 10 MODE 523k Li-Ion VC BURST 90 GND 22pF 47nF 100 100k 100k EFFICIENCY (%) 4V TO 5.5V 0 0.0001 RUN2 0.001 100k 0.01 0.1 LOAD CURRENT (A) 1 10 PGND Figure 5. (a) LTC3118 schematic (b) efficiency curves A second LTC3118-based application is shown in Figure 5. In this example, the 3-cell Li-ion battery stack is placed on VIN2 , where VIN1 is used for the USB input. Since operation from the lower voltage USB input should be favored when available, the LTC3118 is set to VIN1 Priority mode. When operating from the USB, VIN1 and VOUT will be similar in voltage. At the boundary between step-up and stepdown modes, the LTC3118’s internal PWM circuit seamlessly transitions, resulting in minimal inductor and output voltage jitter. Burst Mode operation provides improved efficiency at light load from either source, as shown in Figure 5b. While light load efficiency is clearly important for the battery input, the USB input may benefit as well if powered from another portable device. The LTC3118’s average current mode control provides excellent load step response, even in Burst Mode operation. Figure 6a shows the transition from a 100m A load where the part operates in Burst Mode, to a 600m A load step where the LTC3118 enters PWM mode quickly, minimizing the VOUT transient. Note that USB 3.0 supports up to 1.5A for charging, but is restricted to 900m A during data transfer, the proposed USB 3.1 standard supports up to 2A. Since the LTC3118 has a fixed inductor current limit of 3A (minimum), the maximum amount of load current that can be supported in (or approaching) step-up mode is reduced with VIN as shown in Figure 6b for both 5V and 12V outputs. This is an important consideration when determining the input source voltages as they relate to the required output voltage and power budget for the load. If the LTC3118’s VCC supply is back-fed from the 5V output as shown in Figure 5a, maximum load current at low input voltages can be improved, as shown in Figure 6b. 3.5 VOUT 200mV/DIV MAXIMUM LOAD CURRENT (A) USB/SYSTEM POWER OR 3 Li-Ion CELLS IN PRIORITY MODE WITH BURST ENABLED TO IMPROVE BATTERY LIFE IL 2A/DIV ILOAD 1A/DIV VC 200mV/DIV DIODE FROM VOUT = 5V TO VCC 3.0 2.5 5VOUT L = 3.3µH 2.0 12VOUT L = 6.8µH 1.5 1.0 0.5 100µs/DIV VIN1 = VIN2 = 5V 100mA to 1A LOAD STEP 0 2 4 6 8 10 12 14 VIN1 OR VIN2 VOLTAGE (V) 16 18 Figure 6. (a) Load step performance in Burst Mode operation. (b) Maximum load current for 5Vout and 12Vout 18 | April 2015 : LT Journal of Analog Innovation design features 3.3µH 0.1µF 0.1µF BST1 SW1 10.5V TO 14.5V SW2 BST2 VIN1 + LEAD ACID BATTERY OR 12V SYSTEM POWER 402k RUN1 22µF 100k PGND CM1 CM2 CP1 CP2 47nF 10nF GND LTC3118 CAPACITOR BACKUP + CN2 CN1 VIN2 VCC 22µF PGND 22pF 40.2k 1.8nF VCC BACK FED FROM VOUT FOR LOW VIN OPERATION POWER GOOD INDICATORS BAT-54 SCHOTTKY DIODE 4.7µF SEL 2M 10mF VC V1GD V2GD PGD 10nF 18V MAX, RUNS DOWN TO 2.2V 47µF FB 100k 47nF 5V VOUT 768k MODE RUN2 VIN2 10V/DIV VIN1 10V/DIV VOUT 5V/DIV INDUCTOR CURRENT 1A/DIV 200ms/DIV PGND 40.2k 40.2k CAN’T RUN FROM VIN2 UNTIL VOUT STARTS UP Figure 7. Backup system holds up system for more than one second to allow for data storage BACKUP SYSTEM Figure 7 shows a backup power system where the primary power source on VIN1 is supplied by a 12V system rail or lead acid battery. A 10mF capacitor reservoir on VIN2 is charged up to 18V from a separate supply not shown. In the event the priority VIN1 supply is interrupted, the V1GD indicator transitions high to alert the system, and the LTC3118 commences operation from VIN2 to keep VOUT in regulation. A scope photo of the backup event is shown in Figure 7, where a 200m A load is supported for over a second to allow a controlled shutdown. Available energy at the input is given by: ( 1 2 2 EIN = CIN • VINITIAL − VFINAL 2 10mF • 18 2 − 2.22 2 = 1.6J = ) In this case, a constant 200m A load is drawn from the LTC3118 as the VIN capacitors are depleted in 1.35 seconds. Output energy is 1.35 joules resulting in an average conversion efficiency of 84% including the supercapacitor losses. EOUT = IOUT • VOUT • t = 200mA • 5 • 1.35 = 1.35J VCC is back fed from VOUT, allowing VIN2 to operate down to 2.2V during the event. The RUN2 pin is connected between VIN2 and VOUT in this case, requiring system power on VIN1 to initially start-up VOUT and ensure clean shutdown behavior as VIN2 decays during the backup event as shown. The storage capacitance and voltage on VIN2 can be easily modified depending on the requirements of the system. SUMMARY The LTC3118 combines an intelligent PowerPath controller with a single inductor buck-boost converter, resulting in a compact platform for multi-input designs. The wide input/output voltage range and ability to support 2A of load current in step-down mode provides a robust solution for a wide variety of applications. The LTC3118’s unique switch architecture allows operation from the higher or lower input voltage to a regulated output voltage. The IC contains the necessary control and indicator pins to give the designer maximum system flexibility. Average current mode control provides rapid response for output load steps or input line steps during switchover. With Linear’s latest generation buck-boost core and Burst Mode operation, both low noise and high efficiency can be achieved. n April 2015 : LT Journal of Analog Innovation | 19 What’s New with LTspice IV? Gabino Alonso —Follow @LTspice at www.twitter.com/LTspice —Like us at facebook.com/LTspice BLOG BY ENGINEERS, FOR ENGINEERS Check out the LTspice® blog (www.linear.com/solutions/LTspice) for tech news, insider tips and interesting points of view regarding LTspice. New Article: “Loop Gain and its Effect on Analog Control Systems” by Simon Bramble www.linear.com/solutions/5587 This article brings together the concepts of open loop gain, closed loop gain, gain and phase margin, and minimum gain stability, and shows how these parameters are interrelated in a feedback system. It examines loop gain in terms of a theoretical control system as well as practical electronic circuits, including linear regulators. SELECTED DEMO CIRCUITS For a complete list of example simulations utilizing Linear devices, please visit www.linear.com/democircuits. Linear Regulators • LT3063: 1.8V Low noise regulator with output discharge (2.3V to 1.8V at 200m A) www.linear.com/solutions/5246 with dual LDOs (6V–40V to 5V at 200m A, 2.5V/3.3V at 100m A) www.linear.com/solutions/5359 • LT8609: 5V, 2MHz , μPower step-down regulator (5.5V–40V to 5V at 2A) www.linear.com/LT8609 EMI regulator (4V–20V to 1.5V at 5A) www.linear.com/solutions/5613 IV is a high performance SPICE simulator, schematic capture and waveform viewer designed to speed the process of power supply design. LTspice IV adds enhancements and models to SPICE, significantly reducing simulation time compared to typical SPICE simulators, allowing one to view waveforms for most switching regulators in minutes compared to hours for other SPICE simulators. LTspice IV is available free from Linear Technology at www.linear.com/LTspice. Included in the download is a complete working version of LTspice IV, macro models for Linear Technology’s power products, over 200 op amp models, as well as models for resistors, transistors and MOSFETs. 20 | April 2015 : LT Journal of Analog Innovation converter (3.2V–26V to 5V at 350m A) www.linear.com/solutions/5228 Constant Voltage, Constant Current Regulators • LT8705: Bidirectional buck-boost • LTM4625: 5A buck µModule LTspice® • LTM8046: 5V isolated flyback voltage, constant current bench supply (10V–40V to 0-25V at 0A–3.1A) www.linear.com/solutions/5086 • LT3667: 40V step-down regulator step-down converter (5.7V–42V to 5V at 5A) www.linear.com/solutions/5635 What is LTspice IV? Isolated Converter • LT3081/LT8612/LTC3632: 24V 3A constant Buck Regulators • LT8640: 5V 2MHz μPower ultralow output current monitor (7V–58V to 24V at 3A) www.linear.com/solutions/5694 • LTM4630: High efficiency single 36A step-down regulator (4.5V–15V to 1V at 36A) www.linear.com/solutions/5618 supercapacitor backup supply (36V–80V to 15VCAP at 1A) www.linear.com/solutions/1751 SELECT MODELS To search the LTspice library for a particular device model, choose Component from the Edit menu or press F2. Isolated Converter • LTM8057: 3.1V–31V VIN isolated µModule DC/DC converter www.linear.com/LTM8057 Supercap Charger Buck-Boost Regulators • LT3790: 240W high efficiency parallel buck-boost regulator (8V–6V to 12V at 10A) www.linear.com/solutions/5464 • LTM8055: High efficiency buck-boost regulator with accurate current limit & output current monitor (5V–36V to 12V at 6A) www.linear.com/solutions/5690 • LTM8056: High efficiency buck-boost regulator with accurate current limit & • LTC3355: 20V 1A buck DC/DC with integrated supercap charger and backup regulator www.linear.com/LTC3355 Linear Regulators • LT3086: 40V, 2.1A low dropout adjustable linear regulator with monitoring and cable drop compensation www.linear.com/LT3086 design ideas Buck Regulators USB 5V, 2.5A output, 35V input buck with cable drop compensation www.linear.com/LT3697 • LT3697: • LT8610AC: 42V, 3.5A synchronous step- down regulator with 2.5µ A quiescent current www.linear.com/LT8610AC • LT8613: 42V, 6A synchronous step-down regulator with current sense and 3µ A quiescent current www.linear.com/LT8613 • LTM4623: Ultrathin 20V VIN , 3A step- Boost/SEPIC/Inverting Regulator • LT8580: Boost/SEPIC/inverting DC/ DC converter with 1A, 65V switch, soft-start and synchronization www.linear.com/LT8580 n down DC/DC µModule regulator www.linear.com/LTM4623 Power User Tip SPEED UP YOUR SIMULATIONS LTspice is designed from the ground up to produce fast circuit simulations, but there is margin in some simulations to increase the speed. Note, there may be trade-offs in accuracy using the methods described here. For further details on any of these approaches, please refer to the LTspice Help File (F1). To measure the effects of your changes, review the simulation time in the LTspice error log (Ctrl + L). Reduce Power Supply Start-Up Time Reduce the time required for switch mode power supply (SMPS) simulation by shortening the voltage ramp of the output by changing the value of the softstart capacitor. Before doing so, make sure you have a good understanding of the power supply’s start-up performance. Then, reduce the soft-start capacitor value—using 0.001µF instead of the of the 0.1µF default—to quickly ramp to the desired output voltage. Set the Initial Conditions Similarly, it might be effective to use the .ic spice directive to set initial conditions for selected nodes. For example, specify the initial voltage on the output so that it is close to regulation when the simulation starts. Likewise, you can specify the voltage at the compensation node to eliminate the initial droop at start-up. .ic V(out)=11 V(vc)=1 Reduce the Amount of Transient Analysis Data Normally, LTspice transient analysis starts at time = 0. You can edit the .trans simulation command’s “Time to start saving data” to delay saving until a later time of interest, thus decreasing your overall simulation time. Of course this assumes you do not need the initial data points, which are not saved. If you prefer to save a difficult to solve DC operating point, you can use the .savebias command to save the preferred solution to a file in the initial simulation, and then in subsequent simulations, use the .loadbias command to quickly find the DC solution before proceeding with the rest of the simulation. Note that the soft-start capacitor should not be decreased to the point where the rising output allows the VC/Ith pin to ramp well beyond its nominal control point and slew further down to stop overshoot. Delay the Application of the Load to a Power Supply Another effective technique to speed up simulation of an SMPS is to delay application of the load via a voltage controlled switch (SW). By using a switch that turns on the main load when the output voltage is near regulation (or at a known time), all the SMPS output energy goes into charging up the large output capacitors prior to the load being applied. A simpler approach can be achieved using a current load configured with a pulse function. simulation, you can select Esc to skip finding the initial operating point and continue with the simulation. Likewise you can also “Skip initial operating point solution” by editing the simulation command. Use .savebias directive in initial simulation: .savebias filename.txt internal time=10m Used .loadbias in subsequent simulations: .loadbias filename.txt Alternately, if you are only interested in a few node voltages and device currents, you can restrict the quantity of saved data by using the .save directive to save only those specific node voltages and device currents. In the directive, add the “dialogbox” option to display all available nodes and currents so you can choose to save additional data of interest. .save V(out) I(L1) V(in) dialogbox Skip the Initial Operating Point Solution Occasionally you will notice that a simulation stays in “Damped Pseudo-Transient Analysis” for a long period of time (see the lower left corner of the window for simulation status information). This usually occurs when a DC solution is sought in order to find the operating point of the circuit. If it is acceptable in your Convert to Fast Access Format When Viewing Waveforms To maintain fast simulation speed, LTspice uses a compressed binary file format that allows additional simulation data to be quickly appended on the fly. However, once the simulation has completed, this format is non-optimal for waveform viewing. To speed up waveform plotting after the simulation is complete, convert the file to an alternate, “Fast Access,” format. Click in the waveform window and choose Files > Convert to Fast Access. This can also be implemented using the .option fastaccess directive: .option fastaccess It is important to note that in some simulations this conversion may take longer than the actual simulation. Happy simulations! April 2015 : LT Journal of Analog Innovation | 21 Can’t Find the Right Synchronous Boost LED Driver? Use a Synchronous Buck Converter Instead: Boost Mode Topology Drives 25V, 3A LEDs from 12V Keith Szolusha Synchronous buck converter drivers are commonly used when the current required for high power LEDs, such as 10A–40A projector LEDs, would overstress the components in a nonsynchronous converter. Synchronous rectification limits power losses and thermal rise due to high current in the converter switches. Synchronous rectification can offer the same benefits in high power step-up (boost) LED drivers—even with 1A to 3A LEDs. In contrast to a buck converter, the peak switch current of a boost can be much higher than the LED current, especially when output power is high and the input voltage is low. For instance, take the LT3744 40V synchronous buck LED driver, which is designed to drive high current LEDs for projectors. It features a versatile, floating VEE output that allows it to be used in both high current buck applications and positive-tonegative (buck-boost) topologies where There are a number of situations where a synchronous boost LED driver is not available for a particular application. For some of these cases, a synchronous buck LED driver IC can be used, but instead of operating as a step-down converter, it operates as a step-up, or boost mode* LED driver. Figure 1. Boost mode 9V–16V input to 25V, 3A LED driver with 98% efficiency VIN 9V TO 16V VIN SGND 200k TG EN/UVLO EN/UVLO 1µF 25V M1 220nF D1 INTVCC CTRLT VREF 2V 2.2nF 100k 10k 2V 0V VEE VFNEG ISP ISN L1 4.7µH 10µF 5mΩ VEE VC2 VC3 20k VEE 680pF VEE 102k VEE 22 | April 2015 : LT Journal of Analog Innovation LT3744 BOOST MODE LED DRIVER The LT3744 synchronous boost mode LED driver shown in Figure 1 regulates a 3A, 25V (75W) LED string from an automotive input (9V–16V) at 98% efficiency. Even at this power level, the maximum component temperature rise is 45ºC with a 12V input, as shown in Figure 2. The IC enables easy implementation of both 10:1 analog and 100:1 PWM dimming at 120Hz with ground-referred input signals, even though neither the LED string nor the PWM dimming MOSFET are connected to GND. Although the 5mΩ sense resistor sets a 10A peak switch current in this application, the solution can be altered to operate with a 6V input and a 15A peak switch current; with an appropriately valued inductor and a lowered undervoltage lockout. 1M 43.2k VEE RT 4× 10µF 50V M2 PWM1 FB PWM2 PWM3 SYNC PWM_OUT2 PWM_OUT3 PWM_OUT1 SS LED_ISP VC1 10nF VEE BG FAULT CTRL1 CTRL2 CTRL3 30.1k VEE LT3744 SW 25V 3A LED 2× 10µF 25V BOOST 30.9k the anode of the high current LED is connected to ground to satisfy heat-sinking requirements. It is the floating VEE feature that allows us to effectively use this part, originally designed for buck applications, as a synchronous boost mode LED driver. M3 20mΩ LED_ISN M1, M2: INFINEON BSC026N04LS M3: INFINEON BSC010N04LS D1: PMEG4002EB D2: PMEG4010 L1: WÜRTH 7443551470 4.7µH VEE D2 The negative VEE rail on the LT3744 can reach −21V. The LT3744 simplifies design by handling the level-shifting of ground referenced input control signals. design ideas Synchronous rectification is a feature commonly called on to limit power losses in high power LED drivers. As shown, a synchronous buck LED driver can be used as a boost mode converter, capitalizing on the wide availability of this feature in high performance buck regulator ICs. A simple ground referenced PWM input signal is level shifted to PWMOUT, so no additional level shifting circuitry is required to control the PWM MOSFET. Likewise, the LED current-setting sense resistor can be tied directly to the negative VEE rail, all the way down to −21V. LEVEL-SHIFTED GND AND V EE The level-shifting, positive-to-negative conversion, feature of the LT3744 LED driver is designed to support high current grounded-anode LED drivers. Nevertheless, the same feature can be used for boost mode applications where the LED string is connected between VIN and a negative VEE potential. Because the Figure 3. Boost mode current ripple, duty cycle and voltage stress are the same as those of traditional boost regulators. VIN = 12V VLED = 23.45V ILED = 3A NO FORCED AIR Figure 2. Boost mode LED thermal scan shows cool operation. LED sense resistor and PWM dimming MOSFET are both located at the bottom of the LED string, the level-shifted no more complicated than a traditional S2 L1 L1 VOUT VIN CIN PWMOUT signal from the ground-referred PWM input yields a topology that looks S1 VIN = LED+ VIN COUT + CIN COUT S2 S1 VOUT = VLED – VEE (NEGATIVE) = LED– CONTINUOUS MODE CURRENT VOLTAGE VOUT S1 VIN 0 VOUT D1 L1 0 VIN 0 VIN – VOUT VOUT COUT VIN CONTINUOUS MODE IIN 0 VOUT S1 0 IOUT 0 D1 IOUT 0 L1 0 IOUT 0 CURRENT VOLTAGE IOUT 0 VIN 0 VOUT VIN 0 IOUT 0 0 VIN 0 VIN – VOUT VOUT COUT IIN IOUT 0 0 IOUT 0 0 IOUT 0 April 2015 : LT Journal of Analog Innovation | 23 The LT3744 synchronous buck LED driver can be used as a high efficiency 9V–16V input, 25V LED 3A boost mode LED driver, yielding 98% efficiency for a 75W converter. The unique ability of this IC to level shift control signals as needed from SGND to –VEE makes it possible to produce a floating boost mode topology with no more components than needed in a traditional boost. boost PWM dimming setup. The input side looks like a straightforward LED driver, with CTRL analog dimming, SYNC input and enable inputs all referred to signal GND, no matter where negative VEE lies. The LT3744’s VEE can go all the way down to −21V. Open LED overvoltage protection is set at about 26.5V for the 25V VLED application. With some open LED overshoot in mind, this limits the VIN minimum to about 6V for a 25V VLED boost mode application before negative VEE goes beyond the −21V limit. To operate at the minimum 6V input, the solution in Figure 1 requires a lower undervoltage lockout and a sense resistor and inductor that can accommodate 15A peak switch current limit. With lower VLED strings (at any current level), the minimum input voltage can be dropped to 4V VIN with some simple adjustments. MORE ABOUT BOOST MODE CONCLUSION A boost mode converter has many of the same properties of traditional boost regulators. As shown in Figure 3, with the exception of the unusual topological hookup and the main control of high side switch S1 instead of a low side switch, this boost mode converter features the same duty cycle, ripple current and voltage stress that a tradition boost converter would. If synchronous rectification is not required, a nonsynchronous buck regulator can be used as a boost mode driver, with S2 replaced by a typical catch diode D1, as in a traditional boost regulator. Synchronous rectification is a feature commonly called on to limit power losses in high power LED drivers. As shown here, a synchronous buck LED driver can be used as boost mode converter, capitalizing on the wide availability of this feature in high performance buck regulator ICs. Specifically, the LT3744 synchronous buck LED driver can be used as a high efficiency 9V–16V input, 25V LED 3A boost mode LED driver, yielding 98% efficiency for a 75W converter. The unique ability of this IC to level shift control signals as needed from SGND to –VEE makes it possible to produce a floating boost mode topology with no more components than needed in a traditional boost. n The gain-phase Bode plot in Figure 4 shows that even the control loop of boost mode converter acts like a traditional boost regulator. With a 10kHz crossover frequency, 60° of phase margin, and −15dB of gain margin, the LED driver shown in Figure 1 is stable and reliable. 60 180 50 150 40 120 30 90 20 60 10 30 0 0 –10 –30 –20 –60 –30 –90 –40 –120 –50 –150 –60 24 | April 2015 : LT Journal of Analog Innovation 1 10 FREQUENCY (kHz) –180 100 PHASE (DEGREES) GAIN (dB) Figure 4. Boost mode control loop gain and phase shows typical bandwidth. Notes: * Boost mode is a patent pending technology. design ideas How to Design an Isolated, High Frequency, Push-Pull DC/DC Converter Dawson Huang A simple push-pull DC/DC converter with a fixed 50% duty cycle is often used as a low noise transformer driver in communication systems, medical instruments and distributed power supplies. This simple scheme provides no voltage regulation—requiring a low dropout (LDO) post regulator—a combination that presents potentially serious problems. First, any significant variation in the driver’s input voltage, along with the fixed 50% duty cycle, can increase the differential voltage across the LDO, resulting in significant power losses and high temperature rise in the LDO. Second, low switching frequency requires relatively bulky transformers, sometimes occupying 30% to 50% of the converter space. The LT3999 monolithic DC/DC push-pull driver avoids these issues with two important features: duty cycle control and high frequency operation: •Duty cycle control allows compensation for wide VIN variation—something standard fixed duty cycle transformer drivers cannot do—greatly reducing LDO loss when facing a wide input range. •High switching frequency, up to 1MHz , leads to smaller transformers and lower output ripple. wide input range, the other for a compact high frequency transformer driver with fixed input voltage. The LT3999 combines these two features with high 36V input voltage and 1A input current capabilities, making it a high power and flexible low noise push-pull converter IC. PUSH-PULL DC/DC CONVERTER DESIGN FOR WIDE RANGING INPUT This article presents two step-bystep design procedures: One for a push-pull DC/DC converter with a The flowchart in Figure 1b shows how a push-pull converter can be designed in eight simple steps. These steps produce the LT3999 10V–15V input, ±12V output, 200m A 1MHz pushpull converter shown in Figure 1a. Figure 1. (a) LT3999 push-pull DC/DC converter with wide input range and duty cycle control (b) Easy 8-step push-pull converter design (a) APPLICATION SPECIFICATIONS fSW, VIN(MIN), VIN(MAX), VOUT1, IOUT1, IOUT2 (b) 1 RT UVLO & OVLO/DC 2 VIN(MIN) TO VIN(MAX) R1 CIN SYNC R3 2 R2 RDC R4 ILIM/SS 1 RT RBIAS CSS RBIAS 7 6 L1 • C1 D2 • • D3 GND U1 POSITIVE LDO 3 N = NP:NS 4 RECTIFIER 5 INDUCTOR 6 LDO 7 SNUBBER 8 VOUT COUT1 L2 D4 RDC RD SWB RT RDC • C3 LT3999 OVLO/DC 3 5 D1 T1 SWA UVLO R4 4 8 VIN C2 U2 NEGATIVE LDO –VOUT COUT2 April 2015 : LT Journal of Analog Innovation | 25 The LT3999 is a monolithic DC/DC transformer driver, which features duty cycle control, high frequency and high power. It allows a wide input voltage range and low loss at the LDO, while using small passive components due to the high frequency operation. It also features input voltage up to 36V and input current up to 1A. VIN RA RB UVLO OR OVLO/DC RA2 UVLO RA1 OVLO/DC 1 RB R A1 = R A2 (a) RB = 143k. Calculations 5 and 6 give DCMAX = 0.43, and RDC = 13.3k. calculated by equations 3 and 4 for UVLO and OVLO/DC, respectively. RA2 can be chosen around 1MΩ. VIN VIN(MAX ) VIN(MIN) (b) 1.25 Figure 2. Setting the precision UVLO and OVLO/ DC via resistor divider using either (a) a 2-resistor method or (b) a 3-resistor method. (3) 1 RB = R A2 = VIN(MAX ) VIN(MIN) (4) VIN(MIN) = 10V, RA = 1M, RB = 143k. RT = 12.1k sets fSW = 1MHz. VIN(MAX) = 15.5V, RA = 1M, RB = 86.6k. Step 2: Set the Input Voltage Range (UVLO, OVLO/DC) Step 3: Set the Maximum Duty Cycle (R DC(MAX)) The UVLO (undervoltage lockout) and OVLO/DC (overvoltage lockout/ duty cycle) pins are used to set input voltage range. Either a 2- or 3-resistor method can be used. For the 2-resistor method shown in Figure 2a, RB is calculated using equations 1 and 2 for UVLO and OVLO/DC, respectively. For low loss, we can assume R A = 1MΩ. The maximum duty cycle (DCMAX) is determined by the switching period (TS = 1/fSW) and non-overlap time (TD(MIN)) between the two power switches, as shown in equation 5. For the 2-resistor method, RDC is calculated by equation 6. For the 3-resistor method, substitute R A = R A1 + R A2 in equation 6. For UVLO: For OVLO: RB(UVLO) = RA VIN(MIN) 1.25 RB(OVLO) = RA VIN(MAX) 1.25 DCMAX = (1) (2) 1 For the 3-resistor method shown in Figure 2b, R A1 and RB are 26 | April 2015 : LT Journal of Analog Innovation TS − 2TD(MIN) 2TS (5) RB • R T • DCMAX • 4 R A + RB 1.25 (6) RDC 1 = VIN(MIN) • In the Figure 1(a) example, TS = 1µs, TD(MIN) = 70ns (typical value in the data sheet), VIN(MIN) = 10V, R A = 1M, Ns Np VOUT1 + VOUT2 + VLDO1 + VLDO2 + 2VF (7) 2 ( VIN(MIN) − VSW ) • 2DCmax VSW is the switch saturation voltage for internal switches. VF is the forward voltage of the rectifier diodes. VLDO1 and VLDO2 are the dropout voltages of the positive and negative LDOs. VSW = 0.4V, VF = 0.7V, VLDO1 = VLDO2 = 0.8V are good 1 For the 2-resistor method used in Figure 1a: First, set the switching frequency with RT; the value chosen from Table 1 in the LT3999 data sheet. The transformer turns ratio is represented in equation 7. N= VIN(MIN) 1.25 Step 1: Set the Switching Frequency (R T) Step 4: Select the Transformer (T1) VIN(MIN) rules of thumb. If a commercial transformer with an exact calculated turns ratio cannot be found, select one that is close and calculate DCMAX in equation 7 accordingly. Then, recalculate RDC in equation 6 based on new DCMAX . In the Figure 1(a) example, VOUT1 = −VOUT2 = 12V and VIN(MIN) = 10V, so choose Wurth 750314781(N = 2) for DCMAX = 0.43. Step 5: Design the Rectifier (D1, D2, D3 and D4) The peak voltage across the rectifier bridge is composed of the transformer secondary side voltage (VSEC) plus any ringing voltage spikes. VSEC is calculated using equation 8. The ringing voltage spike, however, is difficult to predict, as it depends on the loop resistance, the leakage inductance of the transformer, and the junction capacitance of the rectifiers. As general rule, the rectifier voltage rating (VREC) should be at design ideas 7 3.5 7 3.5 6 3 6 3 VDIFF (V) 5 2.5 POWER LOSS 4 2 3 1.5 2 VDIFF 1 0 10 11 12 13 VIN (V) 14 15 16 0 Step 6: Select the Inductors (L1, L2) The minimum inductor value (LMIN) is set by the peak current limit of internal switcher (ILIM) as shown by equation 9. L MIN = 2 ILIM IOUT1 2N TS 2 1.5 0 When VIN(MAX) = 15.5V, N = 2, VREC ≥ 93V, IREC ≥ 200m A: a Central CMSH1-200HE (200V, 1A) satisfies these requirements. 2N • VIN(MAX) • (1 2DCMIN ) • DCMIN 3 1 The current rating of the rectifier (IREC) should be greater than the load current. (9) Higher inductance produces better regulation and lower voltage ripple, but requires a correspondingly greater volume part. The optimum inductor value is determined by taking into account both output noise and solution volume requirements. When VIN(MAX) = 15.5V, DCMIN = 0.28, TS = 1µs, N = 2, ILIM = 1A, IOUT1 = IOUT2 = 200m A, LMIN = 38.3µ H: A Coilcraft XFL3012-393MEC (39.3µ H) 2.5 2 0.5 (8) POWER LOSS 4 2 least 1.5 times the transformer turns ratio multiplied by the maximum input voltage. Because the two secondary windings are connected across the rectifier bridge, a factor of two is required, producing the formula for the rectifier voltage rating: VREC ≥ 1.5 • 2N • VIN(MAX) 5 1 Figure 3. LDO (U2) VIN − VOUT differential and power loss vs input voltage 4 VIN = 10V VDIFF POWER LOSS (W) 8 VDIFF (V) 4 IOUT1 = IOUT2 = 200mA POWER LOSS (W) 8 1 0.5 0 25 50 0 100 125 150 175 200 IOUT1 = IOUT2 (mA) 75 Figure 4. LDO (U2) VIN − VOUT differential and power loss vs load satisfies these requirements without adding unnecessary size. Step 7: Select the Low Dropout Linear Regulator (U2, U3) The maximum voltage of LDO occurs at maximum input voltage under no load, when VSEC equals VIN(MAX) • N. The current rating of the LDO should be greater than the load current. When VIN(MAX) = 15.5V, N = 2, the voltage rating for the LDOs should be 31V and −31V, satisfied by the LT3065 (45V, 500m A) and LT3090 (−36V, 400m A), respectively. Step 8: Add a Snubber (C S and R S) The recommended approach for designing an RC snubber (CS and RS in Figure 1) is to measure the period of the ringing at the LT3999’s SWA and SWB pins when its switchers turn off without the snubber, and then add capacitance—starting with something in the range of 100pF—until the ringing period lengthens by 1.5x to 2x. The change in period determines the value of the parasitic capacitance (CPAR), from which the parasitic inductance (LPAR) can be determined from the initial period. Similarly, initial values can be estimated using data sheet values for switch capacitance and transformer leakage inductance. Once the value of the drain node capacitance and inductance are known, a series resistor can be added to the snubber capacitance to dissipate power and critically dampen the ringing. The equation for deriving the optimal series resistance using the observed periods (tPERIOD , and tPERIOD(SNUBBED)) and snubber capacitance (CS) is below. Refer to the LT3748 data sheet for more details. CPAR = L PAR = CS 2 tPERIOD(SNUBBED) −1 tPERIOD ( tPERIOD ) 2 CPAR • 4π RSNUBBER = 2 L PAR CPAR (10) (11) (12) RESULTS The measured results in Figures 3, 4 and 5 show that duty cycle control in the push-pull converter of Figure 1 maintains a low VIN − VOUT differential across the LDOs, resulting in minimized power loss and temperature rise. Figure 3 shows that at 200m A per LDO, VDIFF , remains under 2.5V over the entire input voltage range of 10V–15V. Figure 4 shows power loss remains low across the load current range. Figure 5 and Figure 6 show the thermal results. For comparison, Figure 7 shows the efficiency comparison of the design with duty cycle control disabled and duty April 2015 : LT Journal of Analog Innovation | 27 U1 U2 T1 U2 T1 U1 U3 U3 VIN = 10V VOUT1 = 12V, VOUT2 = −12V IOUT1 = IOUT2 = 200mA NO FORCED AIR VIN = 15V VOUT1 = 12V, VOUT2 = −12V IOUT1 = IOUT2 = 200mA NO FORCED AIR Figure 5. Thermal image of the design in Figure 1 in action, VIN = 10V Figure 6. Thermal image, VIN = 15V cycle control enabled. The efficiency drops dramatically when input voltage increases. Figure 8 shows the differential voltage across the positive LDO with duty cycle control disabled and duty cycle control enabled. Figures 9 and 10 show the thermal results. It is evident that the duty cycle control reduces the differential voltage and improves the efficiency and thermal performance Step 1: Set the Switching Frequency (R T) COMPACT TRANSFORMER DRIVER FOR A FIXED INPUT VOLTAGE The transformer turns ratio is determined by: Normally, the output voltage of the basic unregulated transformer driver converter changes significantly with changes in load current. To produce a regulated voltage, an LDO on the output is strongly recommended. Figure 6a shows the schematic of low part count transformer driver using the LT3999. Figure 6b shows the design flowchart. VOUT + VLDO(OPTIONAL) + VF N N= S = NP VIN − VSW In the design example, for high frequency fSW = 1MHz , RT = 12.1k. transformer driver output to the post regulated low noise output. VLDO is the drop at highest current, so it should be minimized. 0.8V provides enough drop to avoid dropout without the LDO getting hot. A good rule of thumb assumption is VSW = 0.4V, VF = 0.7V, VLDO = 0.8V. The current rating of the transformer should be 20%~50% larger than the output current to leave some room. Step 2: Select the Transformer (T1) (13) where VSW is the switch saturation voltage for internal switchers, and VF is the forward voltage of a rectifier diode. The sum of the peak magnetizing current (IM(PEAK)) and the full load current reflected to the primary side (N • IOUT) should less than the peak current limit of the internal switcher (ILIM). Based on this, minimal LM (LM(MIN)) is required. 70 8 DUTY CYCLE CONTROL ENABLED 60 7 6 50 40 VDIFF (V) EFFICIENCY (%) The four simple steps in the flowchart can be used to design a 1MHz , low parts count, 5V input, 5V output 400m A output transformer driver as an example. The switching frequency of the LT3999 is set by a single RT resistor selected based on the table in the LT3999 data sheet (frequency range is from 50kHz to 1MHz). VLDO is the drop from the unregulated DUTY CYCLE CONTROL DISABLED DUTY CYCLE CONTROL DISABLED 5 4 3 2 30 1 20 10 11 12 13 VIN (V) 14 15 16 Figure 7. Efficiency comparison of the design with duty cycle control disabled and duty cycle control enabled, IOUT1 = IOUT2 = 200mA 28 | April 2015 : LT Journal of Analog Innovation 0 DUTY CYCLE CONTROL ENABLED 10 11 12 13 VIN (V) 14 15 16 Figure 8. LDO (U2) VIN − VOUT differential vs VIN at full load with duty cycle control disabled and with duty cycle control enabled, IOUT1 = IOUT2 = 200mA design ideas U1 U2 T1 U2 T1 U1 U3 U3 VIN = 10V VOUT1 = 12V, VOUT2 = −12V IOUT1 = IOUT2 = 200mA NO FORCED AIR VIN = 15V VOUT1 = 12V, VOUT2 = −12V IOUT1 = IOUT2 = 200mA NO FORCED AIR Figure 9. Thermal image of the design with duty cycle control disabled in circuit of Figure 1, VIN = 10V The CMSH1-20M (20V, 1A) satisfies these requirements. IM(PEAK ) + N •IOUT V −V T = IN SW • S + N •IOUT L 4 M < ILIM LM > Figure 10. Thermal image of the design with duty cycle control disabled in circuit of Figure 1, VIN = 15V (14) VIN − VSW T • S = L M(MIN) ILIM − N •IOUT 4 CONCLUSION Step 4: Low Dropout Linear Regulator (U2, Optional) The maximum input voltage of the optional post-regulating LDO (VLDO_IN(MAX)) occurs at no load, where it equals VIN • N = 7.5V. The current rating of the LDO should be larger than the load current (>400m A in the case of the design example). (15) For VOUT = VIN = 5V, the Coilcraft PA6383-AL (N = 1.5) is a good fit. Step 3: Rectifier (D1, D2) Choose the rectifier diodes based on voltage and current. The voltage across the diodes is more than twice that of the transformer secondary voltage because of its center tap structure. The voltage rating of the rectifier should be larger than 2N • VIN = 15V, maybe by 20%. A good LDO for the 5V, 400m A output is the LT1763 (20V, 500m A). 4 VIN CIN 3 D1 2 VIN UVLO SWA SYNC T1 • IN • COUT • RDC ILIM/SS RBIAS VOUT COUT1 GND RT 1 N = NP:NS 2 RECTIFIER 3 LDO 4 • D2 RT RBIAS OUT LDO IN LT3999 RT APPLICATION SPECIFICATIONS fSW, VIN, VOUT, IOUT OPTIONAL OVLO/DC 1 The LT3999 is a monolithic DC/DC transformer driver, which features duty cycle control, high frequency and high power. It allows a wide input voltage range and low loss at the LDO, while using small passive components due to its high frequency operation. It also features input voltage up to 36V and input current up to 1A. n SWB (a) (b) Figure 11. (a) Low parts count, fixed input voltage transformer driver. (b) Design flowchart for the transformer driver April 2015 : LT Journal of Analog Innovation | 29 New Product Briefs 500mA, 1.5MHz, 65V BOOST DC/DC CONVERTER The LT8570 and LT8570-1 are current mode, fixed frequency step-up DC/DC converters. The LT8570 uses an internal 500m A, 65V switch, whereas the LT8570-1 uses a 250m A, 65V switch. Both devices operate from an input voltage range of 2.55V to 40V, making them suitable for applications with input sources ranging from a single-cell Li-ion to automotive inputs. Both the LT8570 and LT8570-1 can be configured as a boost, SEPIC or inverting converter. The LT8570-1’s smaller switch enables the use of a smaller inductor in lower current applications. Both parts offer a programmable switching frequency between 200kHz and 1.5MHz , enabling designers to minimize external component sizes. The combination of a 3mm × 3mm DFN package (or MSOP-8E) and tiny externals ensures a very compact footprint while minimizing solution cost. The LT8570 and LT8570-1 use internal high efficiency switches, which deliver efficiencies up to 86%. Undervoltage lockout (UVLO) is user adjustable for optimal system performance. A single feedback resistor sets the output voltage, minimizing external components. Other features include external synchronization capability, internal soft-start, thermal shutdown protection and the ability to work in inverting and SEPIC applications. The LT8570/-1 is available in both a 3mm × 3mm DFN-8 and a thermally enhanced MSOP-8 package. 30 | April 2015 : LT Journal of Analog Innovation 140V, 400mA STEP-DOWN CONVERTER WITH ONLY 12µA QUIESCENT CURRENT The LTC7138 is a 140V input-capable high efficiency buck converter that delivers up to 400m A of continuous output current. It operates from an input voltage range of 4V to 140V, making it ideal for a wide range of telecom, industrial, avionic and automotive applications. The LTC7138 utilizes a programmable hysteretic mode design to optimize efficiency over a broad range of output currents. It utilizes an internal 1.8Ω power MOSFET for robust, high efficiency operation. A user-programmable output current limit can set output current from 100m A to 400m A as required by the particular application. The LTC7138 can be programmed with fixed output voltages of 1.8V, 3.3V or 5V, or a resistor divider can be used to program outputs from 0.8V to VIN . The LTC7138’s thermally enhanced MSOP offers additional pin spacing required for high voltage inputs. The combination of its MSOP and only four tiny externals provides a highly compact solution footprint for a wide array of applications. The LTC7138 draws only 12µ A at no load while maintaining output voltage regulation, making it ideal for always-on batterypowered applications. Due to the inherent stability of the converter, no external compensation is required, thereby simplifying design and minimizing the solution footprint. Additional features include a precise 0.8V +1% feedback voltage reference, 100% duty cycle dropout operation and, internal or external soft-start, and a feedback comparator output which enables multiple LTC7138s to be connected in parallel for higher current applications. POWER FACTOR CORRECTION BOOST CONTROLLER The LT8312 is a power factor correction (PFC) boost controller that can achieve a power factor of greater than 0.99 by actively modulating the input current, allowing compliance with most harmonic current emission requirements. This device operates with current mode control and critical conduction mode—a variable frequency switching scheme that returns the current to zero in the inductor with every cycle. This switching behavior is similar to zero voltage switching, which minimizes electromagnetic interference and energy lost in the power switch, improving efficiency as much as 5%. The LT8312 is suitable for universal AC (90265VAC) input and higher ranges, depending on the choice of external components. The LT8312 uses hysteretic start-up, eliminating the need for a bias power supply. After start-up, the device is powered by a bootstrap winding off of the inductor. With a strong 1.9A gate driver, the LT8312 drives most high voltage MOSFETs. The low 102mV current sense threshold facilitates the use of small value shunt resistors, which increase efficiency. The LT8312 is available in a 16-lead MSOP package. product briefs The LT8312 is a power factor correction (PFC) boost controller that can achieve a power factor of greater than 0.99 by actively modulating the input current, allowing compliance with most harmonic current emission requirements. This device operates with current mode control and critical conduction mode—a variable frequency switching scheme that returns the current to zero in the inductor with every cycle. HIGH EFFICIENCY SWITCHING SURGE STOPPER PROTECTS AGAINST 200V & HIGHER TRANSIENTS The LTC7860 is a high efficiency switching surge stopper with overvoltage and overcurrent protection for high availability systems. During normal operation the LTC7860 turns on an external P-channel MOSFET continuously to pass the input voltage through to the output with minimum conduction loss. During an input overvoltage condition, the LTC7860 controls the external MOSFET to operate as a high efficiency switching DC/DC regulator to protect critical downstream components by limiting the output voltage and current. The LTC7860 builds on our popular linear surge stoppers such as the LTC4363 by offering high efficiency switching protection to extend output current capability and reduce power loss during transients and faults. Supply voltages surge when the load current changes abruptly in long inductive power busses. The situation is aggravated in automotive applications by the energy stored in the alternator inductance, causing an elevated and extended voltage surge during a load dump. The power handling capability of a surge stopper is limited by the power lost in the protection device. In a linear surge stopper, the power capability is determined by the size of the pass MOSFET, while in a switching surge stopper the power capability is determined by conversion efficiency. Due to its lower power loss, a switching surge stopper can operate through longer input voltage surges at higher output current than a linear solution. The LTC7860 has an input voltage operating range of 3.5V to 60V, which can be extended with external circuitry up to 200V and higher. An external fault timer capacitor configures the limited time spent in overvoltage mode and keeps the switching surge stopper below a safe peak operating temperature when power loss is at its highest levels. The fault timer reduces system cost and size by optimizing component selection for normal mode rather than overvoltage transient and fault conditions. In MIL-STD-1275 applications, the LTC7860 protects devices operating from a 28V vehicle power bus which can reach as high as 100V for up to 500ms. The LTC7860 is ideal for industrial, avionics and automotive power applications including ISO7637, as well as positive high voltage distributed power Hot Swap™ systems. The LTC7860 is available in a thermally enhanced 12-lead MSOP package. ULTRALOW VOLTAGE STEP-UP ENERGY HARVESTER & POWER MANAGER IC EXTENDS USEFUL LIFE OF PRIMARY BATTERIES IN WSNs The LTC3107, a highly integrated DC/DC converter designed to extend the life of a primary battery in low power wireless system networks (WSNs). The LTC3107 combines energy harvesting and power management capability with a primary battery cell to extend the battery’s usable lifetime. The LTC3107 harvests energy from thermoelectric generators (TEGs) and thermopiles when these sources are available, storing excess power in a storage capacitor and seamlessly transitioning to the primary cell to power a wireless sensor node when harvested power is unavailable. The LTC3107’s internal boost converter, combined with a small step-up transformer, harvests energy from input voltages as low as 20mV, commonly found from sources such as TEGs and thermopiles, and delivers an output which tracks the battery voltage. An additional 2.2V LDO output provides power to an external microprocessor. If harvested energy is not available, the system is powered directly from the battery, requiring only 6µ A. The combination of a small step-up transformer, 3mm × 3mm package and minimal external components ensures a highly compact solution footprint. The LTC3107 is designed to use the primary battery to start up the IC and power VOUT and the LDO with or without any available power from the energy harvesting source. When the energy harvesting source is available, the LT3107 seamlessly transitions to run solely from the energy harvesting source with only 80n A of quiescent current drawn from the primary battery. If the energy harvesting source goes away or if the load exceeds the energy harvested, the LT3017 transitions to the primary battery to supply the VOUT and VLDO loads. The BATT_OFF indicator can be used to track the battery usage. The LTC3107EDD is offered in a 3mm × 3mm 10-lead DFN package. n April 2015 : LT Journal of Analog Innovation | 31 highlights from circuits.linear.com LTC2956 WAKE-UP TIMER WITH PUSHBUTTON CONTROL The LTC®2956 is a micropower, wide input voltage range, configurable wake-up timer with pushbutton control. It periodically wakes up and turns on a connected system to perform tasks such as monitoring temperature or capturing images. After completing the task, the LTC2956 turns the system off to conserve power. www.linear.com/solutions/5702 + VBAT VIN 1µF LT3060 VOUT SHDN VMAIN 10k VIN EN 10k 10k ONMAX LTC2956-1 PBOUT TURNED ON ONALERT TURNING OFF OFFALERT PB SLEEP GND 1.5nF LONG RANGE 280k 100k µP PERIOD 100k 9.76k tLONG = 1s, tONMAX = 20ms, tPERIOD = 250ms VIN VIN 7V TO 58V LTM8056 0.015Ω VOUT VOUT 18V IOUT SVIN IIN 2.2µF 100V ×4 30.9k 680kHz RUN CTL SS SYNC COMP RT CLKOUT MODE LL IINMON 22µF 25V 1µF + IOUTMON 100k FB 6.98k GND LT6015 51Ω VIN LTM8056 1µF 0.015Ω VOUT 47µF 25V TWO LTM8056s PARALLELED AND SYNCHRONIZED, VIN 7V–58V, VOUT 18V AT 8A The LTM®8056 is a 58V input, buck-boost μModule® (micromodule) regulator. Included in the package are the switching controller, power switches, inductor and support components. Only a resistor to set the switching frequency, a resistor divider to set the output voltage, and input and output capacitors are needed to complete the design. Other features such as input and output average current regulation can be implemented with just a few components. The LTM8056 operates over an input voltage range of 5V to 58V, and can regulate output voltages between 1.2V and 48V. The SYNC input and CLKOUT output allow easy synchronization. www.linear.com/solutions/5693 IOUT SVIN IIN 2.2µF 100V ×4 30.9k 680kHz RUN COMP SS SYNC RT MODE LL GND CTL CLKOUT IINMON IOUTMON FB 22µF 25V 100k + 47µF 25V 6.34k L, LT, LTC, LTM, Linear Technology, the Linear logo, Burst Mode, Dust Networks, LTspice, Silent Switcher and µModule are registered trademarks, and Hot Swap and PowerPath are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. © 2015 Linear Technology Corporation/Printed in U.S.A./68.5K Linear Technology Corporation 1630 McCarthy Boulevard, Milpitas, CA 95035 (408) 432-1900 www.linear.com Cert no. SW-COC-001530