Application Information Advances in WLED/RGB LED Drivers Abstract The increasing use of LEDs for backlighting TFT LCD panels in automotive navigation/infotainment, computer monitors, LCD TVs, and notebook computer screens, has generated a demand for optimization of power regulation techniques for those LEDs. The potential savings in system design and increase in overall performance can have a growing impact on customer acceptance as these applications spread across a wide variety of market segments such as: Automotive, Consumer, Industrial, Medical, and others. This application note discusses an important trend in the successful implementation of these LED arrays—the increasing integration of control functionality in sophisticated optimized control devices. The Allegro™ A8501 LED driver is examined as an example. It offers 2 MHz, 4 channel × 100 mA WLED/ RGB LED driving, with add-on features such as Output Disconnect, and integrating a boost converter, 40 V DMOS switch with load dump (for automotive) and overvoltage protection (OVP). Integration Level An important consideration for the rapid development of complex power management designs is the integration of multiple features in the control electronics. Not only does this save in PCB footprint area and peripheral parts matching and qualification, but it also allows the extensive reuse of these critical components in modular design elements, improving the designs of derivative applications. The Allegro A8501 demonstrates superior integration of an extensive set of complementary features. The primary features of interest include the following: ▪ 600 kHz to 2.2 MHz switching frequency—ability to operate above the AM band in Automotive applications ▪ Internal bias supply for single-supply operation (VIN = 8 to 21 V) ▪ Ability to ride through transient input voltages as low as 6.8 V and as high as 40 V ▪ Boost converter with integrated 40 V DMOS switch and OVP–load-dump protection 296074-AN Figure 1. The A8501 is provided in a thin industrystandard 28-pin TSSOP package, with an exposed pad for enhanced thermal dissipation. ▪ 3.5 μA shutdown current—limits battery drain ▪ Active current sharing between LED strings for 0.8% current matching and 0.7% accuracy ▪ Drive up to 9 series LEDs in 4 parallel strings, 36 LEDs maximum (Vf = 3.5 V, If = 100 mA) ▪ LED sinks rated for 100 mA each (400 mA total) ▪ PWM dimming with LED PWM duty cycle control ▪ 4000:1 dimming range ▪ Extensive fault mode protection schemes: ▫ Shorted LED protection against misconnected loads— with true output disconnect ▫ Open LED disconnect protects against LED failures ▫ External thermistor sensing to limit LED temperature ▫ Output overvoltage protection (OVP): 19.5 V default can be adjusted as high as 38 V ▫ Open Schottky and open OVP resistor protection against external component failure ▫ Input under- and overvoltage protection (UVLO and OVLO) against VIN variation ▫ Boost current limit, output short circuit limit, overtemperature protection (OTP), and soft start through an integrated output disconnect switch. An optional external thermistor can be used to limit LED current based on panel temperature. Introduction The Allegro A8501 is a multioutput WLED/RGB driver for backlighting medium-size displays. It integrates a boost converter and four 100 mA current sinks. LED channels can be tied together for up to 400 mA sink capability. It can work from a single power supply of 8 to 21 V and withstand transients as low as 6.8 V and up to 40 V. The boost converter is a constant frequency, current-mode converter. The device is supplied in a surface mount, 28-pin TSSOP package (suffix LP), with exposed thermal pad for enhanced thermal dissipation. It is lead (Pb) free, with a leadframe plating choice of 100% matte-tin (suffix T) or tin-bismuth (suffix B). Operating frequency can be set to 2 MHz in order to avoid interference with the AM radio band in Automotive applications. The integrated boost DMOS switch is rated for 40 V at 3.6 A. PWM dimming allows LED currents to be controlled at up to a 1000:1 ratio. Additional 4:1 dimming can be achieved by using the DIM pin. Applications include: ▪ GPS navigation systems ▪ Automotive infotainment ▪ Back-up camera displays ▪ Cluster backlighting ▪ Portable DVD players ▪ Industrial LCD displays The device provides protection against output connector shorts SW SW SW VIN BIAS Regulator Bias Supply CAP Overvoltage Comparators Internal Supply FSET OVP Charge Pump Boost OUT Overcurrent Comparators OSC + – PGND Feedback Control COMP SEL1 Device Control SEL2 EN Current Sinks Open LED Detect and Disconnect OVP Fault 2.46 V LED2 Shorted LED Detect 100 kΩ VTO LED1 ÷2 VTI 1.23 V Minimum Select LED Current Reference LED3 ÷4 LED4 References + – 100 kΩ ISET AGND PGND PGND PGND LGND DGND DIM PAD Figure 2. Functional block diagram of the device. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Power Limiting at Start-up Many of the new applications, such as notebook computers, are often operated in a battery-powered mode. Even in the case of devices, such as televisions that are intended to be operated from the utility mains, environment-friendly standards are driving designers to reduce power consumption wherever possible. In the A8501, these requirements are met by a combination of soft start and compensation techniques. D1 VBATT VOUT SW SW SW COUT OVP At startup, the output capacitor, COUT in figure 3, is discharged and the device enters soft start. The boost current is limited to 0.6 A and all active LEDx pins sink 1/20 of the set current until all the enabled LEDx pins reach 0.75 V. When the device comes out of soft start, the boost current and the LEDx pin currents are set to normal. Figure 3. The output capacitor, COUT, controls the soft start threshold. The output capacitor charges to voltage required to supply full LEDx currents within a few cycles. Once VOUT reaches the required level, LEDx current toggles between 0 and 100% in response to PWM signals. Soft start behavior on evaluation boards is shown in figure 4. A C1 C2 BC D E F VBAT Symbol C1 C2 C3 C4 t IBAT VOUT Parameter VBAT IBAT VOUT IOUT time Units/Division 10 V 500 mA 20 V 500 mA 5 ms C3 C4 IOUT A BC D t E F A. VBAT voltage slowly increased with EN held high. A–B. Input bulk capacitor CBAT and boost output capacitor COUT are charged to VUVLO . B. VBAT reaches VUVLO, and enables device through soft start. B–C. During soft start period, boost switch peak current is limited to 600 mA and LED current to 1/20 of desired level. Narrow current spike at B is due to parasitic capacitance from OUT to ground and CBIAS. COMP pin is help low during soft start. D. After VOUT reaches a level such that all LED pins > 0.75 V, the device comes out of soft start. C–E. After initial rise of VOUT , the capacitor CCOMP starts charging slowly (CCOMP not shown). E. VCOMP reaches desired level for stable operation. F. Driver device and LEDs reach thermal steady state. Figure 4. The A8501 has options for controlling start-up. One method is to use soft start controlled by a rising VBAT . In this example, VBAT = 12 V, IOUT = 400 mA. 4 channels are enabled, each with 6 series LEDs. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 Power Management in Normal Operation While power regulation at start-up is important, continuing the control seamlessly into normal operating modes is critical. The A8501 uses an innovative power management scheme that regulates based on current. The maximum LED current through the LEDs, referred as the 100% current, can be set externally. This is done by connecting a resistor, RISET, between the ISET pin and analog (power) ground. While the device can provide up to 100 mA per channel, the 100% current level is set to a reference current level, IISET , according to the following formula: IISET = 1.235 / RISET where IISET is in mA and RISET is in kΩ. This current is multiplied internally with a gain of 960, and mirrored on all enabled LED pins. The function is shown in figure 5. LED Current versus 1/ RISET 100 100 90 90 80 80 70 70 60 60 ILED (mA) ILED (mA) LED Current versus RISET 50 40 50 40 30 30 20 20 10 10 0 0 0 10 20 30 40 50 60 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 1/RISET (RISET in kΩ) RISET (kΩ) Figure 5. Characterization of reference current ISET. The current through the LEDs is controlled by the value of the resistor, RISET, connected to the ISET pin. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Dimming LED Output in Normal Operation From a customer acceptance standpoint, the ability to control light output levels has an immediate impact on satisfaction. Backlighting levels must be adjustable to ambient light conditions and to the displayed contents, in order to adapt to user viewing capabilities and preferences. In addition, power-conservation mode when under battery power is essential for extended portable use. Such diverse requirements can be optimized by providing different approaches to the dimming function. With the A8501, the LED current can be reduced from the 100% current level by three alternative dimming methods: • PWM dimming using the EN pin. PWM dimming is performed by applying an external PWM signal on the EN pin. When the EN pin is pulled high, the device turns on and all enabled LEDs sink 100% current. For optimal accuracy, the external PWM signal should be in the range 100 to 300 Hz. There is a slight delay between the PWM signal and the LED current, which causes an offset. To compensate for the offset, a small turn-on delay should be added to the PWM signal. When EN is pulled low, the boost converter and LED sinks are turned off. The compensation (COMP) pin is floated, and critical internal circuits are kept active. If EN is pulled low for more than tPWML , the device enters shutdown mode and clears all internal fault registers. As an example, for a 2 MHz clock, the maximum PWM low period while avoiding shutdown is 65 ms. The PWM dimming function is illustrated in figure 6. • Analog dimming using the DIM pin. When the DIM pin is pulled low, the LED sinks draw 100 % current; when the pin is pulled high, the LED current level drops to 25%. • Analog dimming using the VTI pin. External DC voltage can be applied to the VTI pin to control LED current. LED current varies as a function of voltage on the VTI pin. 100 90 80 ILED (mA) 70 60 50 40 30 PWM 100 Hz 200 Hz 20 10 0 0 20 40 60 PWM Duty Cycle (%) 80 100 Figure 6. LED current versus PWM duty cycle. PWM is one of the three methods available in the device for LED dimming. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Protection Functions In previous sections of this application note, the essential function of power level management was described, both for powering-up and for normal operation. The industry-leading driver ICs, however, also offer circuit management functions. In this category, the most important are the system protection functions. The A8501 offers several useful protection features, described in this section. LED Open Detect When any LED string opens, the boost circuit increases the output voltage until it reaches the overvolt- age protection level. The OVP event causes any LED string that is not in regulation to be locked-out from regulating the loop. By removing the open LED from controlling the boost, the output voltage returns to normal operating voltage. This behavior is shown in figure 7. Every OVP event retests all LED strings. An EN low signal does not reset the LED string regulation lock unless it shuts down the device (exceeds tPWML). The locked-out LED pins always attempt to sink desired current regardless of lock-out state. VBAT C1 Symbol C1 C2 C3 C4 t VOUT C2 VLED1 Parameter VBAT VOUT VLED1 IOUT time Units/Division 10 V 20 V 1V 500 mA 100 μs LED string #1 disconnected. VOUT increases to OVP level, and LED string #1 is removed from regulation. The rest of the LED strings continue to function normally. C3 IOUT C4 t VBAT C1 VOUT C2 Symbol C1 C2 C3 C4 t VLED1 Parameter VBAT VOUT VLED1 IOUT time Units/Division 10 V 20 V 1V 500 mA 100 μs C3 All four LED strings disconnected simultaneously. VOUT increases to OVP level, and all LED strings are removed from regulation. IOUT C4 t Figure 7. Output LED open protection. VBAT = 12 V, ILED = 100 mA per LED string, EN = high. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 LED Short Detect Any LED pin that has a voltage exceeding VLEDSC will force the device to disable the boost circuit and LEDx outputs until EN shuts down the device (EN low exceeds tPWML). This protects the LEDx pins from potentially hazardous voltages when multiple LEDs are shorted in one string. This function is exemplified in figure 8. VCAP Symbol C1 C2 C3 t VOUT IOUT C1 Parameter IOUT VCAP VOUT time Units/Division 200 mA 5V 5V 1 μs (LED Short Detect activated, causing a latched shutdown) C2 C3 t Figure 8. Output LED open protection. This example shows a VOUT to LED1 short. VBAT = 12 V, ILED = 100 mA per LED string, EN = high; 4 channels enabled, 8 series LEDs each. Overvoltage Protection The device has overvoltage protection (OVP) and open Schottky diode protection. The OVP has a default level of 19.5 V and can be increased up to 38 V by the selection of an external resistor, as shown in figure 9. When the current though OVP pin exceeds 200 μA, the OVP comparator goes low. When VOUT falls and current through the OVP pin drops below 165 μA, the OVP is released, as shown in figures 10 and 11. D1 VBATT VOUT SW SW SW COUT ROVP Latch – + 1.23 V OVP 18 V – + OVP Disable 1.23 V Figure 9. Overvoltage protection (OVP) circuit. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 VOVP ILED C2 C1 t Symbol C1 C2 t Parameter VOVP ILED time Units/Division 10 V 50 mA 100 μs Figure 10. Output overvoltage protection (OVP) operation. VOUT Symbol C1 C2 C3 t IOUT Parameter IOUT VSW VOUT time Units/Division 200 mA 10 V 5V 20 μs VSW C1 (Secondary OVP activated, causing a latched shutdown) C2 C3 t Figure 11. Open Schottky diode (D1 in figure 9) disconnect. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 and also some output capacitance (such as ESD capacitors) is present, a clamping diode on the output must be used. This diode will prevent the output from momentarily going negative during a short circuit condition. The diode must be chosen such that its reverse breakdown voltage is higher than normal operating voltage and its reverse current leakage is small. Overcurrent Protection The boost switch is protected with pulse-by-pulse current limiting at 3.6 A. The output disconnect switch protects against output overcurrent. At 1 A typical, the A8501 disables. This process is detailed in figure 12. In some instances, when the LEDs are connected by long wires A VCAP VOUT B C D E F G 30 V t 5V VCOMP t 1A IOUT t 30 V VSW t 5V VEN t A B A. Overcurrent on disconnect switch is detected and disconnect switch latches off. Boost is turned off when >3 V is detected across the disconnect switch. LEDs stop sinking current because there is insufficient voltage across them. B. COMP pin reaches lockout level. LEDs are internally turned off and the COMP pin is discharged. C. COMP pin reaches ground voltage, LEDs are internally turned on, in soft start mode, and boost is put into soft start mode. Boost and LEDs remain off because VOUT is still at ground C D E F G potential due to the disconnect switch being latched off. D. User turns off EN. E. The device shuts down when EN is off for more than 131,072 clock cycles. If any other fault conditions were present prior to shutdown, such as: open LED, TSD, shorted LED, or secondary OVP, these are now cleared and the part is ready to be re-enabled. F. User re-enables operation. Device enters soft start mode. G. Soft start mode finished. Figure 12. Disconnect switch overcurrent fault timing diagram. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 Automotive Input Voltage Transient Concerns A major concern in automotive applications is input voltage transients. These fast transients can cause LED backlighting to flicker. The dimming of the LED during an input voltage transient can introduce a distraction to the viewer when the ambient light is low intensity. To address this concern, the system design engineer can add more output capacitance. This supplies the necessary energy while the switching converter recovers from the transient response. This solution is the simplest. However, in most cases the amount of capacitance required is quite large and physical space in automotive design is at a premium. The Allegro A8501 can survive such transients with very little capacitance, typically two 4.7 μF capacitors will suffice even at 1% PWM duty cycle. Figure 13 provides examples of harsh input voltage transients while the A8501 is running at various PWM duty cycles at approximately 270 Hz. VIN VOUT C1,C2 IOUT Symbol Parameter Units/Division C1 C2 C3 t VIN VOUT IOUT time 5V 10 V 100 mA 1 ms A. Falling edge at 10% duty cycle. C3 t VIN VOUT C1,C2 IOUT Symbol Parameter Units/Division C1 C2 C3 t VIN VOUT IOUT time 5V 10 V 100 mA 1 ms B. Falling edge at 1% duty cycle. C3 t VOUT VIN C1,C2 IOUT Symbol Parameter Units/Division C1 C2 C3 t VIN VOUT IOUT time 5V 10 V 100 mA 1 ms C. Rising edge at 1% duty cycle. C3 t Figure 13. A8501 response to harsh supply voltage transients. These examples demonstrate that the LED current, IOUT (green trace), varies very little when the transition occurs. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 Thermal Derating Thermal derating can be achieved by connecting an NTC thermistor between VTI and ground, as shown in figure 14. When the device is enabled and VTI > 1.1 V, 100% current for the LEDs is controlled by the ISET and DIM pins. This is represented by the solid blue curves in figure 15. When VTI falls below 1.1 V, VISET starts to follow VTI , resulting in ILEDX varying proportionately with VTI represented by the overlap of the dotted and solid curves. The proportion of ILED to VTI , when LED current is controlled through the VTI pin, is calculated as: IILEDx = 960 × VTI / RISET where ILEDx is the LEDx pin current in mA, and RISET is in kΩ. There is a hysteresis built into the VTI pin circuit, so while VTI is decreasing, there is a delay before proportional change begins if VTI pin voltage starts above 1.1 V, as shown by the solid blue curves in figure 15. When VTI starts below 1.1 V, or falls below 1.1 V during operation and then starts increasing again VISET will follow VTI until the voltage reaches 1.23 V as shown by the redand-white dotted curves in figure 15. ILED versus VTI at TA = 125°C 100 90 80 ILED (mA) 70 60 50 40 VTI Decreasing 30 VTI Increasing 20 10 0 0 0.2 0.4 0.6 0.8 V TI (V) 1 1.2 1.4 I LED versus VTI at TA = 25°C 100 90 80 RVC NTC VTI 2.46 V ÷2 1.23 V Minimum Select –t° + LED Current Reference ILED (mA) 70 VTO – 60 50 40 VTI Decreasing 30 VTI Increasing 20 10 ISET 0 RISET 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V TI (V) ILED versus VTI at TA = –40°C Figure 14. Thermal derating reference circuit. 100 90 80 ILED (mA) 70 60 50 40 VTI Decreasing 30 VTI Increasing 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V TI (V) Figure 15. LEDx current versus VTI . 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 Typical Application Layouts This package is easily designed into various customer applications, which is a particular benefit with advanced, multi-featured products such as the A8501 that can be configured in many ways to adapt to different application requirements. Some examples are VBAT 8 to 21 V CBAT 4.7 μF 50 V D1 L1 10 μH CIN VIN ROVP SW SW SW FSET BIAS SEL1 VTO RFSET 25.5 kΩ VBAT 8 to 21 V L1 10 μH SW SW SW OVP CAP OUT FSET BIAS VTI ISET AGND PGND PGND PGND LGND DGND B. Typical circuit for analog dimming with external DC voltage CC 1 μF 50 V VBAT 8 to 16 V CBAT 4.7 μF 50 V L1 10 μH CIN PAD RFSET 25.5 kΩ NC LED1 LED2 LED3 LED4 CCOMP 1 μF 10 V CBIAS 0.1 μF 10 V SW SW SW DIM BIAS SEL2 VTO RISET 24.3 kΩ C. Typical circuit with ESD capacitors across LEDs (CPx ≤10 nF), with thermal derating OVP FSET PAD COUT 4.7 μF 50 V CAP OUT COMP VTI RISET 24.3 kΩ ROVP RFSET 25.5 kΩ NC SEL1 CP1 CP2 CP3 CP4 ISET AGND PGND PGND PGND LGND DGND D1 L2 10 μH EN DIM RVC LED1 LED2 LED3 LED4 VTI VIN COMP SEL1 VTO RNTC –t° COUT 4.7 μF 50 V ROVP EN SEL2 RFSET 25.5 kΩ NC PAD SEL2 RISET 24.3 kΩ D1 CBIAS 0.1 μF 10 V FSET BIAS VTO A. Typical circuit for driving 2 LED strings at up to 35 V at 200 mA per LED string, with thermal derating CCOMP 1 μF 10 V OVP CAP OUT DIM DAC ISET AGND PGND PGND PGND LGND DGND VIN SW SW SW SEL1 VTI CIN COUT 4.7 μF 50 V ROVP COMP CBIAS 0.1 μF 10 V RISET 12.4 kΩ CBAT 4.7 μF 50 V L1 10 μH CIN CCOMP 1 μF 10 V LED1 LED2 LED3 LED4 RVC RNTC –t° D1 CBAT 4.7 μF 50 V VIN NC PAD SEL2 VBAT 8 to 21 V EN COMP DIM CBIAS 0.1 μF 10 V The example device is provided in a 28-pin standard TSSOP package. On the mounting side of the package, an exposed pad allows direct thermal conduction to the PCB (see figure 17). OVP CAP OUT EN CCOMP 1 μF 10 V COUT 4.7 μF 50 V provided in figure 16. LED1 LED2 LED3 LED4 ISET AGND PGND PGND PGND LGND DGND D. Typical circuit as SEPIC converter (SEPIC converters can provide output voltage higher or lower than the input voltage; this topology can be used if the required output voltage level is within application input voltage range) Figure 16. Typical application circuits. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 Summary This application note has examined some of the important aspects of designs for the LED backlighting arrays that are gaining so much market share. The important characteristics include power management, fault management, and additional value-added features that can be incorporated into the newer thermally-enhanced packages. The A8501 is a multioutput WLED/RGB driver for medium-size LCD backlighting. It integrates a current-mode boost converter with internal power switch and four current sinks. Each individual current sink is capable of 100 mA, and channels can be combined for up to 400 mA total. It can work from a single power supply of 8 to 21 V, with the ability to ride through transient input voltages as low as 6.8 V and as high as 40 V, and has extensive fault mode protection schemes. It is targeted for use in OEM or aftermarket in-cabin telematics, as well as consumer and industrial LCD display backlighting. 0.45 9.70 ±0.10 28 +0.05 0.15 –0.06 0.65 28 4° ±4 1.65 B 3.00 4.40 ±0.10 6.40 ±0.20 3.00 6.10 0.60 ±0.15 A 1 (1.00) 2 5.00 0.25 28X SEATING PLANE 0.10 C +0.05 0.25 –0.06 0.65 C SEATING PLANE GAUGE PLANE 1 2 5.00 C PCB Layout Reference View 1.20 MAX 0.10 MAX For reference only (reference JEDEC MO-153 AET) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (bottom surface) C Reference land pattern layout (reference IPC7351 SOP65P640X120-29CM); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) Figure 17. Package outline and reference solder pad layout for the 28-pin TSSOP package with thermal pad. Article published in EDN Asia, October 2010. Reprinted with permission. Portions not copyrighted by EDN, Copyright ©2010-2013 Allegro MicroSystems, LLC The information contained in this document does not constitute any representation, warranty, assurance, guaranty, or inducement by Allegro to the customer with respect to the subject matter of this document. The information being provided does not guarantee that a process based on this information will be reliable, or that Allegro has explored all of the possible failure modes. It is the customer’s responsibility to do sufficient qualification testing of the final product to insure that it is reliable and meets all design requirements. 296074-AN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13