DESIGN FEATURES An SMBus-Controlled 10-Bit, Current Output, 50µA Full-Scale DAC by Ricky Chow 6 precision full-scale current is trimmed to ±1.5% at room temperature and ±2.5% over the commercial temperature range. There are two ways to shut down the LTC1427 (see Figure 2). A logic low at the SHDN pin or a logic high at bit 7 of the command byte sent through the SMBus interface will put the LTC1427 into shutdown mode. In shutdown mode, the digital data is retained internally and the supply current drops to only 12µA typically. SMBus WRITE BYTE PROTOCOL, WITH SMBus ADDRESS = 0101111B, COMMAND BYTE = 0XXXXX11B AND DATA BYTE = 11111111B, AD1 = 0, AD0 =1 SDA COMMAND BYTE 0 1 0 1 1 1 1 1 2 3 4 5 6 7 8 X X X X X DATA BYTE 1 1 1 1 1 1 1 1 1 1 ACK SMBus ADDRESS ACK The LTC1427-50 communicates with external circuitry using the standard 2-wire I2C or SMBus interface. The operating sequence (Figure 1) shows the signals on the SMBus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors are required on these lines. The LTC1427-50 is a receiveonly (slave) device; the system master must apply the Write Byte protocol (Figure 1) to communicate with the LTC1427-50. The master places the LTC142750 in a START condition and transmits a 7-bit address. The write bit is then made 0. The LTC1427-50 acknowledges and the master transmits the command byte. The LTC1427 again acknowledges and latches the active bits of the command byte into register A (see the block diagram in Figure 2) at the falling edge of the acknowledge pulse. The master then sends the data byte; the LTC1427-50 acknowledges receipt of the data byte; and, finally, the 8-bit data byte and the last two output bits (the two MSBs of the 10-bit input data) from register A are latched into the register C at the falling edge of the final acknowledge and the DAC current output assumes the new 10-bit value. A stop condition is optional. The LTC1427-50 can respond to one of four 7-bit addresses. The first five bits have been factory pro- SHDN Description grammed and are always 01011. The last two LSB address bits are programmed by the user via AD1 and AD0 (Table 1). When AD1 and AD0 are both connected to VCC, upon power up, the 10-bit internal register C is reset to 1000000000B and the DAC output is set to midrange. If either AD1 or AD0 is connected to ground, at power-up, register C resets to 0000000000B and the DAC output is set to zero. For the LTC1427-50, the source current output (IOUT) can be biased from –15V to (VCC – 1.3V); WR ACK The LTC1427-50 is a 10-bit, current-output DAC with an SMBus interface. This device provides precision, full-scale current of 50µA ±1.5% at room temperature (±2.5% over temperature), wide output voltage DC compliance (from –15V to (VCC – 1.3V)) and guaranteed monotonicity over a wide supply-voltage range. It is an ideal part for applications in contrast/brightness control or voltage adjustment in feedback loops. SCL S 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 IOUT S = START P = STOP *OPTIONAL P FULL-SCALE CURRENT ZERO-SCALE CURRENT 1427_01.EPS Figure 1. LTC1427-50 operating sequence SHDN POWER-ON RESET SHDN SCL SDA SMBus INTERFACE 3 REGISTER A 3-BIT LATCH EN1 1 REGISTER B 1-BIT LATCH SD EN2 2 REGISTER C 8 SD VOLTAGE REFERENCE RADJ 10-BIT LATCH SD 10 EN2 AD0 AD1 10-BIT CURRENT DAC IOUT 1427_02.EPS Figure 2. LTC1427-50 block diagram Table 1. LTC1427-50 function table AD1 AD0 SMBus Address Location DAC Power-Up Value Application L L 0101101 Zero-scale LCD Backlight Control L H 0101111 Zero-scale General Purpose H L 0101110 Zero-scale General Purpose H H 0101100 Mid-scale LCD Contrast Control Linear Technology Magazine • February 1998 DESIGN FEATURES D1 L1 VOUT* 6 5 VIN 2–4 CELLS R1 226k 1% SW LT1317 SHDN 1µF 3 SHDN FB GND 4 LTC1427-50 2 1 R2 12.1k 1% VC 1 2 3 C1 1µF 4700pF 100k Digitally Controlled CCFL Current Using the SMBus Interface VCC = 3.3V 4 Figure 4 is a schematic of a 90% efficient, digitally controlled floating CCFL lamp supply using the SMBus serial interface. The DAC current output is connected to the ICCFL pin of LT1184F. With the DAC output current range of 0µA to 50µA, this circuit gives 0mA to 6mA lamp current for a typical display. Varying the lamp current from its minimum to maximum level adjusts the lamp intensity, and hence, the display brightness. µP SHDN VCC AD1 IOUT AD0 SCL GND SDA 8 (e.g., 8051) 7 6 P1.2 5 P1.1 P1.0 *VOUT = 12.7V–24V IN 11mV STEPS 15mA FROM 2 CELLS 35mA FROM 3 CELLS L1 = 10µH (SUMIDA CD43 MURATA-ERIE LQH3C OR COILCRAFT DO1608) D1 = MBR0530 Figure 3. Digitally controlled LCD bias generator Conclusion Digitally Controlled LCD Bias Generator Figure 3 is a schematic of a digitally controlled LCD bias generator using a standard SMBus 2-wire interface. The LT1317 is configured as a boost converter, with the output voltage (VOUT) determined by the values of the feedback resistors, R1 and R2. The LTC1427-50’s DAC current output is connected to the feedback node of the LT1317. The LTC1427-50’s DAC current output increases or decreases according to the data sent via the SMBus. As the DAC output current varies from 0µA to 50µA, the output voltage is controlled over the range of 12.7V to 24V. A 1LSB change in the DAC output current corresponds to an 11mV change in the output voltage. LAMP AN ALUMINUM ELECTROLYTIC WITH AN ESR ≥0.5Ω IS RECOMMENDED FOR C3B TO PREVENT DAMAGE TO THE LT1184F HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON. R3 100k Q2* C1* 0.1µF 1 CCFL PGND 12 VIN 3 DIO C7 4 CCFL VC 1µF 5 AGND 7 NC 8 NC 9 NC CCFL 16 VSW 15 BULB 14 BAT 13 ROYER 11 REF 10 NC 6 SHDN 2 ICCFL VCC 3.3V + VBAT C3A 8V–28V 2.2µF 35V R1 750Ω D1 1N5818 LTC1427-50 1 7 2 3 SHDN 5 Q1* L2 100µH LT1184F 4 C3B 2.2µF 35V R2 220k *DO NOT SUBSTITUTE COMPONENTS + 1 + L1 = COILTRONICS CTX210605 L2 = COILTRONICS CTX100-4 COILCTRONICS (561) 241-7876 C4 2.2µF 0µA–50µA ICCFL CURRENT GIVES 0mA–6mA LAMP CURRENT FOR A TYPICAL DISPLAY L1 2 3 Q1, Q2 = ZETEX ZTX849 OR ROHM C5 2SC5001 1000pF VIN 3.3V C2 27pF 3kV 6 10 C1 MUST BE A LOW LOSS CAPACITOR (WIMA MKP-20) D5 BAT85 The LTC1427-50 is a precision 10-bit, 50µA full-scale DAC that communicates directly with an I2C or SMBus interface. It operates from a wide supply range, consumes low power, has guaranteed monotonicity and is packaged in a popular SO-8. It is ideal for applications such as contrast/ brightness controls, output voltage adjustment in power supplies and other potentiometer applications. SHDN SDA IOUT SCL AD1 GND AD0 VCC 5 6 4 } SMBus TO HOST 8 C6 0.1µF Figure 4. 90% efficient digitally controlled floating CCFL supply using the SMBus serial interface Linear Technology Magazine • February 1998 7