May 2000 Dual Operational Amplifier Combines 16-Bit Precision with High Speed

DESIGN FEATURES
Dual Operational Amplifier Combines
16-Bit Precision with High Speed
by Kris Lokere
Introduction
The LT1469 is a dual operational
amplifier that has been optimized for
accuracy and speed in 16-bit systems. The amplifier settles in just
900ns to 150µV for a 10V step. The
LT1469 also features the excellent
DC specifications required for 16-bit
designs. Input offset voltage is 125µV
maximum, input bias current is 10nA
maximum for the inverting input and
minimum DC gain is 300V/mV. The
LT1469 specifications are summarized in Table 1.
This article presents two applications of the LT1469 in 16-bit
data-conversion systems. The first
application is with a fast currentoutput digital-to-analog converter
(DAC), such as the LTC1597. The
dual LT1469 amplifier allows this
DAC to operate in bipolar, 4-quadrant multiplying mode. The second
application illustrates the use of this
dual amplifier as a buffer for a differential analog-to-digital converter
(ADC), such as the 333ksps LTC1604.
LT1469, this configuration allows the
reference input to be a variable signal, such as a sine wave, for full
4-quadrant multiplication operation.
Figure 2 shows signal-to-(noise plus
distortion) measurement results of
this circuit.
The key AC specification of the
circuit in Figure 1 is settling time,
since this limits the DAC update rate.
In an optimum configuration, the settling time of the LT1469 alone is a
blistering 900ns. In Figure 1, settling
time is limited by the need to compensate for the DAC output capacitance,
which, for the LTC1597, varies from
70pF to 115pF, depending on the
input code. This capacitance at the
amplifier’s inverting input combines
with the internal feedback resistor to
form a zero in the closed-loop frequency response in the vicinity of
100kHz–200kHz. Without a feedback
capacitor, the circuit will oscillate. A
15pF feedback capacitor stabilizes the
circuit by adding a pole at 880kHz.
This 12kΩ||15pF feedback network
increases the settling time. The theoretical minimum for the settling time
to 16-bit accuracy for a 1st order
linear system is –ln(2–16) = 11.1 time
constants set by the 12kΩ and 15pF,
which equals 2.0µs. Figure 1’s circuit
settles in 2.4µs to 150µV for a 20V
step.
The important DC specifications of
this bipolar DAC circuit are integral
and differential nonlinearity (INL and
DNL), zero error and gain error. The
amplifiers contribute to these errors
through their input offset voltage
(VOS), finite DC gain (AVOL) and inverting input bias current (IB–). Since
both amplifiers have their positive
inputs tied to ground, the noninverting input bias current does not add to
any errors. With this key application
in mind, the design of the LT1469 is
optimized for a low IB–.
Table 1. LT1469 specifications summary
16-Bit 4-Quadrant DAC
with 2.4µs Settling Time
The fastest, most precise way to
achieve 16-bit digital-to-analog conversion is using a current-output DAC
followed by a precision amplifier for
current-to-voltage conversion. Figure
1 shows the LT1469 used in conjunction with the LTC1597 16-bit
current-output DAC. The first amplifier is used as the current-to-voltage
(I/V) converter at the output of the
DAC. The second amplifier is used to
invert the reference input voltage. All
the resistors are internal to the DAC
and precisely trimmed. With a fixed
10V reference input (such as could be
provided by the LT1021-10), the reference inversion allows a bipolar
output swing, that is, from –10V to
10V. In addition, because of the high
bandwidth and low distortion of the
18
Parameter
Value
Input Offset Voltage
125µV (Max)
Inverting Input Bias Current
10nA (Max)
Noninverting Input Bias Current
40nA (Max)
DC Gain
300V/mV (Min)
CMRR
96dB (Min)
PSRR
100dB (Min)
Channel Separation
100dB (Min)
Input Noise Voltage
5nV/√Hz
Input Noise Current
0.6pA/√Hz
Gain Bandwidth
90MHz
Slew Rate
22V/µs
Settling Time (A V = –1, 150µV, 10V Step)
900ns
Settling Time (with LTC1597, C F = 15pF, 20V Step)
2.4µs
THD for 10VP-P, 100kHz
–96.5dB
Supply Current, VS = ±15V (Per Amplifier)
5.2mA (Max)
Linear Technology Magazine • May 2000
DESIGN FEATURES
40
15V
SIGNAL/(NOISE + DISTORTION) (dB)
VREF = 6VRMS
REF
5
+
8
7
1/2 LT1469
6
–
15pF
3
2
1
4
5
15pF
12k
16-BIT
DAC INPUTS
12k
12k
LTC1597
12k
6
2
–
51pF
–15V
Figure 1. 16-bit DAC I/V converter and reference inverter
1.0
INTEGRAL NONLINEARITY (LSB)
0.8
0.6
0.4
0.2
0
system is 20V/216 = 305µV. Relative
to this LSB, the LT1469 worst-case
specifications lead to a zero error of
3.6LSB and a full-scale gain error of
4.9LSB. These numbers are insignificant compared to the inherent DAC
specifications.
With its low 5nV/√Hz input voltage
noise and 0.6pA/√Hz input current
noise, the LT1469 contributes only
an additional 23% to the DAC output
noise voltage. The optional lowpass
filter at the output allows the designer
to trade off resolution for settling
time. A lower cutoff frequency eliminates wideband noise, as shown in
Figure 2, whereas a higher cutoff
frequency, such as the 1.6MHz shown
in Figure 1, contributes only 0.1µs to
the settling time.
Single-Ended-to-Differential
16-Bit ADC Buffer
– 0.2
– 0.4
– 0.6
– 0.8
–1.0
0
49152
32768
16384
DIGITAL INPUT CODE
65535
Figure 4 illustrates the use of the
LT1469 as a buffer for the LTC1604
differential 16-bit ADC. The impor5V
Figure 3a. INL for Figure 1’s circuit
RS
VIN
5
DIFFERENTIAL NONLINEARITY (LSB)
1.0
+
8
1/2 LT1469
6
0.8
0.6
70
80
500kHz FILTER
90
100
80kHz FILTER
30kHz
FILTER
10
VOUT
+
4
The INL and DNL of the LTC1597
are hardly affected by the surrounding amplifiers. Figure 3 shows
measured results of INL better than
0.25LSB and DNL better than 0.1LSB,
which is outstanding for 16-bit performance.
The effect of the amplifier’s VOS, IB–
and AVOL on the system’s zero error
and gain error is a function of the
noise gain and DAC resistance. The
exact design equations have been
presented in Linear Technology
Design Note 214. For a –10V to 10V
output swing, the LSB of this 16-bit
60
110
2k
1
1/2 LT1469
3
50
7
100
1k
10k
FREQUENCY (Hz)
100k
Figure 2. Signal to (noise plus distortion) for
Figure 1’s circuit (code = all zeros)
tant amplifier specifications for this
application are low noise and low
distortion. The LTC1604 16-bit ADC
signal-to-noise ratio (SNR) of 90dB
implies 56µVRMS noise at the input.
The noise of the two amplifiers and
100Ω/3000pF lowpass filter is only
6.4µVRMS. The total noise includes a
contribution from the source resistance. For a high value RS of 10kΩ,
this amounts to 11.8µVRMS. Clearly,
both noise sources taken together are
still well within the requirement for
16-bit precision.
An advantage of driving the
LTC1604 differentially is that the signal swing at each input can be
reduced, which reduces the distortion of both the ADC and the amplifier.
For the ADC, a full-scale input means
that AIN+ – AIN– = ±2.5V. In singleended mode, with AIN– grounded, this
means that AIN+ must swing ±2.5V.
When driving both inputs differentially, each input must swing only
half that amount, that is, ±1.25V. The
LTC1604 total harmonic distortion
(THD) is a low –94dB at 100kHz. The
buffer/filter combination alone has
2nd and 3rd harmonic distortion bet-
100Ω
5V
–
3000pF
0.4
1
10pF
0.2
AIN+
2k
LTC1604
0
– 0.2
2k
– 0.4
2
–
3
+
– 0.6
1/2 LT1469
– 0.8
3000pF
1
2
AIN–
100Ω
16-BIT
333ksps
ADC OUTPUTS
–5V
4
–1.0
0
49152
32768
16384
DIGITAL INPUT CODE
65535
Figure 3b. DNL for Figure 1’s circuit
Linear Technology Magazine • May 2000
–5V
Figure 4. Differential ADC buffer
19
DESIGN FEATURES
0
ter than –100dB for a ±1.25V, 100kHz
input, so it does not degrade the AC
performance of the ADC. Typical performance is shown in Figure 5.
Another advantage of operating in
differential mode is that common
mode errors of the ADC can be
reduced. In single-ended mode, the
ADC sees a common mode signal at
its inputs that is one-half of the input
signal. With the LTC1604’s minimum
CMRR of 68dB, this can result in
significant gain and offset errors at
the ADC output. In differential mode,
only the LT1469 amplifiers see a common mode at their inputs, which
results in negligible errors thanks to
the 96dB CMRR of these amplifiers.
The common mode signal at the ADC
input is now always 0V.
The buffer also drives the ADC
from a low source impedance. Without a buffer, the LTC1604 acquisition
time increases with increasing source
resistance above 100Ω and therefore
the maximum sampling rate must be
fSAMPLE = 333ksps
VIN = ±1.25V
fIN = 100kHz
VS = ±5V
–20
AMPLITUDE (dB)
–40
–60
–80
–100
–120
–140
0
20
40
60
80
100 120
FREQUENCY (kHz)
140
160
Figure 5. 4096 point FFT of ADC output for Figure 4’s circuit
reduced. With the low noise, low distortion LT1469 buffer, the ADC can
be driven at the maximum speed from
higher source impedances without
sacrificing AC performance.
The DC requirements for the ADC
buffer are relatively modest. The input
offset voltage, CMRR and noninverting input bias current through the
source resistance, RS, affect the DC
accuracy, but these errors are an
insignificant fraction of the ADC offset and full-scale errors.
Conclusion
The LT1469 provides two fast and
accurate amplifiers in a single 8-lead
SO or PDIP package. The unrivaled
combination of speed and accuracy
make it the component of choice for
many 16-bit systems.
LT1930, continued from page 17
D1
L1 10µH
+
5
C1
2.2µF
SHDN
1
SW
VIN
4
LT1930
SHDN
90
VOUT
12V/300mA
FB
R1
115k
3
80
+
C2
4.7µF
R2
13.3k
GND
2
85
EFFICIENCY (%)
VIN
5V
75
70
65
60
55
C1: TAIYO-YUDEN X5R LMK212BJ225MG
C2: TAIYO-YUDEN X5R EMK316BJ475ML
D1: ON SEMICONDUCTOR MBR0520
L1: SUMIDA CR43-100
(408) 573-4150
(800) 282-9855
(847) 956-0667
Figure 3a. 5V to 12V/300mA step-up DC/DC converter
VOUT
0.2V/DIV
AC COUPLED
IL1
0.5A/DIV
AC COUPLED
250mA
LOAD CURRENT
200mA
20µs/DIV
Figure 4. Transient response of Figure 3a’s circuit
20
50
0
50
100 150 200 250 300 350 400
LOAD CURRENT(mA)
Figure 3b. Efficiency of Figure 3a’s circuit
output voltage remains within 1% of
the nominal value during both transient steps.
These applications demonstrate
that the LT1930 is the industry’s highest power SOT-23 switching regulator.
In addition to step-up or boost converters, the LT1930 can be used in
single-ended primary inductance converters (SEPIC) and flyback designs.
The LT1930 is pin compatible with
both the low power LT1613 and the
micropower LT1615, providing a
simple upgrade path for users of the
older parts who need more power.
Linear Technology Magazine • May 2000