DESIGN FEATURES Programmable Quad Supervisors Offer Unparalleled Flexibility for MultiVoltage Monitoring Applications by Bob Jurgilewicz Introduction Three new power supply supervisors improve system reliability by offering more accurate reset thresholds than other supervisors on the market. They also save design time, production costs and board space with easy-touse, flexible interfaces and a low external parts count. The LTC2900, L TC2901 and LTC2902 quad supervisors can simultaneously monitor four supply voltages with 1.5% threshold accuracy over temperature. Each part offers 16 user-selectable four-voltage combinations from the following: 5V, 3.3V, 3V, 2.5V, 1.8V, 1.5V, +ADJ and –ADJ. A simple external resistor divider performs single-pin programming, eliminating the need to qualify, source and stock different part num- 5V 3.3V DC/DC CONVERTER SYSTEM LOGIC 2.5V 1.8V 1 C1 0.1µF C2 0.1µF R1 59k 1% R2 40.2k 1% bers for different combinations of supply voltages. All three parts are configured for 5% power supply tolerance and the LTC2902 can also be LTC2900 LTC2901 LTC2902 Programmable Input Threshold Combinations 16 16 16 Threshold Accuracy 1.5% 1.5% 1.5% “Open-drain” Reset LTC290x-1 ● ● ● Push-Pull Reset LTC290x-2 ● ● ● Adjustable Reset Time ● ● ● Buffered Reference ● ● ● ● ● ● Independent Adjustable Watchdog Circuitry ● ● Reset Disable Monitored Supply Tolerance Fixed 5% Fixed 5% User Selectable 5%, 7.5%, 10%, 12.5% Package 10-lead MSOP 16-lead SSOP 16-lead SSOP Linear Technology Magazine • December 2002 7 4 VREF RST VPG PBR GND CRT 6 3 5 CRT 47nF PUSH-BUTTON RESET 2900 TA01 Figure 1. Typical application using the LTC2900-2 for 4-line voltage monitoring Feature Manual Reset 8 tRST = 216ms Table 1. LTC2900, LTC2901 and LTC2902 Feature Summary Individual Comparator Outputs 9 V3 V4 V1 LTC2900-2 10 V2 2 programmed to work with power supplies at 7.5%, 10% and 12.5% tolerance. These new devices require no software, no calibration and no trimming. In some applications, they These new devices require no software, no calibration and no trimming can be used with no external components, saving additional board space and cost. Available features include manual reset, watchdog functions, selectable supply tolerance and supply margining functions. The reset and watchdog times are also user adjustable via external capacitors. The LTC2900, LTC2901 and LTC2902 supervisors offer micropower operation, small size, high accuracy and multiple reset output options. The extensive integrated functionality makes these devices easy to design into multi-voltage supervisory applications. Table 1 shows a feature summary for these devices. Figure 1 shows a fixed quad application with push-button reset using the LTC2900-2. 19 DESIGN FEATURES Safe Beginnings: Generating the Power-On Reset (POR) Reliable operation in many systems requires knowledge of when certain power supplies have exceeded mini- mum thresholds and have remained stable for a specified period of time. One way to provide that knowledge is with a reliable Power-On Reset (POR) signal generated from a highly accurate voltage monitor. Why is Threshold Accuracy Important? A system voltage margin specification must take three factors into account: power-supply tolerance, IC supply voltage tolerance and supervisor reset threshold accuracy. If a system is to work reliably, none of these can be left out of the design equation. The roles of the powersupply voltage tolerance and the IC supply voltage tolerance are fairly straightforward, but the role of supervisor accuracy in reliable system design is not as obvious. In the simplest terms, diminished accuracy corresponds to a system that must operate reliably over a wider voltage range, complicating the system design; whereas improved accuracy decreases the voltage margin required for reliable system operation, simplifying the system design. Consider a 5V system with a ±5% power supply tolerance band (see the figure in this sidebar). System ICs powered by this supply must operate reliably within this band (and a little more, as explained below). The bottom of the supply tolerance band, at 4.75V (5V–5%), is the exact voltage at which a perfectly accurate supervisor would generate a reset. Such a perfectly accurate supervisor does not exist—the actual reset threshold may vary over a specified band (±1.5% for the LTC2900, LTC2901 and LTC2902 supervisors). With this variation of reset threshold in mind, the nominal reset threshold of the supervisor is set below the minimum supply voltage; just enough so that the reset threshold band and the power supply tolerance bands do not overlap. If the two bands do overlap, the supervisor could generate a false or nuisance reset when the power supply is actually within its specified tolerance band (say, at 4.8V). The LTC2900, LTC2901 and LTC2902 have ±1.5% reset threshold accuracy, so 5% thresholds are typically set to 6.5% below the nominal input voltage. For the 5V input, the typical threshold is 4.675V, or 75mV below the ideal threshold of 4.750V. The actual threshold is guaranteed to lie in the band between 4.750V and 4.600V over temperature. The powered system must work reliably down to the low end of the threshold band, or risk malfunction before a reset signal is properly issued. In our 5V example, using NOMINAL 5V the 1.5% accurate SUPPLY VOLTAGE SUPPLY TOLERANCE supervisor, the sysMINIMUM tem ICs must work RELIABLE IDEAL SYSTEM SUPERVISOR down to 4.6V. The VOLTAGE THRESHOLD same system using 4.75V –5% a ±2.5% accurate ±1.5% supervisor must THRESHOLD 4.675V –6.5% ±2.5% operate down to BAND THRESHOLD 4.6V –8% 4.5V, increasing the BAND REGION OF POTENTIAL MALFUNCTION required system voltWITH 2.5% MONITOR 4.5V –10% age margin, and the probability of system Improved undervoltage monitor threshold accuracy translates to improved system reliability malfunction. 20 A typical device that requires a reliable POR signal is a microprocessor. The LTC2900, LTC2901 and LTC2902 can prevent a processor from executing instructions until all supply voltages have reached safe thresholds, regardless of the power supply turn-on characteristics. Furthermore, if any supply voltage falls back below a threshold with sufficient duration and magnitude, the reset command is reissued. Once the voltage has returned above the threshold and has remained there for a specified amount of time, the reset line is released. In order to firmly establish the correct reset logic state, power must get to the reset drive circuitry early in the power-up phase. The LTC2900, LTC2901 and LTC2902 supervisors are powered automatically from the greater of the voltages on the V1 and V2 inputs. With V1 or V2 at 1V or greater, the reset output is specified to be a logic low of 0.3V (max) while sinking 100µA. One Chip Covers All Supply Voltages: Single Pin Programming The LTC2900, LTC2901 and LTC2902 ICs give designers the freedom to specify one chip for all supervisory applications, even though the nominal supply voltages may not be finalized. The desired input voltage combination is selected by placing a simple resistive divider between the reference pin (VREF) and ground (GND) and connecting the tap point to the programming pin (VPG), as shown in Figure 2. The programming process occurs during power-up and is transparent to the user. Table 2 specifies the recommended 1% resistor values for programming the available input combinations. The last column in LTC2900 8 VREF 7 VPG 6 GND R1 1% R2 1% Figure 2. Programming the voltage monitoring modes (see table 2 for R1 and R2 values) Linear Technology Magazine • December 2002 DESIGN FEATURES Mode V1 (V) V2 (V) V3 (V) V4 (V) R1 (kΩ Ω) R2 (kΩ Ω) VPG/VREF 0 5.0 3.3 ADJ ADJ Open Short 0.000 1 5.0 3.3 ADJ –ADJ 93.1 9.53 0.094 2 3.3 2.5 ADJ ADJ 86.6 16.2 0.156 3 3.3 2.5 ADJ –ADJ 78.7 22.1 0.219 4 3.3 2.5 1.5 ADJ 71.5 28.0 0.281 5 5.0 3.3 2.5 ADJ 66.5 34.8 0.344 6 5.0 3.3 2.5 1.8 59.0 40.2 0.406 7 5.0 3.3 2.5 1.5 53.6 47.5 0.469 8 5.0 3.0 2.5 ADJ 47.5 53.6 0.531 9 5.0 3.0 ADJ ADJ 40.2 59.0 0.594 10 3.3 2.5 1.8 1.5 34.8 66.5 0.656 11 3.3 2.5 1.8 ADJ 28.0 71.5 0.719 12 3.3 2.5 1.8 –ADJ 22.1 78.7 0.781 13 5.0 3.3 1.8 –ADJ 16.2 86.6 0.844 14 5.0 3.3 1.8 ADJ 9.53 93.1 0.906 15 5.0 3.0 1.8 ADJ Short Open 1.000 Table 2 specifies optimum VPG/VREF ratios (±0.01) to be used when programming with a ratiometric DAC. Monitor Any Positive or Negative Voltage: Configuring the Adjustable Inputs Voltages not explicitly listed in Table␣ 2 can be monitored using the positive adjustable (ADJ) and negative adjustable (–ADJ) inputs. The positive adjustable threshold available on the V3 or V4 input is set to 0.5V. For the majority of positive adjustable applications, the tap point on an external resistive divider (R3, R4) placed between the positive voltage being sensed and ground is connected to the high impedance input on V3 or V4. Figure 3 demonstrates a generic setup for the positive adjustable application. The negative adjustable threshold available on the V4 input is tied to ground. In negative adjustable applications, the tap point on an external resistive divider (R3, R4) placed between the negative voltage being sensed and VREF, is connected to the high impedance input on V4. The voltage on the VREF pin (1.210V nominal) provides the necessary and accurate level shift required to operate near ground. The VREF pin can source and sink up to 1mA of current over the full temperature range –40°C VTRIP R3 1% LTC2900, LTC2901 OR LTC2902 8 + V3 OR V4 R4 1% – + – 0.5V Figure 3. Setting the positive adjustable trip point, VTRIP = 0.5V(1 + R3/R4) Linear Technology Magazine • December 2002 R4 1% R3 1% VREF 9 V4 LTC2900, LTC2901 OR LTC2902 – + VTRIP Figure 4. Setting the negative adjustable trip point (VTRIP = –VREF(R3/R4) to 85°C. Figure 4 shows a generic setup for the negative adjustable application. It is also possible to monitor voltages between ground and +0.5V using the positive adjustable inputs. Similar to the offset technique in the negative adjustable application, tie a resistor from VREF to the V3 or V4 input, and an appropriate resistor to the monitored voltage. Quality System Design: Consider Threshold Accuracy and Noise Sensitivity System reliability depends on power supply reset thresholds that remain accurate over temperature and power supply variations (see sidebar). All LTC2900, LTC2901 and LTC2902 supervisor inputs have the same relative threshold accuracy: ±1.5% of the nominal input voltage over temperature (see Figure 5). In any supervisory application, supply noise riding on the monitored DC voltage can cause spurious resets, particularly when the monitored voltage is already near the reset threshold. One commonly used, but problematic, solution to this problem is the addition of hysteresis to the input comparator. The amount of hysteresis is usually specified as a percentage of the trip threshold, and typically needs to be added to the advertised accuracy of the part in order to determine the true accuracy on the trip threshold. This technique degrades accuracy, and therefore is 1.5 TYPICAL THRESHOLD ACCURACY (%) Table 2. Voltage Threshold Programming 1.0 0.5 0 –0.5 –1.0 –1.5 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 100 Figure 5. Typical threshold accuracy vs temperature (LTC2900, LTC2901 and LTC2902) 21 DESIGN FEATURES 220 TA = 25°C 400 350 300 TYPICAL TRANSIENT DURATION (µs) TYPICAL TRANSIENT DURATION (µs) 450 RESET OCCURS ABOVE CURVE 250 200 150 100 50 INPUTS: V1, V2 0 1 10 100 0.1 RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX) CRT, between the CRT pin and ground. The value of this capacitor is determined from: TA = 25°C 200 180 RESET OCCURS ABOVE CURVE 160 CRT = tRST • 217 • 10–9 140 with CRT in Farads and tRST in seconds. Maximum reset timeout is limited by the largest available lowleakage capacitor. The accuracy of the time-out period is affected by capacitor leakage and capacitor tolerance. To maintain timing accuracy, capacitor leakage must be well below the 2µA nominal charging current. 120 100 80 60 40 20 INPUTS: V3, V4 0 0.1 1 10 100 RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX) Figure 6. Typical transient duration versus overdrive required to trip comparator not used on the LTC2900, LTC2901 and LTC2902 supervisors. Instead, two forms of noise filtering are employed to minimize spurious resets while maintaining system accuracy. The first line of defense used to minimize the effect of noise is a proprietary tailoring of the comparator transient response. Transient events receive a form of electronic integration in the comparator and must be of sufficient magnitude and duration to cause the comparator to switch. Figure 6 illustrates the typical transient duration versus comparator overdrive (as a percentage of the trip threshold VRTx) required to trip the comparators. The second filtering method, which is under user control (see next section), is the adjustment of the reset time-out period (tRST) or reset “delay time”. A capacitor (CRT) attached between the CRT pin and ground sets the reset time-out period. When any supply drops below its threshold, the Reset Output Options and Individual Comparator Outputs reset line is brought low. The reset time-out counter starts once all inputs are back above threshold. The counter is cleared whenever any input drops back below threshold. A noisy input with frequency components of sufficient magnitude above f␣ =␣ 1/t RST effectively holds the reset line low, preventing oscillatory behavior on the reset line. Although all four supply monitor comparators have built-in glitch filtering, bypass capacitors on V1 and V2 are recommended because the greater of V1 or V2 is also the VCC for the chip (a 0.1µF ceramic capacitor is satisfactory in most applications). Filter capacitors on the V3 and V4 inputs are allowed and recommended in extremely noisy situations. The reset output line is available in two styles, open-drain (LTC2900-1, LTC2901-1 and LTC2902-1) and push pull (LTC2900-2, LTC2901-2 and LTC2902-2). The open-drain output actually contains a weak pull-up current source to the V2 input, so an external pull-up resistor is only required when the output needs to pull to a higher voltage and/or when the reset output needs a fast rise time. The open-drain output allows for wired-OR connections and can be useful when more than one signal needs to pull down on the reset line. The non-delayed individual comparator outputs available on the LTC2901 and LTC2902 also have open-drain outputs with identical pull-up characteristics. When externally pulling up to voltages higher than V2, an internal network is automatically enabled to protect the weak pull-up circuitry from reverse currents. User Adjustable Reset TimeOut Period The reset time-out period (tRST) is adjustable in order to accommodate a variety of applications. The period is adjusted by connecting a capacitor, R5A 86.6k 1% MASTER RESET R3B 464k 1% –5V 2.5V 1V R3A 2150k 1% 3V 1 12V 5V 2 V3 V2 10 V4 V1 LTC2900-2 8 VREF CRT 4 7 RST VPG 5 6 PBR GND 1 1.8V 9 R6A 100k 1% CRTA 20k R4B 121k 1% 10 9 V4 V1 LTC2900-2 8 VREF CRT 4 7 RST VPG 6 5 PBR GND 3.3V 3 3 R4A 100k 1% V2 V3 2 R1A 40.2k 1% R2A 59k 1% CRTB R1B 22.1k 1% R2B 78.7k 1% 100k 2900 TA06 Figure 7. Two supervisors cascaded to monitor eight voltages 22 Linear Technology Magazine • December 2002 DESIGN FEATURES The push-pull reset output has a much stronger active pull-up capability, also to the V2 input, resulting in a faster, low voltage drop pull-up characteristic. Wired-OR connections and/or external pull-ups are not recommended with the push-pull reset output option. Ensuring Reset Valid for VCC down to 0V (LTC2900-2, LTC2901-2 and LTC2902-2) Some applications require the reset output (RST) to be valid with VCC down to 0V. The L TC2900-2, LTC2901-2 and LTC2902-2 are designed to handle this requirement with the addition of an external resistor from RST to ground. The resistor will provide a path for stray charge and/or leakage currents, preventing the RST output from floating to undetermined voltages when connected to high impedance (such as CMOS logic inputs). The resistor value should be small enough to provide effective pulldown without excessively loading the active pull-up circuitry. Too large a value may not pull-down well enough. A 100k resistor from RST to ground is satisfactory for most applications. Manual Reset Feature on the LTC2900 The manual reset or push-button reset pin (PBR) on the LTC2900 is used to issue a forced reset, typically with a normally-open pushbutton switch attached between PBR and ground. The PBR pin is pulled to VCC with an internal current source of 10µA (typi- cal). The switch is debounced through the reset circuitry using the delay provided by the CRT timing capacitor. A logic low on this pin will pull RST low. When the PBR pin returns high, RST will return high after the reset time-out period has elapsed, assuming all four voltage inputs are above their thresholds. The PBR pin may also be driven by a logic signal. The input-high threshold on the PBR pin is 1.6V (max), allowing the pin to be driven by low-voltage logic. Figure 7 demonstrates a supervisory cascade using two LTC2900-2 ICs to monitor 8 voltages. The reset output of the first supervisor is tied to the PBR input of the second which holds the master reset low while the voltages on the first supervisor are below threshold. When all eight voltages are above threshold, the master reset is released after the delay provided by the second reset timing capacitor (CRTB). Independent Watchdog Features on the LTC2901 The LTC2901 contains independent watchdog circuitry consisting of a watchdog input (WDI), a watchdog output (WDO) and a timing pin (CWT) that allows for a user adjustable watchdog time-out period. An undervoltage condition on any supervisor input causes RST to go low which clears the watchdog timer and brings WDO high. The watchdog timer is started when RST pulls high. Subsequent rising or falling edges received on the WDI pin will clear the watchdog timer. If an edge is not received LTC1772 6 ITH PGATE 2 5 VIN GND 3 4 VFB SENSE – 1 R6 10k C3 220pF C1: TAIYO YUDEN CERAMIC LMK325BJ106K-T C2: SANYO POSCAP 6TPA47M D1: MOTOROLA MBRM120T3 L1: COILTRONICS UP1B-100 M1: Si3443DV R5: DALE 0.25W M1 VIN 3.3V C1 10µF 10V R5 0.15Ω CWT = tWD • 50 • 10–9 with CWT in Farads and tWD in seconds. Maximum timeout is limited by the largest available low-leakage capacitor. The accuracy of the time-out period is affected by capacitor leakage and capacitor tolerance. To maintain timing accuracy, capacitor leakage must be well below the 2µA nominal charging current. The watchdog circuit can also be used as a clock or frequency monitor by applying a periodic logic signal to the WDI input. If the input signal is 4 14 3 L1 10µH D1 within the watchdog time-out period, WDO will go low. WDO will remain low and the watchdog timer will remain cleared until another edge is received on the WDI pin or another undervoltage condition occurs. The watchdog function is typically used to monitor a processor’s activity. Consider a system that is no longer executing the correct code, thereby failing to issue an edge to the WDI pin. If the watchdog output is tied to a non-maskable interrupt (NMI), a watchdog timeout will cause the processor to vector to a new program location, which may enable a variety of recovery actions. For example, a motor could be disabled, an interlock could be engaged, critical data could be written to NVRAM, etc. The watchdog time-out period (tWD) can be optimized for software execution. A capacitor (CWT) connected between the CWT pin and ground sets the watchdog time-out period. The capacitor value is determined from: + C2 47µF 6V R3 100k R4 80.6k 13 VOUT 1.8V 0.5A 8 12 R1 28k 1% R2 71.5k 1% 11 10 LTC2901-2 2 V1 COMP1 16 V2 COMP2 1 V3 COMP3 15 V4 COMP4 6 WDI RST 7 VREF WDO 5 CRT VPG 9 CWT GND 3.3V MONITOR 1.8V MONITOR FEEDBACK MONITOR COMMON RESET OUT LOW LOAD INDICATOR CRT 47nF 2901 F07 Figure 8. Use the LTC2901-2 to monitor the input, output, feedback voltage and low load conditions on a DC/DC controller. In this case, the controller is an LT1772 used in a 3.3V input to 1.8V output application. Linear Technology Magazine • December 2002 23 DESIGN FEATURES inactive for an amount of time longer than the watchdog time-out period, the WDO line falls, indicating a loss of the periodic input. Figure 8 demonstrates how the LTC2901 can be used to monitor a switching regulator’s activity. In this application, the 3.3V input, 1.8V output and feedback voltage to the LTC1772 regulator are supervised. Furthermore, if the load goes open circuit, the LTC1772 switches into Burst Mode® operation, reducing the duty cycle at the gate of M1. The pulse spacing exceeds the watchdog time-out period, and the watchdog output falls indicating the low-load condition. Power Supply Margin Testing with the LTC2902 In high reliability system manufacturing and test, it is desirable to verify the correct operation of electrical components at or below the rated power supply tolerance. The LTC2902 is designed to complement such testing in two ways. First, the reset disable pin (RDIS) can be pulled low which forces the RST output high. With RDIS low, moving supply voltages below threshold does not invoke the reset command during margining tests. The individual comparator outputs operate normally with RDIS high or low, allowing for individual supply monitoring. LTC6910-1, continued from page 18 frequency corner of 1Hz, which can be adjusted by changing C1. Alternatively, shorting C1 makes the amplifier DC-coupled. (When DC is not needed, however, the AC coupling suppresses low frequency noise and all amplifier offset voltages other than the low internally-trimmed LT1884 offset in the integrating amplifier, which is the second amplifier in Figure 6. If desired, another coupling capacitor in series with the input can relax the requirements on input DC level as well.) 24 10k Table 3. LTC2902 Tolerance Programming 6 5V 3.3V 2.5V 1.8V R1 59k 1% R2 40.2k 1% 4 14 V1 RST V2 T0 T1 7 T0 T1 Tolerance VREF 9 Low Low 5% 1.210V Low High 7.5% 1.178V High Low 10% 1.146V High High 12.5% 1.113V 3 8 V3 RDIS LTC2902-1 13 2 V4 COMP1 16 12 COMP2 VREF 1 COMP3 11 15 VPG COMP4 GND 10 CRT 5 CRT 47nF Figure 9. Quad supply monitor with asymmetric hysteresis metric hysteresis, having 5% tolerance when supplies are rising and 12.5% tolerance after all supplies have safely crossed their 5% thresholds. Conclusion The second way allows the user to provide more supply headroom by lowering the trip thresholds. Using the digital tolerance programming inputs (T0, T1), the global supply tolerance can be set to 5%, 7.5%, 10%, or 12.5% (Table 3). When using the positive or negative adjustable inputs in conjunction with tolerance programming, external resistors need only to be sized once, based on a 5% tolerance threshold. Once the external resistor dividers are set using the 5% tolerance thresholds, the thresholds for the other tolerance modes (7.5%, 10%, 12.5%) are automatically correct because the reference voltage (VREF) is scaled accordingly. Figure 9 shows how the LTC2902 can be configured for asym- One part can now satisfy most present and future supervisory needs. The LTC2900, LTC2901 and LTC2902 micropower quad supervisors provide the versatility, accuracy and reliability required in multi-voltage monitoring applications. Input supply combinations are programmable including positive and/or negative adjustable thresholds. The comparators are 1.5% accurate over temperature and feature built-in noise rejection. Reset logic is correct for VCC down to 1V, and is available with open-drain or push-pull outputs. Reset and watchdog times are user adjustable with external capacitors. Power supply margining features include real-time supply tolerance selection and an ondemand reset disable pin. Measured frequency responses (Figure 8) demonstrate bandwidth settings of 10Hz, 100Hz, and 1kHz (digital BW inputs of 001, 100, and 111, respectively) and unity gain in each case. By scaling C2, this circuit can serve other frequency ranges, such as a maximum of 10kHz with 0.1µF using LT1884 (gain-bandwidth product around 1MHz). Output signal-to-noise ratio measured with 10mVP–P input, gain of 100, and 100Hz bandwidth is 76dB; for 100mVP–P input, gain of 10, and 1000Hz bandwidth it is 64dB. Conclusion With a printed circuit footprint of only about 11mm 2 , the easy-to-use LTC6910-1 provides two decades of programmable DC or AC voltage gain. It can preamplify, drive loads, and introduce gain flexibility into spaces so small that, as one engineer put it, “your boss doesn’t even need to know it’s there.” Acknowledgements Mark Thoren and Derek Redmayne collaborated on the ADC application and Philip Karantzalis contributed the AC amplifier. Linear Technology Magazine • December 2002