DESIGN FEATURES Low Noise, Micropower Precision Op Amp Swings Outputs from Rail to Rail by Kris Lokere and Glen Brisebois Introduction for the LT6011), the requirement to stay 1V away from either rail leaves less than 1V for the sensor signal, severely reducing the dynamic range. The LT6011 allows the outputs to swing to 40mV from either supply rail, making it practical in low supply voltage applications. In portable instrumentation, medical applications, or in sophisticated systems that measure hundreds or even thousands of variables simultaneously, the power consumption of the precision op amp is important. This is especially so because designers usually want to burn as much of the available power in the sensor itself, since this tends to reduce noise. The LT6011 suits all these applications because the supply current is less than 150µA per amplifier—instead of the milliamps of other precision amplifiers. In addition, micropower operation has the obvious benefits of increasing battery run time and reducing system heat dissipation, thus simplifying system design and improving the system reliability. 250 200 INPUT OFFSET VOLTAGE (µV) Applications that measure temperature, location or light using thermocouples, hall-effect sensors, or precision photodiodes can benefit from an op amp with offset voltage of less than 100µV, an input bias current in the picoamps, and thermal drift of less than 1µV/°C. Op amps that meet these stringent requirements are available, and have been for some time, but they tend to come in relatively large packages, do not work with low supply voltages, and sometimes consume milliamps of supply current. The LT6011 dual precision op amp fits into a 3 × 3mm2 DFN package, which is so small it doesn’t even have leads. The LT6011 also offers low voltage, micro-power operation. A quad version, the LT6012, is also available in the SO-14 and GN16 packages. Low voltage operation is useless if the outputs of the op amp can’t swing nearly from rail to rail. Many older op amps clip if the output is driven closer than 1V from either VCC or ground. This is not a problem in systems with split ±15V supplies, but in a system with a single 2.7V supply (the minimum 150 100 50 0 –50 –100 –150 –200 –250 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) Figure 1. The LT6011 typical input offset drift of 0.2µV/°C is close to VOS/298K, the theoretical minimum for a bipolar differential pair with resistive load. Performance of a representative sample of amplifiers shown. Performance Table 1 shows the precision specifications for the LT6011. While input offset voltage is an obvious measure of an amplifier’s precision, other specifications can affect the overall precision of the application, and thus, should be considered when choosing a precision op amp. The LT6011 is carefully designed so that its low input offset voltage is not corrupted by noise, offset Table 1: LT6011 specifications that impact precision operation Parameter LT6011/LT6012 Available Packages S8/S14 DFN/GN16 S8/S14 DFN/GN16 Input Offset Voltage (max) 60µV 85µV 75µV 125µV Input Offset Drift (max) 0.8µV/°C 1.3µV/°C 0.8µV/°C 1.3µV/°C Input Bias Current (max) 10 LT6011A/LT6012A 300pA 900pA Input Noise Voltage, 0.1Hz to 10Hz 0.4µVP–P Input Noise Voltage Density (1kHz) 14nV/√Hz Common-Mode Rejection Ratio (min) VCM = 1V to 3.8V , VS = 5V 107dB Power Supply Rejection Ratio (min) VS = ±1.35V to ±18V 112dB Open-Loop Voltage Gain (min) VOUT = ±13.5V, VS = ±15V, 10k load 1000V/mV Linear Technology Magazine • September 2003 DESIGN FEATURES NOISE VOLTAGE (0.2µV/DIV) VS = ±15V TA = 25°C 0 1 2 3 4 5 6 TIME (SEC) 7 8 9 10 Figure 2. As a result of low 1/f noise, the total LT6011 input noise is only 0.4µVP-P in the 0.1Hz to 10Hz frequency band. current, temperature drift or commonmode voltage. The LT6011 typical input offset drift of 0.2µV/°C is close to VOS/ 298°K, the theoretical minimum for a bipolar differential pair with ideal resistive loads. In order to achieve this low drift, all internal base currents must be balanced. In addition, the LT6011 superbeta input devices are particularly insensitive to packaging stresses. Figure 1 shows VOS drift for a representative sample of LT6011 amplifiers. Whenever microvolt levels of DC input precision are required, low frequency noise can corrupt the readings. At low frequencies, total noise is often dominated by process-dependent 1/f noise, which is inadequately captured by looking at the higher frequency noise density spec. In the 0.1Hz to 10Hz frequency band, total LT6011 input noise is only 0.4µVP-P (Figure 2). Higher frequency noise, to the extent that the application does not filter it out, can be calculated from the 14nV/ √Hz white-noise density. Input bias current can easily be as important to precision as offset voltage, especially when using higher impedance sensors, or when large feedback resistors are needed to maintain low power. For a 10k total source impedance, the 300pA maximum input bias current of the LT6011 causes only 3µV of error. The LT6011 features internal base current cancellation, which makes the positive and negative input bias current uncorrelated. It is therefore not necessary to try to balance the input impedances. To get a better appreciation of how low a 300pA current is, consider that sloppy board design can easily generate leakage current much larger than that. For example, if an input trace at 0V (on a PCB) would run next to a supply trace of 15V, then even 10GΩ of parasitic resistance would cause an extra 1500pA of input current. Finally, in order to maintain input accuracy over operating conditions, you must consider the effects of common-mode voltage, power supply voltage, and output swing. Divide any changes in the supply voltage by the PSRR to see how much the input offset changes. Similarly, divide the changes in the input common-mode voltage by the CMRR. At a 5V supply, the 107dB CMRR spec translates a 2.8V ΔVCM to 12.5µV of offset change (worst case over temperature). When VS HALL ELEMENT ASAHI-KASEI HW-108A (RANK D) www.asahi-kasei.co.jp VS 4 LT1790-1.25 1, 2 6 7.87k 1% 100k 1% VS = 3V TO 18V IS ≈ 600µA VOUT ≈ 40mV/mT 1 10k OFFSET VS ADJUST + 2 2 + 8 1/2 LT6011 1 – 49.9k 400Ω ×4 3 1k 49.9k 4 LT1782 – 3 6 26.7k 1% 5 – 1/2 LT6011 + 7 4 Figure 3. Amplifying the Hall Sensor voltage with a low-power precision amplifier allows you to burn less power in the sensor—reducing total current consumption by a factor of 4, while achieving 10 times the sensitivity. Linear Technology Magazine • September 2003 the output of the op amp swings, the gain-induced input error is calculated from the open-loop gain spec. For the LT6011, this translates to 12µV worstcase over temperature (3V swing at 5V supply with 2k load). Applications Hall Sensor Amplifier The circuit of Figure 3 shows the LT6011 applied as a low power Hall sensor amplifier. The magnetic sensitivity of a Hall sensor is proportional to the DC bias voltage applied to it. With a 1V bias voltage, the sensitivity of this Hall sensor is specified as 4mV/mT of magnetic field. At that level of DC bias, however, the 400Ω bridge consumes 2.5mA. Reducing the bias voltage would reduce the power consumption, but it would also reduce the sensitivity. This is where the beauty of precision micropower amplification becomes especially apparent. First, though, lets look at the operation of the circuit. The LT1790-1.25 micropower reference provides a stable reference voltage. Resistive ladder 7.87k:100k attenuates this to about 90mV across the 7.87k, and the LT1782 acts as a buffer. When this 90mV is applied as bias across the Hall bridge, the current is only 230µA. This is less than 1/10 of the original value. (Just imagine if all your batteries could last 10 times longer than they do.) But, as mentioned earlier, the sensitivity is now likewise reduced by the same factor, down to 0.4mV/mT. The way back to high output voltage is to take gain with a precision micropower amplifier. The LT6011 is configured as a differential gain block in a gain of 100. Such high gains, and even higher, are permissible and advantageous using an LT6011 because of its exceptional precision and low input drift. The output sensitivity of the circuit is raised to a whopping 40mV/mT, with a total supply current budget of about 600µA. (Here in Milpitas, California, the Earth’s 50µT field is about 60 degrees from horizontal, and causes a 2mV output shift in the circuit.) 11 DESIGN FEATURES VS + CS/LD 5V/DIV 0V LT1236-5 5 6 + B 1/2 LT6011 – 9 0.1µF 14 13 12 11 10 VOUT 5V/DIV 0V SUPPLY CURRENT ≅ 1.6mA TO 4mA DEPENDING ON CODE C2 270pF 2 1 16 15 R1 RCOM R2 REF ROFS RFB 3 4 C1 270pF R2 R1 5V 7 100µs/DIV Figure 5. The output of the circuit in Figure 4 settles in less than 250µs. VS + VCC 5 2 – IOUT2 6 3 + IOUT1 16-BIT DAC CLR CS/LD SCK AGND SDI GND LTC1592 SDO 8 A 1/2 LT6011 7 1 VOUT 4 VS – 8 6011 TA01 Figure 4. Functioning as reference inverter and I-to-V converter for this DAC, the LT6011 maintains 16-bit precision without adding much to the total supply current. DAC I-to-V Converter Figure 4 shows the LT6011 applied as both a reference amplifier and I-to-V converter with the LTC1592 16-bit DAC. Whereas faster amplifiers such as the LT1881 and LT1469 are also suitable for use with this DAC, the LT6011 is desirable when power consumption is more important than speed. The total supply current of this application varies from 1.6mA to 4mA, depending on code, and is almost entirely dominated by the DAC resistors and the reference. The DAC itself is powered only from a single 5V supply. Op amp B of the LT6011 inverts the 5V reference using the DAC’s internal precision resistors R1 and R2, thus providing the DAC with a negative reference allowing bipolar output polarities. Op amp A provides the I-to-V conversion and buffers the final output voltage. The precision required of the I-to-V converter function is critical because the DAC output resistor network is obviously very code dependent, so the noise gain that the op amp sees is also code dependent. An imprecise op amp in this function would have its input errors amplified almost chaotically versus code. Since the outputs of the LT6011 swing to within 40mV of either supply rail, the supply voltages to the amplifier need to be only barely wider than the desired ±5V DAC outputs. The large signal time domain response of the circuit is shown in Figure 5. How it Works The simplified schematic in Figure 6 shows how the op amp achieves its precision input performance and railto-rail output capabilities. The overall architecture features three gain stages, providing very high open loop voltage gain of 1MV/V. continued on page 19 V+ R3 R6 R5 R4 Q7 Q18 Q6 Q8 Q4 Q3 –IN D1 Q12 Q1 Q2 D5 Q14 Q17 C B A D2 OUT D4 C3 Q20 Q11 Q15 V– D3 Q22 Q16 R1 500Ω R2 500Ω Q13 C2 Q21 B A +IN RC1 Q5 Q19 C1 Q9 Q10 6011 SS Figure 6. This simplified schematic shows how the LT6011 achieves its precision input performance and rail-to-rail output capabilities. 12 Linear Technology Magazine • September 2003 DESIGN FEATURES GATE Pin VOUT 20V/DIV VOUT 20V/DIV GATE 20V/DIV GATE 20V/DIV OPEN 5V/DIV OPEN 5V/DIV PWRGD 20V/DIV PWRGD 20V/DIV 2.5ms/DIV 2.5ms/DIV Figure 6. Normal MOSFET start-up waveforms Figure 7. Open MOSFET start-up waveforms. For example, in Figure 6, TSTARTUP is equal to 3 times the typical start-up time, which is 25.5ms (3 × 8.5ms). This can be accomplished either by using a microcontroller and not polling the logic signals during TSTARTUP or by placing an RC filter on the OPEN pin. Once the OPEN voltage exceeds the monitoring logic threshold (signaling an undercurrent condition lasting longer than the start-up period), and PWRGD is low (signaling that the output is not high after the start-up period has finished), an open MOSFET condition is indicated. Figure 7 shows the typical waveforms for an actual open MOSFET condition. Since the MOSFET is open, VOUT and PWRGD never go high. OPEN goes high as soon as the part is powered up while GATE is clamped to the external Zener voltage above VOUT. Another condition that can cause a false open MOSFET indication is if the LT4254 goes into current limit during start-up. This causes TSTARTUP to be longer than anticipated. Also, if the LT4254 stays in current limit long enough for the TIMER pin to fully charge up to its threshold, the LT4254 will either latch off (RETRY = 0) or go into the current limit hiccup mode (RETRY = floating). In either case, an open MOSFET condition will be falsely signaled. If the LT4254 does go into current limit during start-up, C1 can be increased (to reduce inrush current). LT6011, continued from page 12 Differential pair Q1 and Q2, together with load resistors R3 and R4, form a first gain stage. The PNPs Q5 and Q6, and current mirror Q9 and Q10 form the second gain stage. The output stage is designed to be able to both source and sink much larger currents than the stage biasing current. The current-sinking device NPN Q20 is driven directly by Q12, while the current-sourcing PNP Q19 is driven through level-shifting bias network Q13 and Q14. The level-shifter works as follows: The fixed current flowing into diodes D3–D5 establishes a bias voltage at the base of Q13. As the base of Q14 is driven lower, the VBE of both Q13 and Q14 increases. This increases their current, which flows through Linear Technology Magazine • September 2003 Q18/R6 and is mirrored as sourcing current in Q19. Since only collectors are connected to the output, a mere 40mV VCE saturation voltage limits the output swing to either supply rail. Input devices Q1 and Q2 are superbeta transistors. Their lightly doped base region results in a current gain of more than 1000. In addition, the already low base current is internally compensated by a base current-cancellation circuit. Current mirror Q21 biases Q11 with the exact same current as the input devices. Q17 measures the base current of Q11 and feeds this same current back into the bases of Q1 and Q2. The resulting input bias current is limited only by mismatch and is typically just 20pA. The GATE pin is clamped to a maximum of 12V above the VCC voltage. This clamp is designed to withstand the internal charge pump current. An external Zener diode must be used if the possibility exists for an instantaneous low resistance short from VOUT to GND. When the input supply voltage is between 12V and 15V, the minimum gate drive voltage is 4.5V, and a logic level MOSFET must be used. When the input supply voltage is higher than 20V, the gate drive voltage is at least 10V, and a standard threshold MOSFET is recommended. Conclusion The LT4254’s comprehensive set of advanced protection and monitoring features make it applicable in a wide variety of Hot Swap solutions. It can be programmed to control the output voltage slew rate and inrush current. It has programmable undervoltage and overvoltage protection, and monitors the output voltage via the PWRGD pin. The part also indicates if an open MOSFET condition exists. The LT4254 provides a simple and flexible Hot Swap solution with the addition only a few external components. The input offset voltage of the amplifier is a result of mismatch in Q1/Q2 as well as R3/R4. These internal load resistors are trimmed at the factory to cancel out the total offset voltage to less than 60µV (A-grade). A high degree of balance is maintained through the second stage, which virtually eliminates second-order temperature drift contributions. Conclusion Rail-to-rail output swing to supplies as low as 2.7V, power consumption as low as 400µW, and availability in tiny packages make the LT6011 op amp the ideal precision op amp for low voltage, low power, or space constrained applications. 19