LTC6104 High Voltage, High Side, Bi-Directional Current Sense Amplifier DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Wide Supply Range: 4V to 60V with 70V Absolute Maximum Low Offset Voltage: ±450µV Maximum Fast Response: 1µs Response Time Gain Configurable with External Resistors; Each Direction is Gain Configurable Low Input Bias Current: 170nA Maximum PSRR: 110dB Minimum Output Current: ±1mA Maximum Low Supply Current: 520µA, VS = 12V Specified for –40°C to 125°C Temperature Range Available in an 8-Lead MSOP Package APPLICATIONS ■ ■ ■ ■ Current Shunt Measurement Battery Monitoring Remote Sensing Power Management The LTC®6104 is a versatile, high voltage, high side, bidirectional current sense amplifier. Design flexibility is provided by the excellent device characteristics: ±450µV maximum offset and only 520µA of current consumption (typical at 12V). The LTC6104 operates on supplies from 4V to 60V. The LTC6104 monitors bi-directional current via the voltage across an external sense resistor (shunt resistor). This sense voltage is then translated into a ground referenced signal. Gain is set with three external resistors and can be separately configured for both directions. Low DC offset allows the use of a small shunt resistor and large gain-setting resistors. As a result, power loss in the shunt is minimal. The wide operating supply range and high accuracy make the LTC6104 ideal for a wide variety of automotive, industrial and power management applications. A maximum input sense voltage of 500mV allows a wide range of currents to be monitored. The fast response makes the LTC6104 the perfect choice for load current warnings and shutoff protection control. With very low supply current, the LTC6104 is suitable for power sensitive applications. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. The LTC6104 is available in an 8-lead MSOP package. TYPICAL APPLICATION 16-Bit Resolution Bi-Directional Output into LTC1286 ADC ILOAD – TO CHARGER/LOAD VSENSE + Step Response + RSENSE RIN RIN 100Ω 100Ω 12V VSENSE– 8 7 +INA 6 –INA 5 –INB 6V +INB + – – + A B R1 2.3k VS VS LTC6104 CURRENT MIRROR 1 VREF +IN V– VCC –IN LT®1004-2.5 1.5V 1V CS LTC1286 C2 0.1µF 5V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 1V VOUT 4 ROUT 2.5k + C1 1µF VREF OUT ∆VSENSE = 100mV CLK DOUT GND TO µP IOUT = 100µA IOUT = 0µA TIME (1µs/DIV) 6104 G15 6104 TA01a 6104f 1 LTC6104 ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Total Supply Voltage (+INB(VS) to V–) ......................70V Maximum Applied Output Voltage (OUT) ....................9V Input Current........................................................±10mA Output Short-Circuit Duration (to V–)............... Indefinite Operating Temperature Range LTC6104C ............................................ –40°C to 85°C LTC6104I ............................................. –40°C to 85°C LTC6104H .......................................... –40°C to 125°C Specified Temperature Range (Note 2) LTC6104C ................................................ 0°C to 70°C LTC6104I ............................................. –40°C to 85°C LTC6104H .......................................... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C TOP VIEW OUT NC NC V– 1 2 3 4 8 7 6 5 +INA –INA –INB +INB/VS MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 300°C/W ORDER PART NUMBER MS8 PART MARKING* LTC6104CMS8 LTC6104IMS8 LTC6104HMS8 LTCMP LTCMP LTCMP Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. RIN = 100Ω, ROUT = 5k, 4V ≤ +INB(VS) ≤ 60V, V– = 0V, VREF = 2V for VS ≥ 6V, VREF = 0.75V for VS = 4V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VS Supply Range VOS Output Offset Voltage VSENSE = ±5mV, LTC6104 VSENSE = ±5mV, LTC6104C, LTC6104I VSENSE = ±5mV, LTC6104H ● ● ΔVOS/ΔT Input Offset Voltage Drift VSENSE = ±5mV ● IB Input Bias Current RIN = 1M for –INA and –INB VSENSE(MAX) (Note 3) Input Sense Voltage Full Scale 6V ≤ VS ≤ 60V, RIN = 1k, ROUT = 2k, VREF = 2V ● ±500 mV VS = 4V, RIN = 1k, ROUT = 1k, VREF = 0.5V when VSENSE = 500mV, VREF = 1V when VSENSE = –500mV ● ±500 mV PSRR Power Supply Rejection Ratio ● 116 112 140 dB dB ● 110 105 120 dB dB ● 110 105 133 dB dB ● 105 100 8 3 1 ● VS = 6V to 60V, VSENSE = 5mV VS = 6V to 60V, VSENSE = –5mV VS = 4V to 60V, VSENSE = 5mV VS = 4V to 60V, VSENSE = –5mV 4 ±85 Maximum Output Voltage 12V ≤ VS ≤ 60V, VSENSE = 90mV, VREF = 4V VS = 6V, VSENSE = 75mV, VREF = 1.8V, ROUT = 2k VS = 4V, VSENSE = 35mV, VREF = 0.75V, ROUT = 1k ● ● ● VOUT(MIN) Minimum Output Voltage 12V ≤ VS ≤ 60V, VSENSE = –80mV, VREF = 4V VS = 6V, VSENSE = –90mV, VREF = 1.8V, ROUT = 2k VS = 4V, VSENSE = –75mV, VREF = 0.75V, ROUT = 1k ● ● ● MAX 100 UNITS 60 V ±450 ±600 ±700 µV µV µV ±1.5 ● VOUT(MAX) TYP µV/°C 170 245 nA nA dB dB 115 V V V 0.3 0.3 0.25 V V V 6104f 2 LTC6104 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. RIN = 100Ω, ROUT = 5k, 4V ≤ +INB(VS) ≤ 60V, V– = 0V, VREF = 2V for VS ≥ 6V, VREF = 0.75V for VS = 4V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS IOUT(MAX) Maximum Output Current 6V ≤ VS ≤ 60V, VSENSE = ±110mV, VREF = 2V, ROUT = 1k VS = 4V, VSENSE = ±27.5mV, VREF = 0.75V, ROUT = 1k IOUT-GAINERR Current Mirror Gain Error VINB– > VINB+ and VINA– < VINA+ (Note 4) ±0.2 IOUT-OSERR Current Mirror Offset Error VINB– > VINB+ and VINA– < VINA+ (Note 4) ±0.2 µA tr Input Step Response (ΔVOUT = to 50% on a 5V Output Step) 8V ≤ VS ≤ 60V, VREF = 1V, VSENSE = 0mV to 100mV Transient 1 µs 8V ≤ VS ≤ 60V, VREF = 6V, VSENSE = –100mV to 0mV Transient 1 µs 8V ≤ VS ≤ 60V, VREF = 4V, VSENSE = –50mV to 50mV Transient 3 µs VS = 4V, ROUT = 500Ω, Gain = 5, VREF = 0.5V, VSENSE = 0mV to 100mV Transient 1.2 µs VS = 4V, ROUT = 500Ω, Gain = 5, VREF = 1V, VSENSE = –100mV to 0mV Transient 1.2 µs VS = 4V, ROUT = 500Ω, Gain = 5, VREF = 0.75V, VSENSE = –50mV to 50mV Transient 3.2 µs 140 140 200 200 kHz kHz kHz kHz Input Step Response (ΔVOUT = to 50% on a 0.5V Output Step) MIN BW Signal Bandwidth IOUT = 200µA, ROUT = 5k IOUT = –200µA, ROUT = 5k IOUT = 1mA, ROUT = 5k IOUT = –1mA, ROUT = 5k IS Supply Current VS = 4V, IOUT = 0, RIN = 1M VS = 6V, IOUT = 0, RIN = 1M VS = 12V, IOUT = 0, RIN = 1M VS = 60V, IOUT = 0, RIN = 1M LTC6104I, LTC6104C LTC6104H Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC6104C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6104C is designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. LTC6104I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6104H is guaranteed to meet specified performance from –40°C to 125°C. ● ● ● ● ● ● ● TYP MAX ±1 ±0.25 UNITS mA mA ±0.75 % 0.45 0.73 0.825 mA mA 0.5 0.79 1 mA mA 0.52 0.81 1 mA mA 0.64 1.04 1.1 1.2 mA mA mA Note 3: VSENSE(MAX) is tested by applying 550mV and verifying the gain error is less than 1%. The 1% limit is set by the accuracy of high speed test equipment. Gain error is typically dominated by external resistor tolerance. Note 4: When amplifier A is active and amplifier B is inactive, the gain error is entirely due to the external resistors RIN and ROUT. When amplifier A is inactive and amplifier B is active, there is an additional gain error from the LTC6104 current mirror circuit. This error term is the gain error term, IOUT-GAINERR plus the offset error term, IOUT-OSERR. 6104f 3 LTC6104 TYPICAL PERFORMANCE CHARACTERISTICS Input VOS vs Temperature 50 TWO REPRESENTATIVE UNITS 60 30 40 20 0 RIN = 100Ω ROUT = 5k VIN = 5mV VOS OF INTERNAL AMPLIFIER A VOS OF INTERNAL AMPLIFIER B –40 –60 –80 –100 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 10 0 –10 –20 TA = 25°C RIN = 100Ω ROUT = 5k VIN = 5mV –30 –40 VOS OF INTERNAL AMPLIFIER A VOS OF INTERNAL AMPLIFIER B 4 11 18 25 32 39 VS (V) 46 12 VS = 60V 10 4 VS = 4V 2 0 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MINIMUM OUTPUT (V) MAXIMUM OUTPUT (V) VS = 12V VS = 6V 0.080 VS = 60V 0.075 VS = 4V, 6V, 12V 0.070 0.065 0.050 –40 –20 0 20 40 60 80 TEMPERATURE (°C) IB (nA) 10k 100k FREQUENCY (Hz) 6104 G08 0 20 40 60 80 TEMPERATURE (°C) 100 120 Supply Current vs Supply Voltage 900 140 800 80 VS = 4V 20 1M VS = 4V 6104 G06 160 40 1k VS = 6V 6104 G05 60 –5 –10 –40 –20 100 120 VS = 6V TO 100V 0 –40 –20 60 –4 –8 5 –10 VS = 60V VS = 12V 0.055 100 TA = 25°C RIN = 100Ω ROUT = 5k 50 –2 –6 IOUT = ±200µA 0 30 40 VS (V) 0 0.060 120 10 20 2 Input Bias Current vs Temperature 15 10 IOUT Maximum vs Temperature 4 IOUT = ±1mA 20 NO LIMITS FOR VSENSE IF VSENSE < 0V AND VS ≥ 4V 6104 G03 0.085 Gain vs Frequency 25 4 0.090 40 30 RIN = 5k ROUT = 2.5k TA = 25°C 0 60 6 6104 G04 35 TA = 125°C 1.0 VOUT Minimum vs Temperature VOUT Maximum vs Temperature 6 TA = 85°C 6104 G02 6104 G01 8 53 TA = 70°C 1.5 0.5 –50 100 120 TA = 0°C 2.0 SUPPLY CURRENT (µA) –20 TA = –40°C TA = 25°C MAXIMUM IOUT (mA) 20 INPUT OFFSET (µV) INPUT OFFSET (µV) 80 2.5 TWO REPRESENTATIVE UNITS 40 MAXIMUM VSENSE (V) 100 GAIN (dB) Input Sense Range vs Supply Voltage Input VOS vs Supply Voltage TA = 70°C 700 TA = 85°C TA = 125°C 600 500 TA = 25°C 400 TA = 0°C TA = –40°C 300 200 VIN = 0V ROUT = 1M 100 0 0 20 40 60 80 TEMPERATURE (°C) 100 120 6104 G09 4 10 20 30 40 SUPPLY VOLTAGE (V) 50 60 6104 G10 6104f 4 LTC6104 TYPICAL PERFORMANCE CHARACTERISTICS Step Response 0mV to 10mV VS Step Response 0mV to –10mV VSENSE– VS + 5mV VS + 10mV VS VS –10mV 2.5V VSENSE– VS – 5mV 2.25V 2V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 2V VOUT 1.5V VOUT 1.75V VOUT TIME (10µs/DIV) TIME (10µs/DIV) TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 2V TIME (10µs/DIV) 6104 G12 6104 G11 Step Response –50mV to 50mV 6104 G13 Step Response Rising Edge Step Response Rising Edge VS + 50mV VS – 50mV VSENSE 6.5V VSENSE– ∆VSENSE = 100mV ∆VSENSE– = 100mV VSENSE– 6V IOUT = 0µA 6V 5.5V CLOAD 1000pF IOUT = –100µA CLOAD 10pF 4V 1.5V VSENSE– 2V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 2V 2V Step Response –5mV to 5mV VOUT TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 4V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 1V VOUT 1.5V 1V IOUT = 100µA IOUT = 0µA VOUT TIME (1µs/DIV) TIME (1µs/DIV) TIME (10µs/DIV) 6104 G16 6104 G15 6104 G14 Step Response Rising Edge VS + 50mV VS – 50mV 7V 1V 0.5V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 6V Step Response Falling Edge VSENSE– VSENSE– ∆VSENSE– = 100mV 6.5V 5V VOUT 4.5V 2V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 4.5V VOUT TIME (1µs/DIV) 1.5V 1V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 1V IOUT = 100µA IOUT = 0µA TIME (1µs/DIV) 6104 G17 6104 G18 6104f 5 LTC6104 TYPICAL PERFORMANCE CHARACTERISTICS Step Response Falling Edge VSENSE– 6V 5.5V Step Response Falling Edge VS + 50mV VS – 50mV 7V ∆VSENSE– = 100mV IOUT = 0µA PSRR vs Frequency 160 VSENSE– 140 VOUT 120 PSRR (dB) IOUT = –100µA 4.5V 1V 0.5V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 6V VOUT 2V TA = 25°C VS = 12V RIN = 100Ω ROUT = 5k VSENSE+ = VS VREF = 4.5V TIME (1µs/DIV) TIME (1µs/DIV) 6104 G19 6104 G20 V+ = 4V V+ = 12V 100 80 60 R = 100Ω IN ROUT = 5k 40 C OUT = 5pF GAIN = 50 20 I OUTDC = 100µA VINAC = 50mVP-P 0 0.1 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 6104 G20 PIN FUNCTIONS OUT (Pin 1): Current Output. OUT will source or sink a current that is proportional to the sense voltage into an external resistor. A voltage reference is required to provide the proper positive offset voltage so that the output can swing both positive and negative. V– (Pin 4): Negative Supply (or Ground for Single-Supply Operation). +INB/VS (Pin 5): The positive input of the internal sense amplifier B. It also works as the positive supply input. Supply current is drawn through this pin. A resistor (RIN) tied from one end of RSENSE to –INB sets the output current IOUT = VSENSE/RIN. VSENSE is the voltage developed across the external RSENSE (Figure 1). –INA (Pin 7): The negative input of the internal sense amplifier A. The internal sense amplifier will drive –INA to the same potential as +INA when VSENSE is positive. A resistor (RIN) tied from one end of RSENSE to –INA sets the output current IOUT = VSENSE/RIN. +INA (Pin 8): The positive input of the internal sense amplifier A. –INB (Pin 6): The negative input of the internal sense amplifier B. The internal sense amplifier will drive –INB to the same potential as +INB when VSENSE is negative. 6104f 6 LTC6104 BLOCK DIAGRAM – VSENSE ILOAD + RSENSE RINB 8 RINA 7 +INA 6 VS –INA 10V 5k 5k – 5k + – V+ A +INB 10V 5k + V– 5 –INB V+ B V– 10V V– OUT 1 4 6104 F01 VOUT R VOUT = VSENSE • OUT + VREF RIN ROUT + – VREF Figure 1. LTC6104 Block Diagram THEORY OF OPERATION When VSENSE is positive, an internal sense amplifier loop forces –INA to have the same potential as +INA. Connecting an external resistor, RINA, in series with –INA causes a current, VSENSE/RINA, to flow through RINA. The high impedance inputs of the sense amplifier will not conduct this input current, so the current will flow through an internal MOSFET to the OUT pin. The output current can be transformed into a voltage by adding a resistor from OUT to a reference voltage (VREF). The output voltage is then VOUT = (VSENSE/RINA) • ROUT + VREF. When operating on a dual supply, ROUT can be tied to ground. The output voltage is then VOUT = (VSENSE/RINA) • ROUT. Only one amplifier is active at a time in the LTC6104. If the load current direction (VSENSE is negative) activates the “B” amplifier, the “A” amplifier will be inactive. The signal current goes into the –INB pin, through the MOSFET, and into the current mirror. The mirror reverses the polarity of the signal so that current flows into the “OUT” pin, causing the output voltage to change polarity. The magnitude of the output is then VSENSE • ROUT/RINB + VREF . Keep in mind that the OUT voltage cannot swing below V–, even though it’s sinking current. A proper VREF and ROUT need to be chosen so that the designed OUT voltage swing does not go beyond the specified voltage range of the output. Supply current is drawn from +INB pin. The user may choose to include this current in the monitored current through RSENSE by careful choice of connection polarity. 6104f 7 LTC6104 APPLICATIONS INFORMATION Selection of External Current Sense Resistor The external sense resistor, RSENSE, has a significant effect on the function of a current sensing system and must be chosen with care. First, the power dissipation in the resistor should be considered. The system load current will cause both heat and voltage loss in RSENSE. As a result, the sense resistor should be as small as possible while still providing the input dynamic range required by the measurement. Note that input dynamic range is the difference between the maximum input signal and the minimum accurately reproduced signal, and is limited primarily by input DC offset of the internal amplifier of the LTC6104. In addition, RSENSE must be small enough that VSENSE does not exceed the maximum input voltage specified by the LTC6104, even under peak load conditions. As an example, an application may require that the maximum sense voltage be ±100mV. If this application is expected to draw ±2A at peak load, RSENSE should be no more than 50mΩ. RSENSE = VSENSE 100mV = = 50mΩ IPEAK 2A The low offset and corresponding large dynamic range of the LTC6104 make it more flexible than other solutions in this respect. The ±85µV typical offset gives 60dB of dynamic range for a sense voltage that is limited to ±85mV max, and over 75dB of dynamic range if the rated input maximum of ±500mV is allowed. Sense Resistor Connection Kelvin connection of the –INA/–INB and +INA/+INB inputs to the sense resistor should be used in all but the lowest power applications. Solder connections and PC board interconnections that carry high current can cause significant error in measurement due to their relatively large resistances. One 10mm × 10mm square trace of one-ounce copper is approximately 0.5mΩ. A 1mV error can be caused by as little as 2A flowing through this small interconnect. This will cause a 1% error in a 100mV signal. A 10A load current in the same interconnect will cause a 5% error for the same 100mV signal. By isolating the sense traces from the high current paths, this error can be reduced by orders of magnitude. A sense resistor with integrated Kelvin sense terminals will give the best results. Figure 2 illustrates the recommended method. ILOAD Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or dynamic range required. The minimum signal that can be accurately represented by this sense amp is limited by the input offset. As an example, the LTC6104 has a typical input offset of ±85µV. If the minimum current is ±20mA, a sense resistor of 4.25mΩ will set VSENSE to ±85µV. This is the same value as the input offset. A larger sense resistor will reduce the error due to offset by increasing the sense voltage for a given load current. Choosing a 50mΩ RSENSE will maximize the dynamic range and provide a system that has ±100mV across the sense resistor at peak load (±2A), while input offset causes an error equivalent to only ±1.7mA of load current. Peak dissipation in the sense resistor is 200mW in this example. If instead a 5mΩ sense resistor is employed, then the effective current error is ±17mA, while the peak sense voltage is reduced to ±10mV at ±2A, dissipating only 20mW. – TO CHARGER/LOAD VSENSE + + RSENSE RIN 8 7 +INA RIN 6 –INA 5 –INB +INB + – – + A B VS LTC6104 VS CURRENT MIRROR OUT 1 V– 4 6104 F02 + ROUT VOUT + – VREF – Figure 2. Kelvin Input Connections Preserve Accuracy Despite Large Load Currents 6104f 8 LTC6104 APPLICATIONS INFORMATION Selection of External Input Resistor, RIN The external input resistor, RIN, controls the transconductance of the current sense circuit. Since IOUT = VSENSE 1 , transconductance gm = RIN RIN For example, if RIN = 100Ω, then IOUT = VSENSE or 100Ω IOUT = ±1mA for VSENSE = ±100mV. RIN should be chosen to allow the required resolution while limiting the output current. At low supply voltage, IOUT may be as much as ±1mA. By setting RIN such that the largest expected sense voltage gives IOUT = ±1mA, then the maximum output dynamic range is available. Output dynamic range is limited by both the maximum allowed output current and the maximum allowed output voltage, as well as the minimum practical output signal. If less dynamic range is required, then RIN can be increased accordingly, reducing the maximum output current and power dissipation. If low sense currents must be resolved accurately in a system that has very wide dynamic range, a smaller RIN than the maximum current specification allows may be used if the maximum current is limited in another way, such as with a Schottky diode across RSENSE (Figure 3). This will reduce the high current measurement accuracy by limiting the result, while increasing the low current measurement resolution. This approach can be helpful in cases where occasional large burst currents may be ignored. Care should be taken when designing the printed circuit board layout to minimize input trace resistance (to Pins 5, 6, 7 and 8). Trace and interconnect impedances to the –IN terminals will increase the effective RIN value, causing a gain error, especially for small RIN values. In addition, internal device resistance will add approximately 0.3Ω to RIN. Trace and interconnect impedances to the +INB terminal will have an effect on offset error. These errors are described in more detail later in this data sheet. Selection of External Output Resistor, ROUT The output resistor, ROUT, determines how the output current is converted to voltage. VOUT is simply IOUT • ROUT + VREF. In choosing an output resistor, the maximum output voltage range must first be considered. If the circuit that is driven by the output does not limit the output voltage range, then ROUT must be chosen such that the maximum output voltage range does not exceed the LTC6104 maximum output voltage range (see Electrical Characteristics). If the following circuit is a buffer or ADC with limited input range, then ROUT must be chosen so that VOUT is in the allowed maximum input range of this circuit. In addition, the output impedance is determined by ROUT. If the circuit to be driven has high enough input impedance, then almost any useful output impedance will be acceptable. However, if the driven circuit has relatively low input impedance, or draws spikes of current, such as an ADC might do, then a lower ROUT value may be required in order to preserve the accuracy of the output. As an example, if the input impedance of the driven circuit is 100 times ROUT, then the accuracy of VOUT will be reduced by 1% since: VOUT – VREF = IOUT • ROUT • RIN(DRIVEN) ROUT + RIN(DRIVEN) = IOUT • ROUT • RSENSE LOAD 100 = 0.99 • IOUT • ROUT 101 BATTERY Selection of External Voltage Reference, VREF DSENSE 6104 F03 Figure 3. Shunt Diodes Limit Maximum Input Voltage to Allow Better Low Input Resolution Without Overranging Selection of external reference voltage should be considered together with selection of ROUT. Example: Given the conditions: IOUT = –1mA to 1mA, VS = 12V. 6104f 9 LTC6104 APPLICATIONS INFORMATION From the Electrical Characteristics of the LTC6104, the output voltage range is 0.3V to 8V. If the circuit that is driven by the output limits the maximum output voltage to ≈5V, to achieve maximum dynamic range, VOUT should be 0.3V for –1mA IOUT and 5V for 1mA IOUT. ROUT = 5V – 0.3V = 2.35k, 2mA VREF = 0.3 + 5 – 0.3 = 2.65V 2 A standard 2.5V reference could be used in this example. With IOUT = ±1mA and ROUT = 2.2k, the output voltage range would equal 0.3V to 4.7V VREF Considerations VREF as shown in Figure 1, provides a positive offset so that the output can swing above and below this point. It is recommended that this is an accurate voltage reference. Most voltage references will work in this application as long as they are able to sink and source current. Make sure that the device maintains the required voltage accuracy as the current varies through its entire range. EOUT( VOS) = VOS • ROUT RIN The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. This is the dominant error of the system and it limits the available dynamic range. The section, Selection of External Current Sense Resistor, provides details. Output Error, EOUT, Due to the Bias Currents, IB+ and IB– The bias current IB+ flows into the positive input of the internal op amp. IB– flows into the negative input. ⎛ ⎞ R EOUT(IBIAS) = ROUT ⎜IB + • SENSE – IB – ⎟ RIN ⎝ ⎠ Since IB+ ≈ IB– = IBIAS, if RSENSE << RIN then: EOUT(IBIAS) ≈ –ROUT • IBIAS For instance if IBIAS is 100nA and ROUT is 1k, the output error is 0.1mV. Output Error, EOUT, Due to the Finite DC Open-Loop Gain, AOL, of the LTC6104 Amplifier Error Sources The current sense system uses an amplifier and resistors to apply gain and level shift the result. The output is then dependent on the characteristics of the amplifier, such as gain and input offset, as well as resistor matching. Ideally, the circuit output is: VOUT – VREF = IOUT • ROUT = VSENSE • Output Error, EOUT, Due to the Amplifier DC Offset Voltage, VOS ROUT , RIN VSENSE = RSENSE • ISENSE In this case, the only error is due to resistor mismatch, which provides an error in gain only. However, offset voltage, bias current and finite gain in the amplifier cause additional errors. This error is inconsequential as the AOL of the LTC6104 is very large. Example: If an ISENSE range = (±1mA to ±1A) and VOUT ISENSE = 3V 1A Then, from the Electrical Characteristics of the LTC6104: RSENSE ≈ Gain = VSENSE(MAX ) ISENSE(MAX ) = 500mV = 500mΩ 1A VOUT(MAX ) ROUT 3V = = =6 RIN VSENSE(MAX ) 500mV 6104f 10 LTC6104 APPLICATIONS INFORMATION If the maximum output current, IOUT, is limited to 1mA, ROUT equals 3V/1mA = 3k and RIN = 3k/6 – 0.3Ω (internal device resistance) = 499.7Ω. The output error due to DC offset is ±510µV (typ) and the error due to offset current, IOS, is 3k • 100nA = 300µV(typ). The maximum output error can therefore reach ±810µV or 0.027% (–71dB) of the output full scale. Considering the system input 60dB dynamic range (ISENSE = ±1mA to ±1A), the 71dB performance of the LTC6104 makes this application feasible. Output Error, EOUT, Due to the Current Mirror Errors, IOUT-GAINERR and IOUT-OSERR When VSENSE is negative, amplifier B would be on and amplifier A off. The output of amplifier B drives an internal current mirror which is connected to the OUT pin. This current mirror has some error associated with it, and this error can be calculated as follows: IOUT-GAINERR = ±0.2% • IOUT, with IOUT = ±1mA, IOUT-GAINERR(MAX) = ±2μA Output Error, EOUT, Due to Trace Resistance The LTC6104 uses the +INB pin for both the positive “B” amplifier input and the positive supply input for both amplifiers. If trace resistance (RT) become significant (Figure 5), this supply current can cause an input offset error, which can be calculated as follows: ROUT RIN EOUT(OFFSET) = R T • IS • Trace resistances to the –IN terminals will increase the effective RIN value, causing a gain error (Figure 5). In addition, internal device resistance will add approximately 0.3Ω to RIN. Gain error equals: A V(ERROR) = ROUT R – OUT RIN + R T + 0.3Ω RIN Minimizing resistance in the input traces is important and care should be taken in the PCB layout. Make the trace short and wide. Kelvin connection to the shunt resistor pad should be used. Avoid tapping into this signal along IOUT-OSERR = ±0.2μA IOUT-ERR(MAX) = IOUT-GAINERR + IOUT-OSERR = ±2μA + ±0.2μA = ±2.2μA ILOAD – TO CHARGER/LOAD VSENSE The combined effect of amplifier offset and current mirror errors is shown graphically in Figure 4. RT 8 100 OUTPUT ERROR (%) RIN RIN RT RT 7 +INA RT 6 –INA 5 –INB +INB + – IS – + A 10 1 + RSENSE EOUT-ERR(MAX) = IOUT-ERR(MAX) • ROUT RIN = 100Ω ROUT = 5k + B VS VS MAXIMUM LTC6104 0.1 CURRENT MIRROR OUT TYPICAL 1 VOUT –300 –100 100 VSENSE (mV) 300 500 6104 F04 Figure 4. Output Error vs Input Voltage – 6104 F05 IOUT + 0.01 –500 V– 4 ROUT + – VREF Figure 5. Errors from PCB Traces and Other Parasitic Resistances 6104f 11 LTC6104 APPLICATIONS INFORMATION the high current path, as this will increase the voltage drop and escalate this error. Output Current Limitations Due to Power Dissipation The LTC6104 can deliver up to ±1mA continuous current to the output pin. This current flows through RIN and enters the current sense amp via the –IN pin. The power dissipated in the LTC6104 due to the output signal is: POUT ≈ VS • |IOUT| There is also power dissipated due to the quiescent supply current: PQ = IS • VS The total power dissipated is the output dissipation plus the quiescent dissipation: PTOTAL = POUT + PQ At maximum supply and maximum output current, the total power dissipation can exceed 100mW. This will cause significant heating of the LTC6104 die. In order to prevent damage to the LTC6104, the maximum expected dissipation in each application should be calculated. This number can be multiplied by the θJA value to find the maximum expected die temperature. This must not be allowed to exceed 150°C, or performance may be degraded. As an example, if an LTC6104 in the MS8 package is to be run at 55V ±5V supply with 1mA output current at 80°C: PQ(MAX) = IS(MAX) • V+(MAX) = 1.2mA • 60V = 72mW POUT(MAX) = IOUT • V+(MAX) = 1mA • 60V = 60mW θJA = 300C˚/W TRISE = θJA • PTOTAL(MAX) = 300C°/W • (72mW + 60mW) = 39.6°C TMAX = TAMBIENT + TRISE = 80˚C + 39.6˚C = 119.6˚C If this same circuit must run at 125°C, the maximum die temperature will exceed 150°C. (Note that supply current, and therefore PQ, is proportional to temperature. Refer to Typical Performance Characteristics.) In this condition, the maximum output current should be reduced to avoid device damage. It is important to note that the LTC6104 has been designed to provide at least ±1mA to the output when required, and can deliver more depending on the conditions. Care must be taken to limit the maximum output current by proper choice of sense resistor and, if input fault conditions exist, external clamps. Output Filtering The output voltage, VOUT, is simply IOUT • ZOUT. This makes filtering straightforward. Any circuit may be used which generates the required ZOUT to get the desired filter response. For example, a capacitor in parallel with ROUT will give a lowpass response. This will reduce unwanted noise from the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit such as a MUX or ADC. This output capacitor in parallel with an output resistor will create a pole in the output response at: f–3dB = 1 2 • π • ROUT • COUT Useful Equations Input Voltage: VSENSE = ISENSE • RSENSE Voltage Gain: Current Gain: VOUT R = OUT VSENSE RIN IOUT ISENSE PTOTAL(MAX) ≈ 132mW and the max die temp will be 119.6°C Transconductance: TMAX must be <150°C Transimpedance: = RSENSE RIN IOUT 1 = VSENSE RIN VOUT ISENSE = RSENSE • ROUT RIN 6104f 12 LTC6104 APPLICATIONS INFORMATION Reverse Supply Protection Some applications may be tested with reverse-polarity supplies due to an expectation of this type of fault during operation. The LTC6104 is not protected internally from external reversal of supply polarity. To prevent damage that may occur during this condition, a Schottky diode should be added in series with V– (Figure 6). This will limit the reverse current through the LTC6104. Note that this diode will limit the low voltage performance of the LTC6104 by effectively reducing the supply voltage to the part by VD. Keep this in mind when choosing an output resistor and voltage reference. In addition, if the output of the LTC6104 is wired to a device that will effectively short it to high voltage (such as through an ESD protection clamp) during a reverse supply condition, the LTC6104’s output should be connected through a resistor or Schottky diode (Figure 7). Response Time The LTC6104 is designed to exhibit fast response to inputs for the purpose of circuit protection or signal transmission. This response time will be affected by the external circuit in two ways: delay and speed. ILOAD – TO CHARGER/LOAD VSENSE 7 ILOAD 6 –INA 5 –INB CURRENT MIRROR 1 LTC6104 – R1 6104 F06 + VOUT 6 –INA 5 –INB +INB – + B VS VS V– 4 7 A VS OUT + RIN + – B VS + RIN +INA IS – + VSENSE RSENSE 8 +INB A – TO CHARGER/LOAD RIN + – LTC6104 Speed is also affected by the external circuit. In this case, if the input changes very quickly, the internal amplifier and the internal output FET (Figure 1) will attempt to maintain the internal loop, but may be slew rate limited. This results in current flowing through RIN and the internal FET. This current slew rate will be determined by the amplifier and FET characteristics as well as the input resistor, RIN. Using a smaller RIN will allow the output current to increase more quickly, decreasing the response time at the output. This will also have the effect of increasing the maximum output current. Using a larger ROUT will + RIN +INA For bidirectional applications, there is a delay when output current changes polarity. The delay time can be found in the step response curves in the Typical Performance Characteristics section of this data sheet. + RSENSE 8 For unidirectional applications, if the output current is very low and an input transient occurs, there may be an increased delay before the output voltage starts to change. This can be improved by increasing the minimum output current, either by increasing RSENSE or by decreasing RIN. The effect of increased output current is illustrated in the step response curves in the Typical Performance Characteristics section of this datasheet. Note that the curves are labeled with respect to the initial output currents. CURRENT MIRROR OUT 1 V– 4 6104 F07 ADC ROUT + – ROUT D1 VREF Figure 6. Schottky Prevents Damage During Supply Reversal + – D1 VREF Figure 7. Additional Resistor R1 Protects Output During Supply Reversal 6104f 13 LTC6104 APPLICATIONS INFORMATION decrease the response time, since VOUT = IOUT • ROUT. Reducing RIN and increasing ROUT will both have the effect of increasing the voltage gain of the circuit. sense amplifiers is furnished via the +INB pin, the input protection for both sections is referenced to this one pin. Normal operation of section A is maintained for +INA and –INA voltages within the range of 0.5V above +INB to 1.5V below +INB. As long as both sense resistors are connected to a common potential and voltage drops are small (like <500mV, for example), as in Figure 8 or the H-bridge application, this condition will be met. Use of Dual Sense Resistors The dual amplifier topology offers significant advantages for controlling gain, dynamic range and shunt current. As an example, separate shunt resistors can be advantageous for an H-bridge current monitor (see H-Bridge Load Current Monitor application). It can also be a significant advantage for battery-operated systems, where battery discharge and charge current can be significantly different. With different current range requirements, a “charge shunt resistor” can be connected from the charger to the battery and a separate “discharge shunt resistor” can be connected from the battery to the load. Other applications can benefit from similar topologies where different shunt resistors enable the user to trade off accuracy and shunt power consumption. Finally, since each amplifier has an independent input resistor, gain for each channel can be set to suit the application. The only limitation to observe in this type of application is that since the power for both CHARGER RINB RSHUNTB LOAD BATTERY RSHUNTA RINA A B VS VOUT ROUT CURRENT MIRROR VREF LTC6104 6104 F08 Figure 8 TYPICAL APPLICATION H-Bridge Load Current Monitor 3V TO 18V VBATTERY (8V TO 60V) 0.1µF 4 1µF LT1790-2.5 10m 249Ω 7 6 8 249Ω 10m 1 2 6 4.99k 5 LTC6104 VO 2 VO = 2.5V ±2V (±10A FS) 4 PWM* PWM* IM 6104 TA02 *USE “SIGN-MAGNITUDE” PWM FOR ACCURATE LOAD CURRENT CONTROL AND MEASUREMENT 6104f 14 LTC6104 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6104f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC6104 TYPICAL APPLICATION LTC6104 Bi-Directional Current Sense Circuit with Combined Charge/Discharge Output ICHARGE – CHARGER VSENSE + RSENSE IDISCHARGE RIN RIN 8 7 +INA ILOAD 6 –INA 5 –INB +INB + – – + A B VS VS LOAD LTC6104 CURRENT MIRROR OUT 1 + V– 4 + ROUT VOUT – + – VREF 6104 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1636 Rail-to-Rail Input/Output, Micropower Op Amp VCM Extends 44V Above VEE, 55µA Supply Current, Shutdown Function LT1637/LT1638 LT1639 Single/Dual/Quad, Rail-to-Rail, Micropower Op Amp VCM Extends 44V Above VEE, 0.4V/µs Slew Rate, >1MHz Bandwidth, <250µA Supply Current per Amplifier LT1787/LT1787HV Precision, Bidirectional, High Side Current Sense Amplifier 2.7V to 60V Operation, 75µV Offset, 60µA Current Draw LTC1921 Dual –48V Supply and Fuse Monitor LT1990 High Voltage, Gain Selectable Difference Amplifier ±250V Common Mode, Micropower, Pin Selectable Gain = 1, 10 LT1991 Precision, Gain Selectable Difference Amplifier 2.7V to ±18V, Micropower, Pin Selectable Gain = –13 to 14 LTC2050/LTC2051 LTC2052 Single/Dual/Quad Zero-Drift Op Amp 3µV Offset, 30nV/°C Drift, Input Extends Down to V– LTC4150 Coulomb Counter/Battery Gas Gauge Indicates Charge Quantity and Polarity LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V Operation, Pin-Selectable Gain: 10, 12.5, 20, 25, 40, 50V/V ±200V Transient Protection, Drives Three Optoisolators for Status LTC6101/LTC6101HV High Voltage, High Side Current Sense Amplifier High Voltage 5V to 100V Operation, SOT23 LTC6103 4V to 60V Operation, Gain Configurable with External Resistors High Side Bidirectional Current Sense Amplifier 6104f 16 Linear Technology Corporation LT 0107 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007