RT8005

RT8005
1A, 2MHz, High-Efficiency Synchronous Buck PWM Converter
General Description
Features
The RT8005 is a high-efficiency synchronous buck PWM
converter with integrated P-Channel and N-Channel power
MOSFET switches. Capable of delivering 1A output current
over a wide input voltage range of 2.4V to 5.5V, the RT8005
is ideally suited for portable applications powered by a
single Li-Ion battery or by 3-cell NiMH/NiCd batteries. The
device operates at 2MHz PWM switching fixed frequency,
can use smaller CIN, COUT capacitor and inductor.
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The RT8005 integrates two low RDS(ON) 230mΩ and 180mΩ
of high and low side switching MOSFETs to reduce board
space, as only resistors and capacitors along with one
inductor are required externally for operation. The RT8005
has adjustable output range down to 0.5V. The other
features include internal soft-start, chip enable, over
temperature and over current protections. It is available in
a space-saving VDFN-10L 3x3 package.
Ordering Information
RT8005
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Applications
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Package Type
QV : VDFN-10L 3x3 (V-Type)
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Note :
2.4V to 5.5V Input Voltage Range
Adjustable Output from 0.5V to VIN
Guaranteed 1A Output Current
Accurate Reference : 0.5V (±1.5%)
Up to 90% Conversion Efficiency
Typical Quiescent Current : 200µA
Integrated Low RDS(ON) High and Low Side Power
MOSFET Switches : 230mΩ and 180mΩ
Current Mode PWM Operation
Fixed Frequency : 2MHz
100% Maximum Duty Cycle for Lowest Dropout
Internal Soft-Start
No Schottky Diode Required
Over Temperature and Over Current Protection
Small 10-Lead VDFN 3x3 Package
RoHS Compliant and 100% Lead (Pb)-Free
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Battery-Powered Equipments
Low Power CPU and DSP Supplies
Digital Cameras and Hard Disks
Protable Instruments and Notebook Computers
Celluar Phones, PDAs, and Handheld PCs
USB-Based DSL Modems and Other Network Interface
Cards
Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
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Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS8005-10 March 2011
Pin Configurations
(TOP VIEW)
LX
PVDD
PVDD
VDD
EN
1
2
3
4
5
GND
11
10
9
8
7
9
}
PGND
PGND
GND
COMP
FB
VDFN-10L 3x3
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RT8005
Typical Application Circuit
VIN
2.4V to 5.5V
2.2µF
Chip Enable
2,3
4
CIN
VDD
LX
5 EN
7
PVDD
1
LOUT
2.2µH
R1
10k
RT8005
COMP
FB
VOUT
6
CCOMP
9, 10
PGND
10nF
GND
8,
11 (Exposed Pad)
R2
7.15k
1.2V/1A
COUT
2.2µF
Recommended component selection for Typical Application Circuit.
VOUT (V)
VIN (V)
CIN (uF)
COUT (uF)
LOUT (uH)
R1 (kΩ)
R2 (kΩ)
CCOMP (nF)
0.5
2.4 to 5.5
2.2
2.2/4.7
2.2
10
Open
10
1
2.4 to 5.5
2.2
2.2/4.7
2.2
10
10
10
1.2
2.4 to 5.5
2.2
2.2/4.7
2.2
10
7.15
10
1.8
2.4 to 5.5
2.2
2.2/4.7
2.2
10
3.83
10
2.5
3.3 to 5.5
2.2
2.2/4.7
2.2
10
2.49
10
3.3
4.2 to 5.5
2.2
2.2/4.7
2.2
10
1.78
10
Suggested Inductors
Component
Series
Supplier
Inductance
DCR
Current Rating
Dimensions
(µH)
(mΩ)
(mA)
(mm)
ABC
SR0403
2.2
47
2600
4.5x4x3.2
Sumida
CDRH3D16
2.2
59
1750
4x4x1.8
GOTREND
GTSD53
2.2
29
2410
5x5x2.8
Suggested Capacitors For CIN and COUT
Component Supplier
Capacitance (uF)
Case Size
C1608X5R1A225M
2.2
0603
Panasonic
ECJ1VB0J225M
2.2
0603
TAIYO YUDEN
JMK107BJ225M
2.2
0603
TDK
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Part No.
DS8005-10 March 2011
RT8005
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
LX
2, 3
PVDD
4
VDD
Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is
equal to PVDD.
5
EN
Chip Enable (Active High). Logic low shuts down the converter. Floating this pin is
forbidden.
6
FB
Switcher Feedback Voltage. This pin is the inverting input of the error amplifier.
FB senses the switcher output through an external resistor divider network. FB
regulation voltage is 0.5V.
7
COMP
8,
Exposed Pad (11)
GND
9, 10
PGND
Internal Power MOSFET Switches Output. Connect this pin to the inductor.
Power Input Supply. Decouple this pin to PGND with a capacitor.
Compensation Input. This pin is the output of the internal error amplifier. Connect
an external capacitor to compensate the regulator controlled loop.
Signal Ground. All small-signal components, compensation components and the
exposed pad on the bottom side of the IC should connect to this ground, which in
turn connects to PGND at one point. The exposed pad must be soldered to a
large PCB and connected to GND for maximum power dissipation.
Power Ground. Connect this pin close to the terminal of CIN and COUT.
Function Block Diagram
EN
Shutdown
Control
VDD
Slope
Compensation
Oscillator
Current Limit
Detector
-
PWM
Comparator
COMP
VREF
FB
+
+
Error
Amplifier
Over
Temperature
Detector
Control
Logic
Current
Sense
Driver
LX
Zero
Detector
-
GND
DS8005-10 March 2011
PVDD
PGND
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RT8005
Absolute Maximum Ratings
(Note 1)
Supply Voltage, PVDD and VDD ------------------------------------------------------------------------------ −0.3V to 6V
EN, FB Voltage --------------------------------------------------------------------------------------------------- −0.3V to VDD
l PGND to GND ---------------------------------------------------------------------------------------------------- −0.3V to 0.3V
l LX Voltage --------------------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V)
l Power Dissipation, PD @ TA = 25°C
VDFN-10L 3x3 ----------------------------------------------------------------------------------------------------1.923W
l Package Thermal Resistance (Note 2)
VDFN-10L 3x3, θJA -----------------------------------------------------------------------------------------------52°C/W
l Junction Temperature -------------------------------------------------------------------------------------------150°C
l Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------260°C
l Storage Temperature Range ----------------------------------------------------------------------------------- −65°C to 150°C
l ESD Susceptibility (Note 3)
HBM (Human Body Mode) -------------------------------------------------------------------------------------2kV
MM (Machine Mode) --------------------------------------------------------------------------------------------200V
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Recommended Operating Conditions
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(Note 4)
Supply Voltage, PVDD and VDD ------------------------------------------------------------------------------2.4V to 5.5V
Enable Input Voltage, VEN -------------------------------------------------------------------------------------0V to VDD
Ambient Temperature Range ---------------------------------------------------------------------------------- −40°C to 85°C
Junction Temperature Range ---------------------------------------------------------------------------------- −40°C to 125°C
Electrical Characteristics
(VDD = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Current
Quiescent Current
IQ
VEN = 3.3V, VFB = VREF + 0.15V,
I OUT = 0mA
--
200
400
µA
Shutdown Current
I SHDN
VEN = 0V
--
0.01
1
µA
VREF
0.4925
0.5
0.5075
V
Switching Frequency Range
f OSC
1.7
2.0
2.3
MHz
Maximum Duty Cycle
DC
100
--
--
%
Reference
Reference Voltage
Oscillator
VPVDD = VOUT
Output Voltage
Line Regulation
VDD = 2.4V to 5.5V, ILOAD = 100mA
--
--
+1.5
%
Load Regulation
10mA < ILOAD < 600mA
--
--
+1.5
%
Power Switches
RDS(ON) of P-MOSFET
RP_FET
VPVDD = 3.3V, I LX = 300mA
--
230
--
mΩ
RDS(ON) of N-MOSFET
RN_FET
VPVDD = 3.3V, I
--
180
--
mΩ
Current Limit
ILIMIT
VPVDD = 3.3V, VFB = VREF - 0.15V
--
1.8
--
A
LX
= −300mA
To be continued
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DS8005-10 March 2011
RT8005
Parameter
Symbol
Test Conditions
Min
Typ
Max
--
--
0.4
1.5
--
--
Unit
Logic Input
EN Threshold Voltage
Logic-Low
VIL
VDD = 2.4V to 5.5V, Shutdown
Logic-High
VIH
VDD = 2.4V to 5.5V, Enable
V
Protection
Thermal Shutdown Temperature
TSD
--
180
--
°C
Thermal Shutdown Hysteresis
∆TSD
--
20
--
°C
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ JA is measured in the natural convection at T A = 25°C on a high effective thermal conductivity test board of
JEDEC 51-7 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
DS8005-10 March 2011
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RT8005
Typical Operating Characteristics
Line Regulation Deviation
Load Regulation Deviation
0.004
0.4
VOUT = 1.2V
IOUT = 50mA
0.2%
0.2
0.0%0
IOUT
IOUT = 1000mA
= 500mA
-0.2%
-0.2
-0.4%
-0.4
-0.6%
-0.6
2
2.5
3
3.5
4
4.5
5
5.5
Output Voltage Deviation (%)1
Output Voltage Deviation (%)1
0.4%
0.4
0.002
0.2
00
VIN = 5V
-0.002
-0.2
VIN = 3.3V
-0.004
-0.4
-0.006
-0.6
1000
100 200 300 400 500 600 700 800 900 100
0
0
Input Voltage (V)
Load Regulation (mA)
Current Limit vs. Input Voltage
2.2
Efficiency vs. Output Current
100
VOUT = 1.2V
90
80
1.8
Efficiency (%)
Current Limit (A)
2
VOUT = 1.2V
1.6
1.4
VIN = 3.3V
70
60
50
VIN = 5V
40
30
20
1.2
10
1
0
2
2.5
3
3.5
4
4.5
5
1
5.5
10
Frequency vs. Input Voltage
1000
Frequency vs. Temperature
2.15
2.1
2.1
2.05
Frequency(MHz)1
Frequency(MHz)1
100
Output Current (mA)
Input Voltage (V)
2.05
2
1.95
1.9
2
1.95
1.9
1.85
1.85
1.8
2.5
3
3.5
4
4.5
Input Voltage(V)
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5
5.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
DS8005-10 March 2011
RT8005
Quiescent Current vs. Temperature
Quiescent Current vs. Input Voltage
220
VEN = 3.3V, VFB = 0.65V
275
Quiescent Current (μA)
Quiescent Current (μA)
300
250
225
200
175
VEN = 3.3V, VFB = 0.65V
210
200
190
180
170
160
150
150
2
2.5
3
3.5
4
4.5
5
-50
5.5
-25
0
25
50
75
100
125
100
125
Temperature (°C)
Input Voltage(V)
VREF vs. Input Voltage
VREF vs. Temperature
0.502
0.51
0.5
0.498
0.5
VREF (V)
VREF (V)
0.505
0.495
0.496
0.494
0.492
0.49
0.49
0.488
0.486
0.485
2
2.5
3
3.5
4
4.5
5
5.5
-50
-25
0
25
50
75
Input Voltage (V)
Temperature (°C)
Soft-Start Function
Soft-Start Function
VIN = 3.3V
VOUT = 1.2V
IOUT = 1A
VIN = 3.3V
VOUT = 1.2V
IOUT = 0mA
VOUT
VOUT
(500mV/Div)
(500mV/Div)
VEN
VEN
(2V/Div)
(2V/Div)
I IN
I IN
(50mA/Div)
(500mA/Div)
Time (500μs/Div)
DS8005-10 March 2011
Time (500μs/Div)
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RT8005
Steady State
Steady State
VIN = 3.3V, VOUT = 1.2V, IOUT = 1A
VIN = 3.3V, VOUT = 1.2V, IOUT = 0mA
VOUT
VOUT
(2mV/Div)
(2mV/Div)
VLX
(2V/Div)
VLX
(1V/Div)
ILX
ILX
(500mA/Div)
(1A/Div)
Time (250ns/Div)
Time (100μs/Div)
Load Transient Response
VIN = 3.3V, VOUT = 1.2V
IOUT = 100mA to 1A
Output
Voltage
(100mV/Div)
Load
Current
(500mA/Div)
Time (100μs/Div)
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DS8005-10 March 2011
RT8005
Application Information
RT8005 is a pulse-width-modulated (PWM) step-down DC/
DC converter. Capable of delivering 1A output current over
a wide input voltage range from 2.4V to 5.5V. The RT8005
is ideally suited for portable electronic devices that are
powered from 1-cell Li-ion battery or from other power
sources within the range such as cellular phones, PDAs
and handy terminals.
PSM Operation
Consequently, the converter will enter pulse-skipping mode
(PSM) during extreme light load condition or when
modulation index (VOUT /VIN) is extreme low. This could
reduce switching loss and further increase power
conversion efficiency.
Over Current Protection
Chip Enable/Disable and Soft-Start
Four operational modes are available: PWM, PSM, LowDrop-Out and shut-down modes. Pulling EN pin lower than
0.4V shuts down the RT8005 and reduces its quiescent
current to 1µA. Pulling EN pin higher than 1.5V enables
the RT8005 and initiates the soft-start cycle. RT8005 has
internal soft-start that can reduce the Inrush Current during
the rising of Output Voltage.
PWM Operation
During normal operation, the RT8005 regulates output
voltage by switching at a constant frequency transferring
the power to the load in each cycle by PWM. The RT8005
uses a slope-compensated, current mode PWM controller
capable of achieving 100% duty cycle. At each rising edge
of the internal oscillator, the Control Logic cell sends a
PWM ON signal to the Driver cell to turn on internal PMOSFET. This allows current to ramp up through the
inductor to the load, and stores energy in a magnetic field.
The switch remains on until either the current-limit is
tripped or the PWM comparator signals for the output in
regulation. After the switch is turned off, the inductor
releases the magnetic energy and forces current through
the N-MOSFET synchronous rectifier to the output-filter
capacitor and load. The output-filter capacitor stores charge
when the inductor current is above the average output
current and releases charge when the inductor current is
below the average current to smooth the output voltage
across the load. A Zero Detector monitors inductor current
by sensing v oltage drop across the N-MOSFET
synchronous rectifier when it turns on. The N-MOSFET
turns off and allows the converter entering discontinuous
conduction mode when the inductor current decreases to
zero. The zero current detection on threshold is about
80mA.This reduces conduction loss and increase power
The RT8005 continuously monitors the inductor current
by sensing the voltage across the P-MOSFET when it
turns on. When the inductor current is higher than current
limit threshold (1.8A typical), OCP activates and forces
the P-MOSFET turning off to limit inductor current cycle
by cycle.
Output Voltage Setting and Feedback Network
The output voltage can be set from VREF to VIN by a voltage
divider as: the internal VREF is 0.5V with 1.5% accuracy.
In practical application, keep R1 = 10kΩ respectively and
choose appropriate R2 according to the required output
voltage.
Inductor Selection
The output inductor is suggested as the table of suggested
inductors for optimal performance. Make sure that the
inductor will not saturate over the operation conditions
including temperature range, input voltage range, and
maximum output current. If possible, choose an inductor
with rated current higher than 2A so that it will not saturate
even under short circuit condition.
Input Capacitor Selection
The input capacitor can filter the input peak current and
noise at input voltage source. The capacitor with low ESR
(effective series resistance) provides the small drop voltage
to stabilize the input voltage during the transient loading.
For input capacitor selection, the ceramic capacitors larger
than 2.2µF is recommend. The capacitor must conform to
the RMS current requirement. The maximum RMS ripple
current is calculated as :
IRMS = IOUT(MAX)
VOUT (VIN - VOUT)
VIN
conversion efficiency at light load condition.
DS8005-10 March 2011
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RT8005
Output Capacitor Selection
The capacitor’ s ESR determines the output ripple voltage
and the initial voltage drop following a high slew-rate
transient’ s edge. Typically, if the ESR requirement is
satisfied, the capacitance is adequate to filtering. The
output ripple voltage can be calculated as :
∆VOUT = ∆IC (ESR +
1
)
8 x COUT x fOSC
Where f OSC = operating frequency, COUT = output
capacitance and ∆IC = ∆IL = ripple current in the inductor.
The ceramic capacitor with low ESR value provides the
low output ripple and low size profile. Connect a
2.2µF/4.7µF ceramic capacitor at output terminal for good
performance and place the input and output capacitors as
close as possible to the device.
2, 3
VIN
R3
R5
C2
4
RT8005
1
PVDD
LX
VDD
C3
5 EN
8 GND
FB
L1
VOUT
R1
6
COMP 7
9, 10
PGND
R2
C1
R4
C4
VIN
Figure 1
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8005.
For the main current paths as indicated in bold lines in
Figure 1, keep their traces short and wide.
}
} Put
the input capacitor as close as possible to the device
pins (PVDD and PGND).
} LX node is with high frequency voltage swing and should
Figure 2. Top Layer
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
} Connect
feedback network behind the output capacitors.
Keep the loop area small. Place the feedback components
near the RT8005.
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
}
} An
example of 2-layer PCB layout is shown in Figure 2
to Figure 3 for reference.
Figure 3. Bottom Layer
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DS8005-10 March 2011
RT8005
Outline Dimension
D2
D
L
E
E2
SEE DETAIL A
1
e
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.800
1.000
0.031
0.039
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
V-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8005-10 March 2011
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