New Product Si2312CDS Vishay Siliconix N-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY RDS(on) (Ω) ID (A)e 0.0318 at VGS = 4.5 V 6a 0.0356 at VGS = 2.5 V 6a 0.0414 at VGS = 1.8 V 5.6 VDS (V) 20 • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • 100 % Rg Tested • Compliant to RoHS Directive 2002/95/EC Qg (Typ.) 8.8 nC APPLICATIONS • DC/DC Converters • Load Switch for Portable Applications SOT-23 D G 1 3 Marking Code D P5 S XXX Lot Traceability and Date Code 2 G Part # Code Top View S Ordering Information: Si2312CDS-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Symbol VDS VGS TC = 25 °C TC = 70 °C TA = 25 °C Continuous Drain Current (TJ = 150 °C) Limit 20 ±8 ID 5b, c 4b, c 20 1.75 IDM TC = 25 °C TA = 25 °C TC = 25 °C TC = 70 °C TA = 25 °C Continuous Source-Drain Diode Current Maximum Power Dissipation TA = 70 °C Operating Junction and Storage Temperature Range V 6a 5.1 TA = 70 °C Pulsed Drain Current Unit IS A 1.04b, c 2.1 1.3 PD W 1.25b, c 0.8b, c - 55 to 150 260 TJ, Tstg Soldering Recommendations (Peak Temperature) °C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambientb, d Maximum Junction-to-Foot (Drain) t≤5s Symbol RthJA Typical 80 Maximum 100 Steady State RthJF 40 60 Unit °C/W Notes: a. Package limited b. Surface Mounted on 1" x 1" FR4 board. c. t = 5 s. d. Maximum under steady state conditions is 125 °C/W. e. Based on TC = 25 °C. Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 www.vishay.com 1 New Product Si2312CDS Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 20 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS Temperature Coefficient ΔVDS/TJ V 25 ID = 250 µA mV/°C VGS(th) Temperature Coefficient ΔVGS(th)/TJ Gate-Source Threshold Voltage VGS(th) VDS = VGS , ID = 250 µA 1.0 V IGSS VDS = 0 V, VGS = ± 8 V ± 100 nA VDS = 20 V, VGS = 0 V 1 VDS = 20 V, VGS = 0 V, TJ = 70 °C 10 Gate-Source Leakage - 2.6 0.45 Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) VDS ≤ 5 V, VGS = 4.5 V VGS = 4.5 V, ID = 5.0 A 0.0265 0.0318 RDS(on) VGS = 2.5 V, ID = 4.7 A 0.0296 0.0356 VGS = 1.8 V, ID = 4.3 A 0.0345 0.0414 VDS = 10 V, ID = 5.0 A 24 Drain-Source On-State Resistancea Forward Transconductancea gfs µA A 20 Ω S b Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 865 VDS = 10 V, VGS = 0 V, f = 1 MHz td(off) pF 55 VDS = 10 V, VGS = 5 V, ID = 5.0 A 12 18 8.8 14 1.1 VDS = 10 V, VGS = 4.5 V, ID = 5.0 A VDD = 10 V, RL = 2.2 Ω ID ≅ 4 A, VGEN = 4.5 V, Rg = 1 Ω 0.5 2.4 4.8 8 16 17 26 31 47 tf 8 16 td(on) 5 10 13 20 tr td(off) nC 0.7 f = 1 MHz td(on) tr 105 VDD = 10 V, RL = 2.2 Ω ID ≅ 4 A, VGEN = 5 V, Rg = 1 Ω tf 21 32 6 12 Ω ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current ISM Body Diode Voltage VSD TC = 25 °C 1.75 20 IS = 4 A, VGS = 0 V 0.75 1.2 A V Body Diode Reverse Recovery Time trr 12 20 ns Body Diode Reverse Recovery Charge Qrr 5 10 nC Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb IF = 4 A, dI/dt = 100 A/µs, TJ = 25 °C 7 5 ns Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 New Product Si2312CDS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 5 20 V GS = 5 V thru 2 V 4 V GS = 1.5 V I D - Drain Current (A) I D - Drain Current (A) 15 10 3 2 T C = 25 °C 5 1 T C = 125 °C V GS = 1 V 0 0.0 0.5 1.0 1.5 T C = - 55 °C 0 0.0 2.0 0.3 V DS - Drain-to-Source Voltage (V) 0.9 1.2 1.5 Transfer Characteristics Output Characteristics 1200 0.045 Ciss 0.040 900 C - Capacitance (pF) R DS(on) - On-Resistance (Ω) 0.6 V GS - Gate-to-Source Voltage (V) V GS = 1.8 V 0.035 V GS = 2.5 V 0.030 V GS = 4.5 V 600 300 0.025 Coss Crss 0 0.020 0 5 10 15 0 20 5 10 15 ID - Drain Current (A) V DS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 20 1.70 5 4 V DS = 10 V 3 V DS = 5 V 2 V DS = 16 V V GS = 2.5 V, I D = 4.7 A 1.45 (Normalized) R DS(on) - On-Resistance VGS - Gate-to-Source Voltage (V) ID = 5 A 1.20 V GS = 4.5 V, I D = 5 A 0.95 1 0 0 2 4 6 Qg - Total Gate Charge (nC) Gate Charge Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 8 10 0.70 - 50 - 25 0 25 50 75 100 125 150 T J - Junction Temperature (°C) On-Resistance vs. Junction Temperature www.vishay.com 3 New Product Si2312CDS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 0.06 R DS(on) - On-Resistance (Ω) I S - Source Current (A) ID = 5 A T J = 150 °C 10 T J = 25 °C 1 0.05 0.04 T J = 125 °C 0.03 T J = 25 °C 0.02 0.1 0.0 0.3 0.6 0.9 1.2 0 2 4 6 8 V GS - Gate-to-Source Voltage (V) V SD - Source-to-Drain Voltage (V) On-Resistance vs. Gate-to-Source Voltage Source-Drain Diode Forward Voltage 32 0.9 0.7 24 Power (W) VGS(th) (V) ID = 250 μA 0.5 0.3 0.1 - 50 16 8 - 25 0 25 50 75 100 125 0 0.001 150 0.01 0.1 1 10 100 Time (s) T J - Temperature (°C) Single Pulse Power (Junction-to-Ambient) Threshold Voltage 100 I D - Drain Current (A) Limited by R DS(on)* 10 100 μs 1 ms 1 10 ms TA = 25 °C Single Pulse 100 ms 0.1 1 s, 10 s DC BVDSS Limited 0.01 0.1 1 10 100 V DS - Drain-to-Source Voltage (V) * V GS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient www.vishay.com 4 Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 New Product Si2312CDS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 7.5 I D - Drain Current (A) 6.0 Package Limited 4.5 3.0 1.5 0.0 0 25 50 75 100 125 150 T C - Case Temperature (°C) Current Derating* 2.5 1.2 2.0 1.5 Power (W) Power (W) 0.9 1.0 0.6 0.3 0.5 0.0 0.0 0 25 50 75 100 125 150 0 25 50 75 100 125 T C - Case Temperature (°C) TA - Ambient Temperature (°C) Power Derating, Junction-to-Foot Power Derating, Junction-to-Ambient 150 * The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 www.vishay.com 5 New Product Si2312CDS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.05 PDM 0.1 t1 0.02 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 125 °C/W 3. T JM - TA = PDMZthJA(t) Single Pulse 0.01 10 -4 4. Surface Mounted 10 -3 10 -2 10 -1 1 10 100 1000 10 000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.02 Single Pulse 0.05 0.1 10 -4 10 -3 10 -2 10 -1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65900. www.vishay.com 6 Document Number: 65900 S10-0641-Rev. A, 22-Mar-10 Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 1 E 2 e S e1 D 0.10 mm C 0.004" A2 A C q Gauge Plane Seating Plane Seating Plane C A1 Dim 0.25 mm L L1 MILLIMETERS Min INCHES Max Min Max 0.044 A 0.89 1.12 0.035 A1 0.01 0.10 0.0004 0.004 A2 0.88 1.02 0.0346 0.040 b 0.35 0.50 0.014 0.020 c 0.085 0.18 0.003 0.007 D 2.80 3.04 0.110 0.120 E 2.10 2.64 0.083 0.104 E1 1.20 1.40 0.047 e 0.95 BSC e1 L 1.90 BSC 0.40 L1 q 0.0748 Ref 0.60 0.016 0.64 Ref S 0.024 0.025 Ref 0.50 Ref 3° 0.055 0.0374 Ref 0.020 Ref 8° 3° 8° ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 Document Number: 71196 09-Jul-01 www.vishay.com 1 AN807 Vishay Siliconix Mounting LITTLE FOOTR SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. ambient air. This pattern uses all the available area underneath the body for this purpose. 0.114 2.9 0.081 2.05 0.150 3.8 0.059 1.5 0.0394 1.0 0.037 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board. Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the Document Number: 70739 26-Nov-03 Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device. www.vishay.com 1 Application Note 826 Vishay Siliconix 0.049 (1.245) 0.029 0.022 (0.559) (0.724) 0.037 (0.950) (2.692) 0.106 RECOMMENDED MINIMUM PADS FOR SOT-23 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72609 Revision: 21-Jan-08 www.vishay.com 25 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000