App lica tion No te , V 2 .0 , Ju l y 2005 AP32090 CIC751 Quick Start with TC1766 via MLI. M i c ro c o n trollers N e v e r s t o p t h i n k i n g . CIC751 Revision History: 2005-07 Previous Version: Page Subjects (major changes since last revision) all Fit the application with the CIC751 Starter Kiz (switch to MLI1, etc). V 2.0 Controller Area Network (CAN): License of Robert Bosch GmbH We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Edition 2005-07 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2006. All Rights Reserved. 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AP32090 CIC751 Quick Start Table of Contents Table of Contents Page 1 Scope ............................................................................................................ 4 2 Introduction to the Micro Link Interface ......................................................... 5 3 3.1 3.2 3.2.1 3.2.2 3.2.3 How to initialize CIC751 via MLI.................................................................. 10 Goal ............................................................................................................ 10 Functional description ................................................................................. 12 TC1766 static initialization....................................................................... 12 Initialization procedures........................................................................... 12 The application. ....................................................................................... 24 4 4.1 4.2 4.2.1 4.2.2 4.2.3 4.3 Practical Implementation ............................................................................. 25 Hardware connection .................................................................................. 25 Setting up the Microcontroller...................................................................... 27 Static initialization.................................................................................... 27 Setting up Tasking environment. ............................................................. 58 Programming the TC1766 ....................................................................... 67 Running the application............................................................................... 79 5 Ready-to-use files ....................................................................................... 80 Application Note 3 V 2.0, 2005-07 AP32090 CIC751 Quick Start Scope 1 Scope The goal of this document is to present a solution, on both hardware and software levels, on how to use CIC751 together with a TC1766 microcontroller. With this application note, the user will learn how to configure both CIC751 and TC1766 in order to be able to perform data transfer between the two chips. Practically, the 5V ADC of CIC751 is used to convert an analog voltage, the conversion result being sent to the TC1766 via the MLI interface. This application notes gives all the step-by-step information, from hardware physical connection to software programming, in order to build successfully such a connection between the two chips. With this document, the reader should be able to create a successful application in less than half an hour. A program example is included with this application note. The code has been created 1) 2) using DAvE 2.1 and Tasking 2.2r1 . It is strongly recommended to use those versions when using the code delivered with this application note. One TriBoard for TC1766 as well as a standard PC are needed to run the application described in this document. This application note is especially written for being used together with the SAKCIC751 evaluation board. Please note that the code given in this application note shall be used for demonstration purpose only. It aims at giving an example on how to use CIC751 via MLI link. It is not optimized nor is its robustness guaranteed. Section 2 gives an overview of the MLI interface. Readers already familiar with the MLI may want to skip this section. Section 3 gives explanations the code example delivered with this application note. It goes in particular through the initialization routines from a functional point of view. In section 4, step-by-step explanations are given in order to build physically the connection. This includes hardware set-up, initialization of both chips, and code example. In section 5, some hints are given on the ready-to-use files provided with this application note. 1 ) 2) A compatible DavE DIP file is included in the package containing this document. For more information about Tasking Tool Chain and the latest patches, please visit www.tasking.com Application Note 4 V 2.0, 2005-07 AP32090 CIC751 Quick Start Introduction to the Micro Link Interface 2 Introduction to the Micro Link Interface MLI is a serial high speed link (up to 40 Mbaud for TC1766), which is based on a principle similar to the standard serial protocol. Due to its symmetrical structure, it supports full-duplex transmission. It only requires four signal lines in each data direction (downstream = transmit and upstream = receive). For each data transfer direction, there is one clock line (CLK), one data line (DATA) and two handshake lines (READY, VALID). One MLI transmitter might be connected to up to four scalable MLI receivers sharing the same Data and Clock line. An individual addressing of receivers is done by independent sets of handshake lines. Figure 1 MLI Transmitter – Receiver connection. The MLI interface has been developed to meet the following application targets: • Data and program exchanging without intervention of CPU or PCP between microcontrollers of the AUDO-NG family. The MLI is connected to the system bus and can do data move operations independently from the CPU(s). • The internal architecture of the block allows the communication between controllers in different clock domains. • The read mode enables the desired data to be read from the other controller. • Resources sharing between controllers. • Capability of triggering interrupts in the receiving controller by sending a command. Application Note 5 V 2.0, 2005-07 AP32090 CIC751 Quick Start Introduction to the Micro Link Interface Controller 1 Controller 2 CPU CPU Peripheral X Peripheral X Peripheral Y Peripheral Z MLI MLI System Bus Figure 2 System Bus MLI in a microcontroller MLI I/O-pins are CMOS compliant, allowing microcontrollers from the AUDO-NG family to be mounted closely together on the same PCB. This target doesn’t necessarily require cost-extensive LVDS drivers for better EMC behavior. Usage of CMOS MLI I/O drivers instead of LVDS drivers also has a beneficial impact on the absolute current consumption and requires less interface pins. Nevertheless there might be applications, where LVDS drivers are useful for MLI signals; e.g. for electronic valve train, where the ECU for the valves and the ECU for engine control are separated and need to communicate via longer MLI cable (up to more than 1 meter might occur). As a different cable length for the connection leads to a changing loop delay for transmitted or received messages, the timing of the MLI handshake signals can be adapted via programming during the startup procedure. The internal architecture of the MLI interface supports different clock domains for the transmitter or the receiver module. As the MLI interface is able to act as bus master on the system bus of the controller itself, it autonomously acts like a DMA controller and therefore might work in parallel to the CPU of the system. As a result, the MLI significantly reduces the CPU load for data transfer tasks. Remote control of peripherals located in the “other” controller is offered as a feature by this behavior; so Application Note 6 V 2.0, 2005-07 AP32090 CIC751 Quick Start Introduction to the Micro Link Interface calculation power or peripherals located in different sub-controller systems might be shared via MLI. MLI connection is not necessarily restricted to a controller-to-controller connection. Other products, such as smart companion devices (ASSP) can also be connected easily. The advantage of these devices is their extended voltage range, so that they could incorporate e.g. a 5V analog sensor interface or other analog and digital data preconditioning circuits. Figure 3 Smart companion device with MLI connection. General Description of MLI The communication between two participants is based on a pipe structure. A pipe may be seen as a logical connection between a transmitter and a receiver. In each MLI module, 4 independent pipes are available. The pipes point to address areas in the receiver, starting at programmable base addresses. The MLI transmitter only sends a short offset relative to the base address instead of the full 32-bit address. Each pipe defines a buffer in the receiver’s address map (defined by the base address, the offset and the length of the offset). Application Note 7 V 2.0, 2005-07 AP32090 CIC751 Quick Start Introduction to the Micro Link Interface Figure 4 MLI pipe structure. In addition to the offset (its bit width defines the buffer size), the MLI transmitter sends a reference to the pipe in use. When the MLI receiver obtains this data it elaborates the absolute target address by simply concatenating the received offset to the base address of the selected pipe. A data write access to a pipe in controller 1 leads to an automatic transfer from the MLI transmitter to the MLI receiver on controller 2. This transfer includes the written data, the offset address and the pipe number. The received information becomes available in the MLI receiver. The CPU of controller 2 can read it under SW control or the MLI can autonomously write it to the given address. In order to avoid write actions to safety-critical address areas, an access protection scheme has been added. A read access to a pipe transfers a request to the MLI receiver on controller 2. If enabled, the MLI executes the read operation autonomously and the requested data will be sent back to the MLI on controller 1 (by the MLI transmitter on controller 2 to the MLI receiver of controller 1). When this information is available in the MLI module of controller 1, an interrupt can be generated and the CPU (or a DMA, etc.) of controller 1 can read the requested data. Application Note 8 V 2.0, 2005-07 AP32090 CIC751 Quick Start Introduction to the Micro Link Interface Figure 5 Target address generation. The kernel MLI includes an optimized mode to transfer data blocks. Whenever the MLI transmitter detects that the new address and the previous one follow a predictable scheme, it will send just the data reducing this way the number of transferred bits. If the complete autonomous feature set of MLI connection is enabled, data transfers between two participants can take place without any CPU action for data handling. The transmitting MLI stores the write access to its pipes, does the complete encoding and transfers the complete move action to the receiving MLI. There, the address and the data are reconstructed and the write action is executed on the system bus. As a result, a MLI module can be seen as a fully autonomous module transferring data moves between the system buses of independent controllers. Application Note 9 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI 3 How to initialize CIC751 via MLI 3.1 Goal The goal of this application note is to set-up an MLI link between a TC1766 and CIC751, as depicted in Fig. 6. MLI1 TC1766 Transmitter ADC conversion request Reciever TREADYA Transfer window TIMER TVALIDA Register ADC_CON RVALIDA TCLKA Timer event Conversion Request RREADYA 5V Pin AIN4 RCLKA TDATAA RDATAA Write ADC CPU IRQ DMA Register RDATAR CPU ADC conversion result Transmitter DMA Request Write GND RDATAA TDATAA RVALIDA TVALIDA RCLKA TCLKA RREADYA ASC0 Transfer window Register ADC_DAT TREADYA Reciever SAKCIC 751 PC Figure 6 MLI link between two controllers. TC1766 runs at 80 MHz CPU frequency, CIC751 at 20MHz system frequency. The MLI links runs at 10 Mbaud/s (in both directions). However, both directions run in their own clock domain. Specifically, the following actions shall be performed: - A free running timer (Local Timer cell of the GPTA) runs continuously, the overflow period being about 1sec. - When the timer overflows, an interrupt is generated and TC1766 sends a conversion requests to the CIC751 ADC via the MLI link (interface MLI1 on TC1766). - CIC751 converts the analog voltage generated by the on-board potentiometer to a digital value. Application Note 10 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI - The end of conversion generates a DMA transaction request. The conversion result is written to a transfer window, triggering an MLI transfer. - When the write frame is received by TC1766, an interrupt request is serviced by the CPU. The conversion result (8 bits) is processed by the service routine. - The CPU writes the conversion result to the transmit buffer of ASC0, generating an asynchronous transfer. The data are received by the PC and are displayed on a terminal window. Application Note 11 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI 3.2 Functional description This section describes from a functional point of view the different steps that need to be performed on TC1766 in order to initialize CIC751 via the MLI link, and to execute the application. The principles developed here are general and can be used in most of the cases. However, practical implementations may differ from the description below, depending on the specific applications requirements. 3.2.1 TC1766 static initialization DAvE is used to initialize statically the TC1766. The following parameters are especially defined: - General settings (CPU clock, interrupts enabled, etc). - ASC module settings (asynchronous full duplex link, 9.6kBaud/s, etc.). In the program described here, the ASC interface is used to send the A/D conversion results received from CIC751 to a PC, so that the result can be displayed on a terminal window. - GPTA settings (module click frequency, definition of a LTC as a free running timer). In the program described here, one LTC of the GPTA is used as a free running timer, whose overflow period is about 1 sec. When the timer overflows, an interrupt request is generated to the CPU. The service routine consists in sending a conversion request to the ADC of CIC751. - MLI1 settings. Settings like pin assignment, module clock frequency are defined here. 3.2.2 Initialization procedures. When the two devices are powered on, and once TC1766 MLI interface is statically initialized, some procedures are needed to - Set-up the MLI link in the direction from TC1766 to CIC751. - Configure the system parameters of CIC751 (PLL parameters, etc) and setup the MLI link from CIC751 to TC1766. Application Note 12 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI - 3.2.2.1 Configure the other modules according to the needs of the application. It means in this case the DMA and the ADC of CIC751 and the MLI module of TC1766. First step: setting up the MLI link from TC1766 to CIC751. At the beginning, all Service Request Nodes (SRN) of TC1766 are disabled (it means one MLI SRN and one GPTA SRN). They will be enabled later on. This solution has been chosen here in order to avoid unwanted servicing of routines initiated by the dummy frames used below. During this step, TC1766 is used as local MLI controller. TC1766 configures first both local transmitters (TC1766) and remote receiver (CIC751) so that the parity error signaling is performed correctly; TC1766 also configures the base address of the remote window. A flow chart describing step 1 is depicted Fig. 8. Note: In the program, this corresponds to the function init_uC_mli(). First, the local controller has to configure its transmitter and the remote receiver so that parity error signaling is performed correctly. This is performed according to the set-up 1) procedure described in the TC1766 User’s Manual . For the sake of clarity, in order to avoid mismatch between this specific procedure and the rest of the procedures described here (which are also initialization procedures), the “set-up procedure” described in the User’s Manual will be referred as “parity error start-up procedure”, or PESP. PESP A flow chart describing the PESP is depicted Fig. 7. Note: In the program, this corresponds to the function MLI1_startup_procedure(). TC1766 sends a dummy frame (in this case, a command frame on pipe 0). It waits for the transfer to complete and then measures how many cycles have elapsed between the beginning of the transfer and the moment when the signal Ready toggles from Low to High. The measurement is done by reading the bit field MLI1_TSTATR.RDC. This value represents the overall loop delay, as defined in the PESP description. In the case of this example, the value RDC+1 is written to bit field MLI1_TCR.MDP. 1 ) User’s Manual, Peripheral Units, V0.3, May 2005, section 21.1.9. Application Note 13 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI MC1 then sends a command frame on pipe 1 to write on the remote controller bit field MLI1_RCR.DPE. In the case of this example, MLI1_RCR.DPE is chosen to be MLI1_TCR.MDP + 2. As defined in the user’s manual, these settings need to be tested. First, a dummy frame with parity error is sent (by setting bit MLI1_TCR.TP to 1) and the software checks if the error is detected by the transmitter (by checking bit MLI1_TSTATR.PE). If not, special actions must be taken and the start-up procedure must be restarted from the beginning. If an error is correctly detected, then TC1766 sends a dummy frame with no parity error. The software checks if no error occurs (by checking bits MLI1_TSTATR.PE and MLI1_TSTATR.NAE). If an error is detected, special actions must be taken and the start-up procedure must be restarted from the beginning. If not, this finishes PESP. End of step 1. Once the PESP is correctly executed, TC1766 sends a copy base address frames, in order to configure the remote window of CIC751 on pipe 0. In this example, the base address of remote window 0 is 0x00000000, and its size is 64kBytes. Application Note 14 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI Send a dummy Command Frame on Pipe 0 Read TSTATR.RDC Crash action!! no TSTATR.RDC <0xC yes Write TCR.MDP = TSTATR.RDC + 1 Sends command frame on Pipe 1 to set RCR.DPE= TCR.MDP +2 Sends dummy Command Frame with parity error on pipe 0 Crash action!! no Parity error detected? yes Sends dummy Command Frame with no parity error on pipe 0 Crash action!! yes Parity error detected? no End of PESP Figure 7 Application Note Parity Error Signaling Procedure (PESP). 15 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI Figure 8 3.2.2.2 .Start-up procedure: step 1. Step 2: initializing CIC751 In this step, TC1766 goes through several sub-steps in order to configure CIC751. Note: In the program, this corresponds to the function: init_mongoose_mli(). A flow chart describing step 2 is depicted Fig. 9. First, TC1766 sends a command frame on pipe 2, in order to enable the move engine of CIC751. Secondly, TC1766 configures the system clock of CIC751. A first write frame, targeting register STCU_PLLCON, bypasses the VCO. A second write frame, targeting STCU_CON as well, sets the PLL parameters. A final write frame, targeting the same register again, disables the VCO bypass. The system clock is now set to 20MHz. Note: In the program, this corresponds to the function: config_mongoose_sysclock(). Thirdly, TC1766 configures the module clock of CIC751. A write frame, targeting register MLI_FDR, sets the MLI clock to fsys/2 (i.e. 10MHz). Note: In the program, this corresponds to the function: config_mongoose_mliclock(). Fourthly, TC1766 has to configure the MLI link from CIC751 to TC1766, so that parity error signaling is performed correctly. Principally, it is similar to the PESP procedure described above, even if there are some significant differences. The procedure will be called MPESP. Note: In the program, mongoose_startup_procedure(). Application Note this corresponds 16 to the function: V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI MPESP Flow charts describing the MPESP are depicted Fig. 10, 11, 12 Note: In the program, this corresponds to the function MLI1_startup_procedure(). During the MPESP, TC1766 triggers all the actions by writing to the corresponding MLI registers of CIC751. However, as far as the MLI link (from CIC751 to TC1766) is concerned, CIC751 acts as the local controller, and TC1766 as the remote controller. The MPESP procedure starts by clearing any running transfer in CIC751 (this is just a security feature, since it is recommended in this application note to perform a power on reset before starting the application). Then, the bit field CIC751 MLI_TCR.MDP is set to a higher value than bit field TC1766 MLI1_RCR.DPE. This ensures that if the next frame transfers are performed correctly, no parity error will be falsely detected by the transmitter of CIC751. A dummy command frame on pipe 3, from CIC751 to TC1766, is then generated, and the loop delay (CIC751 MLI_TSTATR.RDC) is read by TC1766. The value (loop delay + 1) is written to bit field CIC751 MLI_TCR.MDP. A command frame on pipe 1 is then generated (from CIC751 to TC1766), so that TC1766 RCR.DPE is set to the value (loop delay +3). These settings need to be tested, by first sending a dummy frame (with no parity error) and by checking if indeed, no error is detected by either the receiver of the transmitter. All the error flags are cleared in both chips, and a dummy command frame is sent on pipe 3 (from CIC751 to TC1766). TC1766 checks if it has received the frame correctly, and then it reads the value of bits CIC751 MLI_TSTATR.PE and MLI_TSTATR.NAE. Normally, the both error flags should be set to 0. The final step of the MPESP is to generate a transfer where an error has been inserted, and to check if the error is correctly detected. First, TC1766 configures CIC751 MLI_TCR.TP so that odd parity is selected. All error flags within CIC751 are then cleared. A dummy transfer on pipe 3 (from CIC751 to TC1766) is then generated. TC1766 checks if its receiver has detected a parity error. If so, it reconfigures the transmitter of CIC751 to even parity, and reads the status of bit CIC751 MLI_TSTATR.PE. If it is set to one, it means that a parity error has been also recognized by CIC751 transmitter. This ends up successfully the MPESP procedure. Application Note 17 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI End of step 2. Finally, TC1766 clears all pending transfers, errors and interrupt flags of CIC751. Note: In the program, this corresponds to the function mongoose_clear_all(). Figure 9 Application Note Start-up procedure: Step 2. 18 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI Figure 10 Application Note MPESP procedure. 19 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI SAKCIC751 TC1766 MPESP_2 Clear all error flags Send write frame to MLI_SCR Clears error Flags in both chips Clears interrupt and error flags in TC1766 Send dummy frame on pipe 3 Send Write Frame to MLI_TCMDR Clear dummy transfer Send write frame to MLI_SCR Generate dummy transfer from SAKCIC751 to TC1766 Wait for transfer to complete Frame Received w/o error? no Crash Action! Check if frame correctly received by TC1766 yes Send answer frame. Send read frame to MLI_TSTATR Wait for transfer to complete Clears read request. Clear transfer Read MLI_TSTATR.PE from SAKCIC751 Send write frame to MLI_SCR Wait for transfer to complete Error Detected by CIC? yes Crash Action! no Go to MPESP_3 Figure 11 Application Note MPESP procedure (cont.). 20 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI SAKCIC751 TC1766 MPESP_3 Odd parity selected Send Write Frame to MLI_TCR Clear all error flags Send write frame to MLI_SCR Send dummy frame on pipe 3 Send Write Frame to MLI_TCMDR Clear dummy transfer Send write frame to MLI_SCR Generate odd parity transmission for SAKCIC751 Clears error Flags for SAKCIC751 Generate dummy transfer from SAKCIC751 to TC1766 Wait for transfer to complete Frame Received with PE error? no Crash Action! Check if error correctly detected by TC1766 yes even parity selected Send Write Frame to MLI_TCR Send answer frame. Send read frame to MLI_TSTATR Wait for transfer to complete Clears read request. Clear transfer Read MLI_TSTATR.PE from SAKCIC751 Send write frame to MLI_SCR Wait for transfer to complete Parity error Detected by CIC? no Crash Action! yes End of MPESP Figure 12 Application Note MPESP procedure (cont.). 21 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI 3.2.2.3 Step 3: getting ready for the application. During this final step, TC1766 finishes the configuration of its MLI interface (clear all errors, enable optimized frames, etc.). Note: In the program, this corresponds to the function: config_uC_MLI(). It then configures the ADC of CIC751 by writing to registers ADC_CON and ADC_CON1 (fixed channel single conversion mode, channel 0 selected, 8bit conversion, etc). Note: In the program, this corresponds to the function: mongoose_init_adc(). Then, it configures the DMA of CIC751, so that each time a conversion result is available, the result is written into the transfer window (channel 0 is used). Note: In the program, this corresponds to the function: mongoose_init_dma(). It finally enables all interrupt sources. Application Note 22 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI Step 3 Finish configuration of TC1766 MLI Init SAKCIC751 ADC Init SAKCIC751 DMA Enable Interrupts sources End of start-up proc. Figure 13 Application Note Start-up procedure: step 3. 23 V 2.0, 2005-07 AP32090 CIC751 Quick Start How to initialize CIC751 via MLI 3.2.3 The application. At this point, all errors generated in both MLI controllers by the start-up procedures have been cleared. The parity error signaling has been checked and is functional. Both chips are now ready to communicate with each other. Conversion request. One LTC of the GPTA has been configured as a free running timer cell. When it overflows, an interrupt request is serviced by the CPU. The service routine itself basically triggers an MLI write frame to CIC751, so that bit ADC_CON.ADST is set to one and an A/D conversion is started. Transmitting the conversion result back to the microcontroller. When the result is available, the DMA channel 0 writes automatically the conversion result in transfer window 0 of the CIC751. This triggers an MLI write frame on the MLI link. When the data are received by the MLI receiver of TC1766, an interrupt is generated to the CPU. Transmitting the conversion result back to the microcontroller. The interrupt routine converts the data received in register MLI1_RDATAR into the corresponding ASCII code and move the result into the ASC0 transmit buffer. The 8 bit data is automatically sent to the PC, and can be read on a terminal window. Application Note 24 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4 Practical Implementation The following items are necessary to realize the set-up described below: • One TriBoard for TC1766. • OneTriBoard Logic Analyzer Extension Board. • One evaluation board for CIC751, • Tasking Tool Chain (TriCore Compiler, CrossView Pro Debugger) version 2.2r1. Assembler, Linker/Locator, Note: The Quick Start may not work with a demo version of the Tasking Tool Chain. Please contact Tasking a full featured version for demo purpose (time limited). For more information, please visit www.tasking.com. • DAvE, the Digital Application Engineer, version 2.1. Please install the DIP file for TC1766 included in the package containing this document. • A standard PC (with Windows NT, XP or 2000). 4.1 Hardware connection Just connect the starter kit to the 80-pin “GPTA/MLI” connector. The required MLI connection between the two chips as described in Table 1, will then be performed: Device Signal TC1766 TC1766 TC1766 TC1766 TC1766 TC1766 TC1766 TC1766 TCLK1A TREADY1A TVALID1A TDATA1A RCLK1A RREADY1A RVALID1A RDATA1A Table 1 Device Signal CIC751 CIC751 CIC751 CIC751 CIC751 CIC751 CIC751 CIC751 RCLK RREADY RVALID RDATA TCLK TREADY TVALID TDATA Physical MLI connections between the two chips. Connect a potentiometer (e.g. 5kOhms) between 5.0V and Ground, with its variable output to connected AIN4. The connection between the two boards is depicted in Fig. 11. Application Note 25 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation Figure 14 Hardware set-up. Note: Make sure that the following resistances (0 Ohm) are removed from the TC1766 TriBoard: R531, R532, R533, R534, R535 and R536 (please refer to TriBoard manual). Application Note 26 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4.2 Setting up the Microcontroller. 4.2.1 Static initialization. The controller can be configured using DAvE (v2.1). Open a new project for TC1766. Project settings: 1. General Settings. - Rename the Main Source File into Main_Local.c. - Rename the Main Header File into Main_Local.h. - Select Tasking 2.0. Application Note 27 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 2. System Clock - Change external clock frequency to 15 MHz. Change input divider PDIV to 2. Change VCOSEL to 400MHz – 500 MHz. Change feedback divider NDIV to 64. Change output divider KDIV to 6. Application Note 28 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 3. Interrupt system - Enable the Interrupt System globally. Application Note 29 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation MLI1: 4. Module clock - Change Divider Mode Control to “Select normal divider mode”. - Change “Required Module Clock” to 20 MHz. Application Note 30 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 5. Tx Lines / TCLKA - TCLKA pin selection: Use pin P5.11. - Driver Mode: Medium Driver. 6. Tx Lines / TREADYA - TREADYA pin selection: Use pin P5.10. - Driver Mode: Medium Driver. 7. Tx Lines / TVALIDA - TVALIDA pin selection: Use pin P5.9. 8. Tx Lines / TDATAA - TDATAA pin selection: Use pin P5.8. Application Note 31 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 9. Tx Lines - Change Transmitter Ready Selector to TREADYA. - Enable output signal TCLK, input signal TREADY, output signal TVALIDA. Application Note 32 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 10. Rx Lines - Configure - Alternate Port Function to RCLKA=P5.15, RVALIDA=P5.13, RDATA=P5.12. Change Receiver Data Selector to RDATAA. Change Receiver Clock Selector to RCLKA. Change Receiver Ready Selector to RREADYA. Change Receiver Valid Selector to RVALIDA. Enable input signals RCLK and RVALID. Application Note 33 RREADYA=P5.14, V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 11. Control - Select MLI Transmitter ON. - Disable optimized frames. Application Note 34 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 12. Rx Interrupt - Normal Frame Received Interrupt Enable: an interrupt is generated each time a normal frame is correctly received. - Normal Frame Received Interrupt Pointer: select Service Request Node 0. Application Note 35 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 13. Memory - Enable all address ranges. Application Note 36 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 14. SRN - Enable Service Request 0 Application Note 37 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 15. Interrupts - Drag and drop SRN0 to CPU – Level1 Application Note 38 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 16. Functions - Select all Application Note 39 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation ASC0: 17. Module clock - Enable the ASC0 module. - Change clock divider to “system clock / 1 (=80 MHz)”. Application Note 40 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 18. Pin selection : - Click on “Configure pins ASC0_RX and ASC0_TX”. Application Note 41 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 19. ASC0_RXD0 - Select Pin 3.0. - Select Medium Driver. Application Note 42 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 20. ASC0_TXD0 - Select Pin 3.1. Application Note 43 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 21. Baud Rate - Select a baud rate of 9.6kbaud. Application Note 44 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 22. Functions. - Select ‘ASC0_vInit’. Application Note 45 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation GPTA Clock: 23. Module clock - Enable the GPTA module. - Select “Normal Divider Mode”. - Select a module clock of 100 kHz. Application Note 46 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 24. Timer Clock Control. - Enable GPTA0 timer clock module. Application Note 47 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation GPTA0: 25. Clock Generation. - Click on CDU. Application Note 48 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 26. Clock Generation / Clock Bus 7-6. - Select “divided GPTA0 clock”. - Select divide factor 2^1. Application Note 49 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 27. Local Timer. - Click on LTC0. Application Note 50 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 28. Local Timer /LTC0 / LTC0. - Enable LTC0 after initialization. Mode: Free Running Timer. Connect the input line to LTC0. Enable Rising edge of selected input. Application Note 51 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 29. Local Timer /LTC0 /Data Input. - Select Clock 7. Application Note 52 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 30. Functions. - Select ‘GPTA0_vInit’. Application Note 53 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 31. SRN. - Select Service Request Node 22 -23. Application Note 54 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 32. SRN /Service Request Node 22 -23 (LTC 0 – 7) / SRNs. - Enable service request on LTC0 event. - Enable Service Request Node 22. Application Note 55 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 33. SRN /Service Request Node 22 -23 (LTC 0 – 7) / Interrupts. - Drag and drop GPTA0 SRN22 to CPU interrupt Level 2. Application Note 56 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation Now, the configuration of the Local controller is finished. Create a new folder on your hard drive (for example C:\SAKCIC751\ QuickStart_Cic_tc1766viaMLI ) and save there DAvE project (for example config_tc1766.dav ). Code can now be generated with DAvE. The following files will be created: - TC1766REGS.H MAIN_LOCAL.H MAIN_LOCAL.C MLI1.H MLI1.C GPTA0.C GPTA0.H ASC0.C ASC0.H Application Note 57 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4.2.2 Setting up Tasking environment. 34. Start Tasking v2.2.r1 35. Create a new project space - ’File’ -> ’New Project Space’ - Enter a path (for example: C:\SAKCIC751) and a name (for example: TC1766). 36. Create a new project - Right - click once on the project space TC1766 (window on the left). - Select ’Add New Project’. - Enter a path (for example: C:\SAKCIC751\QuickStart_Cic_tc1766viaMLI ) and a name (for example: qs_mli ). - Click OK 37. Add DAvE generated files to the project - Right - click once on the project qs_mli (window on the left). - Select ’Add existing files’. - Add TC1766REGS.H, MAIN_LOCAL.H, MAIN_LOCAL.C, MLI1.H, MLI1.C, GPTA0.C, GPTA0.H, ASC0.C, ASC0.H. - Click OK. 38. Add two new files to the projects Right - click once on the project qs_mli (window on the left). Select ’Add new files’. Add MLI1_Config_Local.C Click OK Repeat the previous step and add MLI1_Config_Local.H. - Application Note 58 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation Setting up the project options 39. Open the project option dialog box - ’Project’ -> ’Project Options’ 40. Processor -> Processor Definition - Select TC1766 Application Note 59 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 41. Processor -> Bypasses - Select All bypasses. Application Note 60 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 42. C Compiler -> Preprocessing - Disable automatic inclusion of .sfr files. Application Note 61 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 43. C Compiler -> Optimization - Select no optimization. Application Note 62 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 44. C Compiler -> Allocation. - Disable Default __near allocation. Application Note 63 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 45. Linker -> Script file -> internal memory SPRAM. - Alloc: select ON. - Type: select ROM Application Note 64 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 46. Linker -> Script file -> Sections. - Space: select linear. - Sections: type .text.*.main - Group: select order. - Copy: select NO. - Alloc: select intmem - Location: select spram. Application Note 65 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 47. CrossView Pro -> Execution environment - Execution environment: Select TriBoard TC1766 with SRAM. Application Note 66 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4.2.3 Programming the TC1766 In addition to the code automatically generated by DAvE, the following code shall be added. It is recommended to add this code in the dedicated area between the two comments: // USER CODE BEGIN //add code // USER CODE END Note: All the files needed to compile and run this application are attached and can be used directly. Comments are also included there. 4.2.3.1 GPTA0.C void INTERRUPT (GPTA0_SRN22INT) GPTA0_viSRN22(void) // USER CODE BEGIN (SRN22,3) mli_write_hword (MLI1_LWIN0,0x1010, 0x0084); // USER CODE END 4.2.3.2 MLI1.C void MLI1_vInit(void) • End of the routine: // USER CODE BEGIN (Init,3) MLI1_RCR = 0x00010000; // USER CODE END void INTERRUPT (MLI1_INT0) MLI1_viSRN0(void) • Beginning of the routine: Application Note 67 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation // USER CODE BEGIN (SRN0,2) ubyte x, y, z; // USER CODE END • Case 2: // USER CODE BEGIN (SRN0,132) x = MLI1_RDATAR >>2; y = (x & 0xf0) >> 4; z = hex2ascii(y); ASC0_TBUF = z; while( (ASC0_TSRC & 0x00002000) == 0); ASC0_TSRC = ASC0_TSRC | 0x00004000; while( (ASC0_TSRC & 0x00002000) != 0); y = (x & 0x0f); z = hex2ascii(y); ASC0_TBUF = z; while( (ASC0_TSRC & 0x00002000) == 0); ASC0_TSRC = ASC0_TSRC | 0x00004000; while( (ASC0_TSRC & 0x00002000) != 0); ASC0_TBUF = 0x20; while( (ASC0_TSRC & 0x00002000) == 0); ASC0_TSRC = ASC0_TSRC | 0x00004000; while( (ASC0_TSRC & 0x00002000) != 0); // USER CODE END • End of the routine: // USER CODE BEGIN (SRN0,13) while(MLI1_RISR & MLI1_RISR_NFRI); // USER CODE END 4.2.3.3 MLI1_Config_Local.H // Start of file #define remote_pipe0_base 0x00000000 #define MLI1_ubTxAllDataReady() ((ubyte) ((MLI1_TRSTATR & \ (MLI1_TRSTATR_DV0 | MLI1_TRSTATR_DV1 | MLI1_TRSTATR_DV2 | \ MLI1_TRSTATR_DV3)) == 0)) Application Note 68 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation #define MLI1_ubTxAllPendingReadReady() ((ubyte) ((MLI1_TRSTATR & \ (MLI1_TRSTATR_RP0 | MLI1_TRSTATR_RP1 | MLI1_TRSTATR_RP2 | \ MLI1_TRSTATR_RP3)) == 0)) #define #define #define #define #define #define #define #define wait_bf wait_bf_neg wait_cf wait_cf_neg wait_df wait_df_neg wait_rf wait_rf_neg while(MLI1_ubTxBaseAddrReady()==0) while(MLI1_ubTxBaseAddrReady()!=0) while(MLI1_ubTxCmdReady()==0) while(MLI1_ubTxCmdReady()!=0) while(MLI1_ubTxAllDataReady()==0) while(MLI1_ubTxAllDataReady()!=0) while(MLI1_ubTxAllPendingReadReady()==0) while(MLI1_ubTxAllPendingReadReady()!=0) #define NOP __asm("nop \n") #define wait_states 10000 void void void void init_uC_mli(void); MLI1_startup_procedure(void); config_uC_MLI(void); wait(int i); #define uC_pipe0_base 0xf0000a00 #define #define #define #define Mongoose_SWIN0 Mongoose_SWIN1 Mongoose_SWIN2 Mongoose_SWIN3 0x0008000 0x000A000 0x000C000 0x000E000 #define #define #define #define Mongoose_LWIN0 Mongoose_LWIN1 Mongoose_LWIN2 Mongoose_LWIN3 0x00010000 0x00020000 0x00030000 0x00040000 void init_mongoose_mli(void); void config_mongoose_sysclock (void) ; void config_mongoose_mliclk (void); void mli_write_byte (uword base_address,uword offset, ubyte value); void mli_write_hword (uword base_address,uword offset, ushort value); void mli_write_word (uword base_address,uword offset, uword value); void mli_read_byte (uword base_address,uword offset); void mli_read_hword (uword base_address,uword offset); void mli_read_word (uword base_address,uword offset) ; void mongoose_startup_procedure(void); Application Note 69 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation void void void void mongoose_config_mli_module(void); mongoose_clear_all(void); mongoose_init_adc(void); mongoose_init_dma(void); ubyte hex2ascii(ubyte x); // End of file 4.2.3.4 MLI1_Config_Local.C #include "MAIN_Local.h" void init_uC_mli(void) { MLI1_startup_procedure(); MLI1_vSendBaseAddr(0, remote_pipe0_base, 15); wait_bf_neg; wait_bf; } void init_mongoose_mli(void) { MLI1_vSendCmdModeAuto(); wait_cf_neg; wait_cf; config_mongoose_sysclock(); config_mongoose_mliclk(); mongoose_startup_procedure() ; mongoose_config_mli_module(); mongoose_clear_all(); } void config_uC_MLI(void) { MLI1_TCR = MLI1_TCR & ~MLI1_TCR_NO; MLI1_vResetErrors(); MLI1_TIER = MLI1_TIER | 0x03FF0000; while(MLI1_TISR!=0); MLI1_RIER = MLI1_RIER | 0x03FF0000; while(MLI1_RISR!=0); MLI1_vReceiverModeAuto(); Application Note 70 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation } void MLI1_startup_procedure(void) { int k=0; ubyte volatile line_delay, pe1_flag, pe2_flag; line_delay = 0; pe1_flag =0; pe2_flag =0x1; MLI1_TCR |= MLI1_TCR_RTY ; MLI1_vResetCommunication(); MLI1_vSendCmdInt(0); MLI1_SCR = MLI1_SCR_CCV0; wait(wait_states); MLI1_vResetCommunication(); line_delay = MLI1_ubGetDelay()+1; if (line_delay < 0xC) MLI1_vSetDelay(line_delay); else while(1); MLI1_vSendCmdDelay(line_delay+3); MLI1_SCR = MLI1_SCR_CCV1; wait(wait_states); MLI1_SCR = MLI1_SCR_CTPE | MLI1_SCR_CNAE; while((MLI1_TSTATR & MLI1_TSTATR_NAE) & (MLI1_TSTATR & MLI1_TSTATR_PE) !=0); MLI1_vParityErrorMode(); MLI1_vSendCmdInt(0); MLI1_SCR = MLI1_SCR_CCV0; wait(wait_states); pe1_flag= (MLI1_TSTATR & MLI1_TSTATR_PE); if (pe1_flag==0) while(1); MLI1_vParityNormalMode(); MLI1_SCR = MLI1_SCR_CTPE | MLI1_SCR_CNAE; while((MLI1_TSTATR & MLI1_TSTATR_NAE) & (MLI1_TSTATR & MLI1_TSTATR_PE) !=0); MLI1_vSendCmdInt(0); MLI1_SCR = MLI1_SCR_CCV0; wait(wait_states); pe2_flag= (MLI1_TSTATR & MLI1_TSTATR_PE) | (MLI1_TSTATR & MLI1_TSTATR_NAE); if (pe2_flag!=0) while(1); } Application Note 71 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation void wait(int i) { int j; for (j=0; j<=i;j++) { NOP; } } void config_mongoose_sysclock (void) { mli_write_hword (MLI1_LWIN0,0x804, 0xcb02); mli_write_hword (MLI1_LWIN0,0x804, 0xf348); mli_write_hword (MLI1_LWIN0,0x804, 0x7348); } void config_mongoose_mliclk (void) { mli_write_hword (MLI1_LWIN0,0x20c, 0x43ff); } void mongoose_startup_procedure(void) { uword volatile *x; ubyte volatile *y; uword volatile u=0; ubyte volatile v=0, tcr_val =0, line_delay=0; mli_write_word (MLI1_LWIN0,0x294, 0x0f02ff00); wait(wait_states); v = MLI1_RCR & 0x0f ; if (v > 0xc) while(1); v = v + 0x2; v = (v << 2) +0x2; mli_write_byte (MLI1_LWIN0,0x211, v); mli_write_byte (MLI1_LWIN0,0x22b, 0x0a); mli_write_byte (MLI1_LWIN0,0x295, 0x80); wait(wait_states); y = MLI1_LWIN0 + 0x214 ; v = *y; wait_df_neg; wait_df; wait(wait_states); Application Note 72 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation MLI1_SCR= MLI1_SCR | MLI1_SCR_CDV0; mli_write_word (MLI1_LWIN0,0x294, 0x0f02ff00); wait(wait_states); line_delay= MLI1_RDATAR & 0x0000000f; v = line_delay +0x1; if (line_delay > 0xc) while(1); tcr_val = (v << 2) +0x2; mli_write_byte (MLI1_LWIN0,0x211, tcr_val); v = line_delay +0x3; mli_write_byte (MLI1_LWIN0,0x229, v); mli_write_byte (MLI1_LWIN0,0x295, 0x20); wait(wait_states); mli_write_byte (MLI1_LWIN0,0x297, 0x0e); MLI1_SCR = MLI1_SCR_CRPE; // Clears TSTATR error flags while ( (MLI1_RCR & MLI1_RCR_PE) !=0 ) ; MLI1_RIER = MLI1_RIER | 0x03ff0000; while ((MLI1_RIER & 0x03ff0000) !=0 ); mli_write_byte (MLI1_LWIN0,0x22b, 0x0e); mli_write_byte (MLI1_LWIN0,0x295, 0x80); wait(wait_states); if ( ( (MLI1_RISR & 0x0080) | (~(MLI1_RISR | 0xffffffdf))) !=0) while(1); x = MLI1_LWIN0 + 0x214 ; u = *x; wait_df_neg; wait_df; wait(wait_states); MLI1_SCR= MLI1_SCR | MLI1_SCR_CDV0; mli_write_word (MLI1_LWIN0,0x294, 0x0f02ff00); wait(wait_states); if ((MLI1_RDATAR & 0x00000180) != 0 ) while(1); v =tcr_val + 0x80; mli_write_byte (MLI1_LWIN0,0x211, v); mli_write_byte (MLI1_LWIN0,0x297, 0x0e); mli_write_byte (MLI1_LWIN0,0x22b, 0x07); mli_write_byte (MLI1_LWIN0,0x295, 0x80); wait(wait_states); if ( (MLI1_RISR & 0x0080) == 0) while(1); mli_write_byte (MLI1_LWIN0,0x211, tcr_val); mli_read_word (MLI1_LWIN0,0x214); MLI1_SCR= MLI1_SCR | MLI1_SCR_CDV0; li_write_word (MLI1_LWIN0,0x294, 0x0f02ff00); Application Note 73 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation wait(wait_states); if ((MLI1_RDATAR & 0x00000080) == 0 ) while(1); } void mongoose_config_mli_module(void) { ushort volatile x; mli_read_hword (MLI1_LWIN0,0x210); x = (MLI1_RDATAR | 0x0300) & 0x3f1f; mli_write_hword (MLI1_LWIN0,0x210, x) ; } void mongoose_clear_all(void) { mli_write_word (MLI1_LWIN0,0x294, 0x0f02ff00); mli_write_hword (MLI1_LWIN0,0x29a, 0x03ff); mli_write_hword (MLI1_LWIN0,0x2a6, 0x03ff); } void mongoose_init_adc(void) { mli_write_hword (MLI1_LWIN0,0x1012, 0x9043); mli_write_hword (MLI1_LWIN0,0x1010, 0x0004); } void mongoose_init_dma(void) { mli_write_byte (MLI1_LWIN0,0x41c, mli_write_byte (MLI1_LWIN0,0x830, mli_write_word (MLI1_LWIN0,0x484, mli_write_word (MLI1_LWIN0,0x490, mli_write_word (MLI1_LWIN0,0x494, } 0x01); 0x01); 0x0038a000); 0x1030); Mongoose_SWIN0 + 0x20); void mli_write_byte (uword base_address,uword offset, ubyte value) { ubyte volatile *x; x = base_address + offset ; *x= value; wait_df_neg; wait_df; } void mli_write_hword (uword base_address,uword offset, ushort value) Application Note 74 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation { ushort volatile *x; x = base_address + offset ; *x= value; wait_df_neg; wait_df; } void mli_write_word (uword base_address,uword offset, uword value) { uword volatile *x; x = base_address + offset ; *x= value; wait_df_neg; wait_df; } void mli_read_byte (uword base_address,uword offset) { ubyte volatile *x; ubyte volatile y; x = base_address + offset ; y= *x; wait_df_neg; wait_df; void mli_read_hword (uword base_address,uword offset) { ushort volatile *x; ushort volatile y; x = base_address + offset ; y= *x; wait_df_neg; wait_df; wait_rf; } void mli_read_word (uword base_address,uword offset) { uword volatile *x; uword volatile y; x = base_address + offset ; y= *x; wait_df_neg; wait_df; wait_rf; Application Note 75 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation } ubyte hex2ascii(ubyte x) { ubyte y; y = 0x46; x = x & 0x0f; if (x==0x00) y=0x30; if (x==0x1) y=0x31; if (x==0x2) y=0x32; if (x==0x3) y=0x33; if (x==0x4) y=0x34; if (x==0x5) y=0x35; if (x==0x6) y=0x36; if (x==0x7) y=0x37; if (x==0x8) y=0x38; if (x==0x9) y=0x39; if (x==0xa) y=0x41; if (x==0xb) y=0x42; if (x==0xc) y=0x43; if (x==0xd) y=0x44; if (x==0xe) y=0x45; return y; } //End of file Application Note 76 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4.2.3.5 Main_Local.H At the end of the file // USER CODE BEGIN (MAIN_Header,10) #include "MLI1_Config_Local.h" // USER CODE END 4.2.3.6 Main_Local.C Main function int i; uword volatile x; DMA_MLI1SRC0 = DMA_MLI1SRC0 & 0xffffefff; while ((DMA_MLI1SRC0 & 0x00001000) != 0); GPTA0_SRC22 = GPTA0_SRC22 & 0xffffefff; while ((GPTA0_SRC22 & 0x00001000) != 0); init_uC_mli(); init_mongoose_mli(); config_uC_MLI(); x = uC_pipe0_base +0x08; mli_write_word (MLI1_LWIN0,0x254, x); while( (MLI1_RISR & 0x00000001)==0 ); MLI1_vReceiverModeListen(); DMA_MLI1SRC0 = DMA_MLI1SRC0 | 0x00004000; while ((DMA_MLI1SRC0 & 0x00002000) != 0); DMA_MLI1SRC0 = DMA_MLI1SRC0 |0x00001000; while ((DMA_MLI1SRC0 & 0x00001000) == 0); mongoose_init_adc(); mongoose_init_dma(); GPTA0_SRC22 = Application Note GPTA0_SRC22 | 0x00004000; 77 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation while ((GPTA0_SRC22 & 0x00002000) != 0); GPTA0_SRC22 = GPTA0_SRC22 | 0x00001000; while ((GPTA0_SRC22 & 0x00001000) == 0); while(1); // USER CODE END Application Note 78 V 2.0, 2005-07 AP32090 CIC751 Quick Start Practical Implementation 4.3 Running the application Once the program above has been compiled successfully, the DAS servers can be launched and a debugger session can be started. The program can now be downloaded into the TC1766. Power-up the CIC751 board, and apply a reset pulse (0V) PORST#. Open a terminal window (e.g. MTTY, included in the package containing this application note). Make sure that the communication settings fit with the one programmed for the ASC0 module (baud rate, frame format, etc). When the application is running, the following should be observed: On the terminal window, a one-byte value is periodically written every 1 second. This value is the 8 bit result conversion of the ADC of the CIC751. It corresponds to the output TP1 of the on-board potentiometer. When tuning the potentiometer, the value read on the terminal window varies accordingly. Application Note 79 V 2.0, 2005-07 AP32090 CIC751 Quick Start Ready-to-use files 5 Ready-to-use files The package containing this application note contains the pre-compiled Tasking project. It can directly be used to run the application described in this document. The attached .zip file contains especially the following files: - config_tc1766.dav (DAvE file) options.opt (project option file for Tasking v2.2) Main_Local.h Main_Local.c MLI1.h MLI1.c MLI1_Config_Local.h MLI1_Config_Local.c GPTA0.h GPTA0.c ASC0.h ASC0.c TC1766Regs.h Application Note 80 V 2.0, 2005-07 http://www.infineon.com Published by Infineon Technologies AG