A5366
Photoelectric Smoke Detector
with Interconnect and Timer
Features and Benefits
Description
▪ Low average standby current for long battery life
▪ Interconnect up to 50 detectors
▪ Piezoelectric horn driver
▪ Low battery detection (all internal)
▪ Chamber sensitivity test and alarm
▪ Power-on reset (POR)
▪ Internal timer and control for reduced sensitivity mode
▪ Built-in circuits to reduce false triggering
▪ 6 to 12 V operating range
▪ ESD protection circuitry on all pins
▪ Temporal Horn Pattern, per UL217, NFPA72, and ISO8201
▪ UL Recognized for UL217 or UL268 applications
The A5366 is a low-current BiCMOS circuit providing all of
the required features for a photoelectric type smoke detector.
This device can be used with an infrared photoelectric chamber
to sense scattered light from smoke particles. A networking
capability allows as many as 50 units to be interconnected so that
if any unit senses smoke all units will sound an alarm. Special
features are incorporated in the design to facilitate calibration
and testing of the finished detector. The device is recognized by
Underwriters Laboratories for use in smoke alarms that comply
with Standard UL217, or UL268, per file #S2113.
A variable-gain photoamplifier can be directly interfaced to
an infrared emitter-detector pair. The amplifier gain levels are
determined by two external capacitors and are internally selected
depending on the operating mode. Low gain is selected during
standby and timer modes. During a local alarm, this low gain
is increased (internally) by approximately 10% to reduce false
triggering. High gain is used during pushbutton test and to
periodically monitor the chamber sensitivity during standby.
Packages:
16-pin DIP
(Package A)
The internal oscillator and timing circuitry keep standby power
to a minimum by sensing for smoke for only 100 μs every 10 s.
A special three-stage–speedup sensing scheme is incorporated
to minimize the time to an audible alarm and also to reduce
false triggering. Chamber sensitivity is periodically monitored
and two consecutive cycles of degraded sensitivity are required
for a warning signal (chirp) to occur.
16-pin SOICW
(Package LW)
The A5366 is supplied in a 16-pin dual in-line plastic package
(suffix A), and for surface mount, a 16-pin SOICW (suffix
LW). The lead (Pb) free versions (suffix –T) have 100% mattetin leadframe plating. The devices are rated for continuous
operation over the temperature range of –25°C to 75°C.
Not to scale
Typical Application Diagram
VDD
0.047 μF
Rx1
8.2 kΩ
5 kΩ
A
Rx2
1
2
4.7 kΩ
560 Ω
4700 pF
200 kΩ
9V
C1
C2
3
DETECT
4 STROBE
5
VDD
A5366
TEST 16
Push-to-Test
HUSH
VSS
TIMING RES
1 kΩ
6
Smoke
Chamber
7
22 Ω
100 μF
To / from
other units
26110.11-DS, Rev. G
8
220 Ω
IRED
I/O
HORN1
22 μF
OSC CAP
LED
15
14
Red LED
B
1500 pF
A
10 MΩ
13
100 kΩ
12
330 Ω
220 kΩ C
1000 pF
C
1.5 MΩ C
B Connect HUSH to VSS
to disable timer mode
C Value of component can vary,
based on the piezoelectric horn used
11
10
FEEDBACK
HORN2 9
Connect to allow timer mode
("hush") operation
Piezo Horn
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Selection Guide
Part Number
A5366CA
A5366CA-T
A5366CLWTR-T
Pb-free
–
Yes
Yes
Package
16-pin DIP through hole
16-pin DIP through hole
16-pin SOICW surface mount
Packing
25 pieces / tube
25 pieces / tube
1000 pieces / reel
Absolute Maximum Ratings*
Rating
Units
Supply Voltage Range
Characteristic
Symbol
VDD
Referenced to VSS
–0.5 to 15
V
Input Voltage Range
VIN
Referenced to VSS
–0.3 to VDD+0.3
V
Input Current
IIN
10
mA
Operating Ambient Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Notes
TA
–25 to 75
ºC
TJ(max)
150
ºC
Tstg
–55 to 125
ºC
*CAUTION: BiCMOS devices have input static protection but are susceptible to damage if exposed to extremely high static electrical
charges.
Thermal Characteristics
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
Value
Units
Package A, on 4-layer PCB based on JEDEC standard
38
ºC/W
Package LW, on 4-layer PCB based on JEDEC standard
48
ºC/W
*Additional thermal information available on Allegro website.
Terminal List Table
Number
Name
Pin-out Diagrams
1
C1
Sets photoamplifier gain in supervisory mode
Package A
2
C2
Sets photoamplifier gain in standby mode
3
DETECT
Photoamplifier input
4
STROBE
Strobed supply (VDD – 5 V) for photoamplifier low-side
reference
12 OSC CAP
5
VDD
Positive supply voltage
11 LED
6
IRED
Output to smoke chamber IR LED driver
10 FEEDBACK
7
I/O
8
HORN1
Output for driving piezoelectric horn
9
HORN2
Complementary output for driving piezoelectric horn
10
FEEDBACK
11
LED
C1 1
16 TEST
C2 2
15 HUSH
DETECT 3
14 VSS
STROBE 4
13 TIMING RES
VDD 5
IRED 6
I/O 7
9 HORN2
HORN1 8
Package LW
C1 1
16 TEST
C2 2
Function
Input-output to interconnected detectors
Input for driving piezoelectric horn
Output to drive visible LED
15 HUSH
12
OSC CAP
DETECT 3
14 VSS
13
TIMING RES
STROBE 4
13 TIMING RES
14
VSS
15
HUSH
Input for photoamplifier timer mode reference; can also
disable timer mode
16
TEST
Enables push-to-test mode and diagnostic test/calibration
mode; starts timer mode, if enabled
VDD 5
IRED 6
I/O 7
HORN1 8
12 OSC CAP
11 LED
10 FEEDBACK
9 HORN2
Connection for capacitor to set clock frequency
Connection for resistor to set clock frequency
Negative supply voltage
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Functional Block Diagram
I/O
+Supply
VDD
FEEDBACK
VDD
Band-gap
Reference
9V
HORN2
+
_
HORN1
Low Battery
VDD
LED
Logic
Photoamp
+
_
DETECT
C1
Power-On
Reset
TIMING RES
C2
Oscillator
and Timing
STROBE
VDD
VDD
OSC CAP
VSS
IRED
–Supply
HUSH
TEST
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
DC ELECTRICAL CHARACTERISTICS at TA = –25°C to 75°C1. VSS = 0 V, in typical application (unless otherwise noted)
Characteristic
Supply Voltage Range
Operating Supply Current
Low-Level Input Voltage
High-Level Input Voltage
Input Leakage High
Symbol
Test Conditions
VDD
IDD
Low-Level Output Voltage
High-Level Output Voltage
Strobe Output Voltage
Line Regulation
IIN
VOL
VOH
Max.
Units
6.0
–
12
V
5
12
–
–
9
μA
During STROBE on, IRED off, configured per
typical application
5
12
–
–
2.0
mA
During STROBE on, IRED on, configured per
typical application
5
12
–
–
3.0
mA
VIN = VDD, STROBE active, OSC CAP = VDD
VIN = VDD
VIN = VSS
VIN = VDD
Input Pull-Down Current
Typ.2
–
VIH
IIL
Min.
5
VIN = VST, STROBE active, OSC CAP = VDD
Input Leakage Low
VDD
Average in standby mode, configured per
typical application
VIL
IIH
Test Pin
No local smoke, VIN = VDD
7
9
–
–
1.5
V
10
9
–
–
2.7
V
16
9
–
–
7.0
V
15
9
–
–
0.5
V
7
9
3.2
–
–
V
10
9
6.3
–
–
V
16
9
8.5
–
–
V
15
9
1.6
–
–
V
1, 2
12
–
–
100
nA
3, 10, 12
12
–
–
100
nA
1, 2, 3
12
–
–
–100
nA
10, 12
12
–
–
–100
nA
15, 16
12
–
–
–1.0
μA
16, 15
9
0.25
–
10
μA
7
9
20
–
80
μA
No local smoke, VIN = 17 V
7
12
–
–
140
μA
IO = 10 mA
11
6.5
–
–
0.6
V
IO = 16 mA
8, 9
6.5
–
–
1.0
V
IO = 5 mA
13
6.5
–
0.5
–
V
IO = –16 mA
8, 9
6.5
5.5
–
–
V
–
–
V
Inactive, IO = –1 μA
4
12
VDD
– 0.1
Active, IO = 100 to 500 μA
4
9
VDD
– 5.25
–
VDD
– 4.75
V
Active, VDD = 6 to 12 V
4
–
–
–60
–
dB
VDD = 6 to 12 V
4
–
–
0.01
–
%/°C
Inactive, IO = 1 μA, TA = 25°C
6
12
–
–
0.1
V
Active, IO = –6 mA, TA = 25°C
6
9
2.85
3.1
3.35
V
VST
ΔVST(ΔVDD)
Strobe Temperature
Coefficient
αST
IRED Output Voltage
VIRED
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
DC ELECTRICAL CHARACTERISTICS (continued) at TA = –25°C to 75°C1, VSS = 0 V, in typical application (unless otherwise noted)
Characteristic
Line Regulation
Symbol
ΔVIRED(ΔVDD)
Test Conditions
Active, VDD = 6 to 12 V
Test Pin
VDD
6
Min.
Typ.2
Max.
Units
–
–35
–
dB
VDD = 6 to 12 V
6
–
–
0.40
–
%/°C
High-Level Output Current
IOH
VDD = Alarm, I/O active,VO = VDD – 2 V
7
9
–4.0
–
–
mA
OFF Leakage Current High
IOZ
VO = VDD
11, 13
12
–
–
1.0
μA
OFF Leakage Current Low
IOZ
VO = VSS
11, 13
12
–
–
–1.0
μA
5
–
6.9
7.2
7.5
V
IRED Temperature Coefficient
Low-Battery Alarm Threshold
Common Mode Voltage
Smoke Comparator
Reference Voltage
1Limits
αIRED
VDD(th)
VIC
Any alarm condition
1, 2, 3
-
VDD
–4
–
VDD
–2
V
VREF
Any alarm condition
Internal
-
VDD
– 3.7
–
VDD
– 3.3
V
over the operating temperature range are based on characterization data. Characteristics are production tested at 25°C only.
values are at 25°C and are given for circuit design information only.
2Typical
AC ELECTRICAL CHARACTERISTICS at TA = –25°C to 75°C1. VSS = 0 V, in typical application (unless otherwise noted)
Characteristic
Oscillator Period
LED Pulse Period
LED Pulse Width
STROBE Pulse Period
STROBE Pulse Width
Symbol
Test Conditions
tosc
Test Pin
VDD
Min.
Typ.2
Max.
Units
12
9
9.4
10.5
11.5
ms
tled1
No local or remote smoke
11
9
39
–
48
s
tled3
Local smoke
11
9
0.45
0.50
0.55
s
–
s
s
tled4
Remote smoke only
11
9
–
No LED
Pulses
tled6
Pushbutton test, induced alarm
11
9
0.45
0.50
0.55
tled7
Timer mode, no alarm
11
9
9.67
10.75
11.83
s
11
9
9.5
–
11.5
ms
tw(led)
tst1
No local or remote smoke
4
9
9.6
–
11.9
s
tst2
After 1 of 3 valid samples
4
9
1.8
2.0
2.2
s
tst3
After 2 of 3 valid samples and during local
alarm
4
9
0.8
1.0
1.1
s
tst4
Remote smoke only
4
9
7.2
8.0
8.9
s
tst5
Chamber test or low battery test, no local
alarm
4
9
38.9
–
47.1
s
tst6
Pushbutton test, induced alarm
4
9
225
252
278
ms
4
9
9.5
–
11.5
ms
tw(st)
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
AC ELECTRICAL CHARACTERISTICS (continued) at TA = –25°C to 75°C1, VSS = 0 V, in typical application (unless otherwise noted)
Characteristic
IRED Pulse Period
Symbol
Test Conditions
Test Pin
VDD
Min.
Typ.2
Max.
Units
tired1
No local or remote smoke
6
9
9.6
–
11.9
s
tired2
After 1 of 3 valid samples
6
9
1.8
2.0
2.2
s
tired3
After 2 of 3 valid samples and during local
alarm
6
9
0.8
1.0
1.1
s
tired4
Remote smoke only
6
9
7.2
8.0
8.9
s
tired5
Chamber test, no local alarm
6
9
38.9
–
47.1
s
tired6
Pushbutton test, induced alarm
6
9
225
252
278
ms
6
9
94
–
116
μs
IRED Pulse Width
tw(ired)
IRED Rise Time
tr(ired)
10% to 90%
6
–
–
30
μs
IRED Fall Time
tf(ired)
90% to 10%
6
–
–
200
μs
I/O to Active Delay
td(io)
Local alarm
7
9
–
0
–
s
I/O Charge Dump Duration
tdump
End of local alarm or test
7
9
0.9
1.0
1.1
s
Rising Edge on I/O to Alarm
tr(io)
No local alarm
7
9
–
–
13 ×
tOSC
s
Horn Warning Pulse Period
thorn
Low battery or degraded chamber sensitivity
8, 9
9
38.9
–
47.1
s
Horn Warning Pulse Width
tw(horn)
Low battery or degraded chamber sensitivity
8, 9
9
9.5
–
11.5
ms
Horn On-Time
ton(horn)
Local or remote alarm
8, 9
9
450
500
550
ms
toff1(horn)
Local or remote alarm (see Timing Diagrams
section)
8, 9
9
450
500
550
ms
toff2(horn)
Local or remote alarm (see Timing Diagrams
section)
8, 9
9
1350
1500
1650
ms
Horn Off-Time
1Limits
over the operating temperature range are based on characterization data. Characteristics are production tested at 25°C only.
values are at 25°C and are given for circuit design information only.
2Typical
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Pin and Circuit Description
(In Typical Application)
C1 Pin
A capacitor connected to this pin determines the gain, Ae, of
the photoamplifier during the push-to-test mode and during the
chamber monitor test. A typical capacitor value for this highgain (supervisory) mode is 0.047 μF, but it should be selected
based on the photochamber background reflections reaching the
detector and the desired level of sensitivity. Ae = 1 + (C1 / 10),
where C1 is in pF. Ae should not exceed 10,000 and thus C1
should not exceed 0.1 μF. Coupling of other signals to the C1,
C2, and DETECT inputs must be minimized.
As an input, the I/O is sampled every fourth clock cycle (nominally 42 ms). When the I/O pin is driven high by another device,
three consecutive samples with I/O high plus one additional
cycle (nominally 10.5 ms) are required to cause an alarm. If the
I/O falls below its threshold at any time during those (nominally) 95 ms, an internal latch is reset and there will not be an
alarm. Thus, depending on when during the (nominally) 42 ms
sample cycle I/O is initially forced high, the I/O must remain
high for a minimum of (nominally) 95 to 137 ms to cause an
alarm. This filtering provides significant immunity to I/O noise.
C2 Pin
A capacitor connected to this pin determines the gain, Ae, of
the photoamplifier during standby. A typical capacitor value for
this low-gain mode is 4700 pF, but it should be selected based
on a specific photochamber and the desired level of sensitivity to smoke. Ae = 1 + (C2 / 10), where C2 is in pF. Ae should not
exceed 10,000 and thus C2 should not exceed 0.1 μF. This gain
increases by a nominal 10% after a local alarm is detected (three
consecutive detections). A resistor must be installed in series
with the C2 capacitor.
The LED is suppressed when an alarm is signaled from an
interconnected unit, and any local alarm condition causes this
pin to be ignored as an input. An internal NMOS device acts as
a charge dump to aid in applications involving large (distributed) capacitance, and is activated at the end of a local or test
alarm. This pin has an on-chip pull-down device and must be
left unconnected if not used. In the application, there should be a
series current-limiting resistor to other smoke alarms.
DETECT Pin
This is the input to the photoamplifier and is connected to the
cathode of the photodiode. The photodiode is operated at zero
bias and should have low dark leakage current and low capacitance. A shunt resistor must be installed in parallel with the
photodiode.
STROBE Pin
This output provides a strobed, regulated voltage of VDD – 5 V.
The minus side of all internal and external photoamplifier circuitry is referenced to this pin.
VDD Pin
This pin is connected to the positive supply potential and can
range from 6 to 12 V with respect to VSS.
IRED Pin
This output provides a pulsed base current for the external NPN
transistor, which drives the IR emitter. Its beta should be greater
than 100. To minimize noise impact, the IRED output is not
active when the horn and visible LED outputs are active.
I/O Pin
A connection at this pin allows multiple smoke detectors to be
interconnected. If any single unit detects smoke, its I/O pin is
driven high, and all connected units will sound their associated
horns.
HORN1, HORN2, FEEDBACK Pins
These three pins are used with a self-resonating piezoelectric
transducer and horn-starting external passive components. The
output HORN1 is connected to the piezo metal support electrode. The complementary output, HORN2, is connected to the
ceramic electrode. The FEEDBACK input is connected to the
feedback electrode. If the FEEDBACK pin is not used, it must
be connected to VSS.
LED Pin
This open-drain NMOS output is used to directly drive a visible
LED. The load for the low-battery test is applied to this output.
If an LED is not used, it should be replaced with an equivalent
resistor (typically 500 to 1000 Ω) such that the battery loading remains about 10 mA. The low-battery test does not occur
coincident with any other test or alarm signal. The LED also
indicates detector status as follows (with component values as in
the typical application, all times nominal):
Condition
Pulse Occurrence
Standby
Every 43 s
Local Smoke
Every 0.5 s
Remote Alarm
No pulses
Test Mode
Every 0.5 s
Timer Mode
Every 10 s
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Worcester, Massachusetts 01615-0036 U.S.A.
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A5366
OSC CAP (Oscillator Capacitor) Pin
A capacitor between this pin and VDD, along with a parallel
resistor, forms part of a two-terminal oscillator and sets the internal clock low time. With component values shown, this nominal
time is 10.4 ms and essentially the oscillator period. The internal
clock low time can be calculated by:
Tlow = 0.693 × ROSCCAP × COSCCAP .
TIMING RES (Timing Resistor) Pin
A resistor between this pin and OSC CAP is part of the twoterminal oscillator and sets the internal clock high time, which is
also the IRED pulse width. With component values shown, this
time is nominally 105 μs. The internal clock high time can be
calculated by:
Thigh = 0.693 × RTIMINGRES × COSCCAP .
VSS Pin
This pin is connected to the negative supply potential (usually
ground).
HUSH Pin
This input pin has an internal pull-down device and serves two
purposes in standby mode. It serves to enable/disable entering
the internal 10-minute (nominal) “hush” timer mode, and also
as the reference for the smoke comparator during timer mode.
When the voltage on this pin is greater than 1.5 V, entering timer
mode is enabled, and a high-to-low transition on the TEST pin
resets and starts timer mode. If use of timer mode is not desired,
this pin can be connected to VSS or left open, and a voltage
of less than 0.5 V on the pin will disable timer mode. During
timer mode, the smoke comparator reference is established by a
resistive divider (Rx1 and Rx2) between the VDD and STROBE
pins and allows the detector to operate with reduced sensitivity
during timer mode. This allows the user to hush alarms caused
by nuisance smoke or steam (such as from cooking). When not
in timer mode, the smoke comparator reference is set internally
to approximately VDD – 3.5 V.
TEST Pin
This pin has an internal pull-down device and is used to manually invoke two test modes and timer mode.
Push-to-Test mode is initiated by a voltage greater than approximately VDD – 0.5 V on this pin (usually the depression of a
normally-open pushbutton switch to VDD). After one oscillator cycle, the amplifier gain is increased by internal selection
of C1 so that background reflections in the smoke chamber can
be used to simulate a smoke condition, and IRED pulses every
252 ms (nominal). After the third IRED pulse (three consecutive simulated smoke conditions), the successful test activates
Photoelectric Smoke Detector
with Interconnect and Timer
the horn drivers and the I/O pin, and the LED blinks once every
0.5 s. If the test fails, the LED will not blink, the horn will not
sound, and the I/O pin will remain low. When the pushbutton is
released, the input returns to VSS due to the internal pull down.
After one oscillator cycle, the amplifier gain returns to normal,
and after three additional IRED pulses (less than one second), the
device exits this mode and returns to standby. This high-to-low
transition on TEST also resets and starts the 10-minute (nominal)
“hush” timer mode, if the mode is enabled via the HUSH pin.
Diagnostic Test/Calibration Mode is available to facilitate
calibration and test of the IC and the assembled detector. It is
initiated by pulling TEST below VSS by continuously drawing
400 μA from the pin for at least one clock cycle on OSC CAP.
The current should not exceed 800 μA and under these conditions, TEST pin voltage will clamp at approximately 250 mV
below VSS. One option is to connect TEST to a –5 V supply
through a 12 kΩ resistor. In this mode, certain device pins are
reconfigured as described in table 1. The IRED pulse rate is
Table 1. Alternate Pin Configuration During Diagnostic
Test/Calibration Mode
Pin Name
Alternate Configuration
I/O
Disabled as an output. A logic high on this pin places the
photoamplifier output on C1 or C2 as determined by the
HUSH pin. The amplifier output appears as pulses.
HUSH
If the I/O pin is high, this pin controls the amplifier gain
capacitor. If this pin is low, normal gain is selected and
the amplifier output is on pin C1. If this pin is high,
supervisory gain is selected and the amplifier output is
on C2.
NOTE: If I/O is low, four rising edges on this pin will
cause the device to exit diagnostic/calibration mode and
enter an Allegro-defined test mode.
FEEDBACK
If the I/O pin is high and the HUSH pin is low (normal
gain), taking this pin to a high logic level increases the
amplifier gain by ≈10% (hysteresis).
OSC CAP
This pin may be driven by an external clock source.
Driving this pin low and high drives the internal clock low
and high. The external RC network may remain intact.
HORN1
This pin is reconfigured as the smoke integrator output.
Three consecutive smoke detections will cause this pin
to go high and three consecutive no-smoke detections
cause this pin to go low.
LED
This pin becomes a low-battery indicator. The open-drain
NMOS output is normally off. If VDD falls below the lowbattery threshold, the output turns on.
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115 Northeast Cutoff
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8
A5366
increased to one pulse every OSC CAP cycle and the STROBE
pin is always active. To exit this mode, the TEST pin should be
floated, or returned to VSS, for at least one OSC CAP cycle.
Alarm Indications
Alarm conditions include: local smoke detection, a remote alarm,
low battery, or degraded chamber sensitivity. These are indicated
by a combination of horn and LED signals, which continue until
the alarm condition is resolved. A local alarm always overrides
a remote alarm, and a local or remote alarm will inhibit warning
signals for low battery or degraded chamber.
During a local or a remote alarm condition, the horn output is a
continuous modulated tone (temporal horn pattern), nominally:
0.5 s on, 0.5 s off, 0.5 s on, 0.5 s off, 0.5 s on, and 1.5 s off. The
visible LED distinguishes a local alarm from a remote alarm.
During a local alarm, the LED blinks every 0.5 s (nominally), but
during a remote alarm, the LED is disabled and does not blink.
Photoelectric Smoke Detector
with Interconnect and Timer
The degraded-chamber test occurs periodically (nominally every
43 s). During this test, the gain of the photoamplifier is switched
to the high (supervisory) level, set by C1. The device expects
that the photodiode will receive enough reflected background
light in the chamber to cause an alarm condition. If a faulty, dirty,
or obstructed chamber prevents this for two consecutive tests,
the device signals degraded chamber with one short (nominally
10 ms) horn chirp every 43 s, essentially halfway between LED
flashes. The condition is resolved when the chamber is either
cleared or cleaned.
The low-battery test also occurs periodically (also nominally
every 43 s, but offset from the degraded-chamber test). During this test, the load of the LED is applied to the battery, and
a resistive divider off VDD is compared to an internal band-gap
reference. If VDD is below the threshold, the device signals low
battery with one short (nominally 10 ms) horn chirp every 43 s,
occurring almost simultaneously with the visible LED flash. The
condition is resolved when the battery is replaced.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Timing Diagrams
(Not to Scale)
Standby Mode
tr(ired)
Test event
OSC CAP Pin
tf(ired)
90%
50%
10%
Internal Clock
tw(ired)
tosc
Photo Sample
tst1, tired1
tled1, tst5
Low-Battery Test
tst5, tired5
Chamber Test
tw(st)
STROBE Pin
IRED Pin
LED off (High-Z)
LED Pin
LED on
tw(led)
Low Battery Condition
(Low battery)
VDD Pin
Low-Battery Test
Failed “test period”
thorn
Horn Enable
tw(horn)
LED Pin
LED on
LED off
(High-Z)
Chirps occur at the end of a failed “test period,” and are nearly coincident with LED flashes
Degraded Chamber Condition
Chamber
Sensitivity
(Degraded chamber)
Chamber Test
thorn
Horn Enable
tw(horn)
LED Pin
LED on
LED off
(High-Z)
Chirps occur after 2 consecutive failed tests, and are offset from LED flashes and from chirps that indicate failure of low-battery tests
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Local Smoke Detection Alarm Condition
1st strobe with smoke
3rd strobe with smoke
3rd strobe without smoke
IRED Pin
tst3, tired3
tst2,t ired2
tst3, tired3
tw(st)
STROBE Pin
tw(led)
tled3
LED Pin
LED on
LED off (High-Z)
toff2(horn)
ton(horn)
toff1(horn)
Horn Enable
tdump
(Output)
I/O Pin
I/O Charge Dump
Remote Alarm Condition
tst4, tired4
tw(st)
STROBE Pin
LED Pin
LED off (High-Z)
ton(horn)
toff2(horn)
toff1(horn)
Horn Enable
tr(io)
(Input)
I/O Pin
Test Alarm Mode
tst6, tired6
tw(st)
STROBE Pin
tw(led)
tled6
LED Pin
LED on
LED off (High-Z)
TEST Pin
ton(horn)
toff2(horn)
toff1(horn)
Horn Enable
tdump
I/O Pin
(Output)
I/O Charge Dump
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
Photoelectric Smoke Detector
with Interconnect and Timer
A5366
Package A, 16-Pin DIP
19.05
+0.64
–0.38
0.25
+0.10
–0.05
16
6.35
A
1
+0.76
–0.25
7.62 BSC
10.92 MAX
2
Branded Face
3.30
+1.65
–0.38
SEATING
PLANE
0.38 MIN
C
5.33 MAX
3.30
+0.51
–0.38
2.54 BSC
0.13 MIN
A Terminal #1 mark area
For Reference Only; not for tooling use (reference MS-001BB)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
+0.25
1.52
–0.38
16X 0.46±0.10
0.25 M C
Package LW, 16-Pin SOIC
10.30 ±0.20
8°
0°
16
0.33
0.20
7.50 ±0.10
0.65
16
1.27
2.25
10.30 ±0.33
9.50
A
1.40 REF
1
2
1.27
0.40
1
2
0.25 BSC
16X
SEATING
PLANE
0.10 C
0.51
0.31
1.27 BSC
2.65 MAX
0.30
0.10
C
SEATING PLANE
GAUGE PLANE
C
PCB Layout Reference View
For Reference Only; not for tooling use (reference MS-013AA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Branding scale and appearance at supplier discretion
C Reference land pattern layout (reference IPC7351
SOIC127P1030X265-16M); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
A5366
Photoelectric Smoke Detector
with Interconnect and Timer
Allegro MicroSystems offers an industry-leading range of ionization
and photoelectric smoke detector ICs. For a current listing, please visit
our website at:
www.allegromicro.com
Copyright ©2009-2013, Allegro MicroSystems, LLC
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13