INTERSIL ISL21032

ISL21032
®
Data Sheet
June 21, 2006
Precision 0.600V Low Voltage FGA™
References
FN6239.1
Features
• Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V
The ISL21032 FGA™ voltage references are very high
precision analog voltage references specifically designed to
meet the rigorous performance requirements of high current,
low voltage VRM and POL modules.
Fabricated in Intersil's proprietary Floating Gate Analog
technology, these references feature guaranteed
performance over the -40°C to +130°C operating
temperature range.
• Initial Accuracy Options @ +25°C ±1.0mV, ±2.5mV, and
±5.0mV
• Absolute Accuracy Options Over Operating Temp Range
±0.5% (±3.0mV), ±0.75% (±4.5mV), and ±1.0% (±6.0mV)
• Supply Voltage Range . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
• Low Quiescent Current . . . . . . . . . . . . . . . . . . . 12µA typ.
• Long Term Stability. . . . . . . . . . . . . . . . 10ppm/√1,000Hrs.
Additional features include guaranteed absolute accuracy as
low as ±0.5% over the operating temperature range of -40°C
to +130°C. Long-term stability is 10ppm/√1,000Hrs.
• Thermal Hysteresis . . . . . . . . . 100ppm @ ∆TA = +170°C
• Source & Sink Current . . . . . . . . . . . . . . . . . . . . . . . . 7mA
The absolute accuracy and thermal performance of the
ISL21032 family are ideal fit for the next generation of high
current, low voltage VRM and POL modules.
• ESD Protection. . . . . . . . . . . . . 5kV (Human Body Model)
Pinout
• Pb-Free Plus Anneal Available (RoHS Compliant)
ISL21032
(3 LD SOT-23
TOP VIEW)
• Standard 3 Ld SOT-23 Packaging
• Extended Temperature Range . . . . . . . . . -40°C to +130°C
Applications
• Low Voltage, High Current VRM & POL Modules
• Accurate Reference for Low Voltage DC/DC Converters
VIN 1
3
GND
VOUT 2
Ordering Information
PART NUMBER
(Note)
PART
MARKING
VOUT OPTION
(V)
GRADE
TEMP. RANGE
(°C)
ISL21032BPH306Z
DEU
0.6
±0.5%@ DTA = 170°C
-40 to 130
3 Ld SOT-23
ISL21032BPH306Z-TK
DEU
0.6
±0.5%@ DTA = 170°C
-40 to 130
3 Ld SOT-23 T&R
ISL21032CPH306Z
DEV
0.6
±0.75%@ DTA = 170°C
-40 to 130
3 Ld SOT-23
ISL21032CPH306Z-TK
DEV
0.6
±0.75%@ DTA = 170°C
-40 to 130
3 Ld SOT-23 T&R
ISL21032DPH306Z
APE
0.6
±1.0%@ DTA = 170°C
-40 to 130
3 Ld SOT-23
ISL21032DPH306Z-TK
APE
0.6
±1.0%@ DTA = 170°C
-40 to 130
3 Ld SOT-23 T&R
PACKAGE (Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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FGA is a trademark of Intersil Corporation. Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL21032
Absolute Maximum Ratings
Thermal Information
Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to + 150°C
Max Voltage VIN to Gnd. . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.5V
Max Voltage VOUT to Gnd*:
ISL21032, VOUT = 0.6V. . . . . . . . . . . . . . . . . . . . . . . -0.5V to +1.6V
Voltage on “DNC” Pins. . . No Connections Permitted to These Pins.
Thermal Resistance
θJA (°C/W)
3 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
400
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature, Soldering* . . . . . . . . . . . . . . . . . . . . . . . . +225°C
*Note: Maximum Duration = 10s
ESD Ratings
MIL-STD 883, Method 3015. . . . . . . . . . . . . . . . . . . . . . . . . . . . .5kV
ESD Rating (Machine Model) . . . . . . . . . . . . . . . . . . . . . . . . . .500V
CAUTION: Absolute Maximum Ratings are limits which may result in impaired reliability and/or permanent damage to the device. These are stress ratings provided for
information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not
implied.
For guaranteed specifications and test conditions, see Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Electrical Specifications (VOUT = 0.600V)
SYMBOL
PARAMETER
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = 25°C
VOA
Operating Conditions: VIN = 3.0V, IOUT = 0mA, COUT = 0.001µF, TA = -40 to +130°C,
unless otherwise specified.
VOUT Accuracy Over Op Temp
Range (-40° < TA < 130°C)
CONDITIONS
MIN
TYP
MAX
0.600
UNITS
V
ISL21032B06
-1.0
+1.0
mV
ISL21032C06
-2.5
+2.5
mV
ISL21032D06
-5.0
+5.0
mV
ISL21032B06
-3.0
+3.0
mV
ISL21032C06
-4.5
+4.5
mV
ISL21032D06
-6.0
+6.0
mV
2.7
5.5
V
12
25
µA
VIN
Input Voltage Range
IIN
Supply Current
∆VOUT/∆VIN
Line Regulation
+2.7V ≤ VIN ≤ +5.5V
50
200
µV/V
∆VOUT/∆IOUT
Load Regulation
Sourcing: 0mA ≤ ISOURCE ≤ 7mA
20
70
µV/mA
Sinking: -7mA ≤ ISINK ≤ 0mA
20
70
µV/mA
∆VOUT/∆t
Long Term Stability (Note 3)
TA = 25°C
10
∆VOUT/∆TA
Thermal Hysteresis (Note 1)
∆TA = 170°C
100
ISC
Short Circuit Current (Note 2)
TA = 25°C, VOUT tied to Gnd
50
VN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
30
ppm/
√1kHrs
ppm
80
mA
µVp-p
NOTES:
1. Thermal Hysteresis is the change in VOUT measured @ TA = 25°C after temperature cycling over a specified range, ∆TA.
VOUT is read initially at TA = 25°C for the device under test. The device is temperature cycled and a second VOUT measurement is taken at
25°C. The difference between the initial VOUT reading and the second VOUT reading is then expressed in ppm. For ∆TA = 170°C, the device
under is cycled from +25°C to +130°C to -40°C to +25°C.
2. Guaranteed by device characterization and/or correlation to other device tests.
3. FGA™ voltage reference long term drift is a logarithmic characteristic. Changes that occur after the first few hundred hours of operation are
significantly smaller with time, asymptotically approaching zero beyond 2000 hours. Because of this decreasing characteristic, long-term drift is
specified in ppm/√1kHr.
2
ISL21032
Typical Performance Curves, ISL21032 Low Voltage Output Reference
VIN = 3.0V, IOUT = 0mA, TA = 25°C Unless Otherwise Specified
20
14
18
13
16
11
12
IIN (µA)
IIN (µA)
14
+25°C
12
UNIT 3
UNIT 2
10
+85°C
10
9
8
UNIT 1
-40°C
8
6
7
4
2
2.5
3.0
3.5
4.0
VIN (V)
4.5
5.0
6
2.5
5.5
FIGURE 1. IIN vs VIN (3 REPRESENTATIVE UNITS)
4.0
VIN (V)
VOUT (V)
UNIT 2
UNIT 3
0.5995
0.5990
UNIT 1
-40
-15
10
35
60
85
110
(NORMAILIZED TO 0.6V AT VIN = 3V)
0.6000
5.0
5.5
0.60006
0.60004
UNIT 3
0.60002
UNIT 2
0.60000
0.59998
UNIT 1
0.59996
0.59994
0.59992
2.5
135
3
3.5
TEMPERATURE (°C)
FIGURE 3. VOUT vs TEMP
4
VIN (V)
4.5
5
FIGURE 4. LINE REGULATION
125
100
75
50
85°C
25°C
100mV/DIV
∆ VO (µV) (NORMALIZED TO VIN = 3.0V)
4.5
0.60008
0.6005
VOUT (V)
3.5
FIGURE 2. IIN vs VIN - 3 TEMPS
0.6010
0.5985
3.0
25
0
-40°C
-25
-50
DVIN = +0.3V
-75
DVIN = -0.3V
-100
-125
2.5
3
3.5
4
VIN
4.5
5
FIGURE 5. LINE REGULATION - 3 TEMPS
3
5.5
1ms/DIV
FIGURE 6. LINE TRANSIENT RESPONSE, CL = 0nF
5.5
ISL21032
Typical Performance Curves, ISL21032 Low Voltage Output Reference
VIN = 3.0V, IOUT = 0mA, TA = 25°C Unless Otherwise Specified (Continued)
0
NO LOAD
-10
1nF LOAD
-20
CL = 500pF
PSRR (dB)
100mV/DIV
-30
DVIN = +0.3V
DVIN = -0.3V
10nF LOAD
-40
-50
100nF LOAD
-60
-70
-80
-90
-100
1
10
100
1ms/DIV
FIGURE 7. LINE TRANSIENT RESPONSE, CL = 1nF
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 8. PSRR vs f vs CL
0.60
0.50
0.40
200mV/DIV
∆ VOUT (mV)
0.30
0.20
0.10
0.00
130°C
-0.10
-0.20
-40°C
-0.30
25°C
IL = +50µA
IL = -50µA
-0.40
-0.50
-6 -5 -4
SINKING
-3
-2 -1 0 1 2 3 4 5 6
OUTPUT CURRENT
SOURCING
100mV/DIV
FIGURE 9. LOAD REGULATION vs TEMP
DVIN = +7mA
DVIN = -7mA
1ms/DIV
FIGURE 11. LOAD TRANSIENT RESPONSE @ IL = 7mA,
CL = 1nF
4
7
20µs/DIV
FIGURE 10. LOAD TRANSIENT RESPONSE @ IL = 50µA,
CL = 1nF
VIN & VOUT (V)
-0.60
-7
3.2
3.0
VIN
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
VOUT, IIN = 10µA
0.8
0.6
0.4
0.2
0.0
0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
TIME (ms)
FIGURE 12. TURN-ON TIME @ TA = 25°C
ISL21032
Typical Performance Curves, ISL21032 Low Voltage Output Reference
VIN = 3.0V, IOUT = 0mA, TA = 25°C Unless Otherwise Specified (Continued)
120
NO LOAD
1nF LOAD
100
10nF LOAD
100nF LOAD
60
5µV/DIV
ZOUT (Ω)
80
40
20
0
1
10
100
1K
10K
FREQUENCY (Hz)
100K
1M
10s/DIV
FIGURE 13. ZOUT vs f vs CL
FIGURE 14. VOUT NOISE
FGA Technology
Noise Performance and Reduction
The ISL21032 series of voltage references use the floating
gate technology to create references with very low drift and
supply current. Essentially the charge stored on a floating
gate cell is set precisely in manufacturing. The reference
voltage output itself is a buffered version of the floating gate
voltage. The resulting reference device has excellent
characteristics which are unique in the industry: very low
temperature drift, high initial accuracy, and almost zero
supply current. Also, the reference voltage itself is not limited
by voltage bandgaps or zener settings, so a wide range of
reference voltages can be programmed (standard voltage
settings are provided, but customer-specific voltages are
available).
The output noise voltage in a 0.1Hz to 10Hz bandwidth is
typically 30µVP-P. The noise measurement is made with a
bandpass filter made of a 1 pole high-pass filter with a corner
frequency at 0.1Hz and a 2-pole low-pass filter with a corner
frequency at 12.6Hz to create a filter with a 9.9Hz
bandwidth. Wideband noise is reduced by adding capacitor
to the output, but the value should be limited to 1nF or less
to insure stability.
The process used for these reference devices is a floating
gate CMOS process, and the amplifier circuitry uses CMOS
transistors for amplifier and output transistor circuitry. While
providing excellent accuracy, there are limitations in output
noise level and load regulation due to the MOS device
characteristics. These limitations are addressed with circuit
techniques discussed in other sections.
Temperature Drift
The limits stated for output accuracy over temperature are
governed by the method of measurement. For the -40°C to
130°C temperature range, measurements are made at 25°C
and the two extremes. This measurement method combined
with the fact that FGA references have a fairly linear
temperature drift characteristic insures that the limits stated
will not be exceeded over the temperature range.
VIN = 5V
R = 200Ω
Board Mounting Considerations
For applications requiring the highest accuracy, board
mounting location should be reviewed. Placing the device in
areas subject to slight twisting can cause degradation of the
accuracy of the reference voltage due to die stresses. It is
normally best to place the device near the edge of a board,
or the shortest side, as the axis of bending is most limited at
that location. Obviously mounting the device on flexprint or
extremely thin PC material will likewise cause loss of
reference accuracy.
2N2905
VIN
ISL21032
VOUT
0.6V/50mA
0.001µF
GND
FIGURE 15. PRECISION LOW NOISE, LOW DRIFT, 0.6V, 50mA
REFERENCE
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Packaging Information
3-Lead, SOT23, Package Code H3
0.007 (0.20)
B 0.0003 (0.08)
0.093 (2.35) BSC
0.046 (1.18) BSC
B
0.055 (1.40)
0.047 (1.20)
CL
4X
0.35 H A-B D
0.35 C A-B D
2X N/2 TIPS
1
0.075 (1.90) BSC
2
12° REF.
TYP.
0.120 (3.04)
0.110 (2.80)
0.034 (0.88)
0.047 (1.02)
0.038 (0.95)
BSC
Parting Line
Seating Plane
0.10 R MIN.
0.20 in
0.10 R MIN.
0.0004 (0.01)
0.0040 (0.10)
SEATING PLANE
0.035 (0.89)
0.044 (1.12)
.024 (0.60)
.016 (0.40)
0–8°C
0.575 REF.
NOTES:
1. All dimensions in inches (in parentheses in millimeters).
2. Package dimensions exclude molding flash.
3. Die and die paddle is facing down towards seating plane.
4. This part is compliant with JEDEC Specification TO-236AB.
5. Dimensioning and tolerances per ASME, Y14.5M-1994.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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