XM C1 30 2 32-bit Microcontroller Series for Industrial Applications Server Fa n Con trol R efer en ce D esi gn AP32294 Application Note About this document This document is designed for the low voltage server fan motor drive application and based on XMC1302. This application is designed to implement sensorless FOC drive to minize the server fan motor vibration effect. Scope and purpose To show how to implement the control with XMC1302 microcontroller to drive BLDC and PMSM server fan motor with Sensorless Field Oriented Control. Intended audience Server Fan motor manufacturers and design engineers who intend to reduce the system cost, improve efficiency, and shorten the application development cycle. Applicable Products XMC1302 BSL308C BC848W IFX20001MB DAVE ™ References The User’s Manual can be downloaded from http://www.infineon.com/XMC. DAVE™ and its resources can be downloaded from http://www.infineon.com/DAVE 1 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Table of Contents Table of Contents Table of Contents.............................................................................................................................................. 2 1 1.1 Introduction ................................................................................................................................... 3 XMC1302 Key Features ........................................................................................................................ 3 2 Reference Design Target Requirements ......................................................................................... 5 3 System Block Diagram ................................................................................................................... 6 4 4.1 Motor Drive Features ...................................................................................................................... 7 Infineon Sensorless FOC algorithm with XMC1302 ............................................................................ 7 5 5.1 5.2 5.3 5.4 5.5 5.6 Hardware Design ............................................................................................................................ 8 Form Factors........................................................................................................................................ 8 Pin Mapping ......................................................................................................................................... 8 Microcontroller Motor Control Ports .................................................................................................. 9 MOSFET Stage ................................................................................................................................... 10 Microcontroller Control Interface ..................................................................................................... 11 Power Supply .................................................................................................................................... 12 6 Software State Machine ............................................................................................................... 13 7 7.1 7.2 7.3 7.4 7.5 Motor Control Test Data ............................................................................................................... 14 Start-up Current Waveform .............................................................................................................. 14 Power Stage Inverter Dead-Time...................................................................................................... 15 Motor Steady-State Current Waveform ............................................................................................ 17 Motor High Speed Current Waveform .............................................................................................. 18 Start-up Lock Detection .................................................................................................................... 19 8 Revision History ........................................................................................................................... 20 Application Note 2 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Introduction 1 Introduction The Infineon ‘Server Fan Reference Design’ is a complete solution for a low-voltage fan motor drive application (a BLDC and PMSM server fan motor), with low noise, minimal motor virbration, and a very low external component count. This application is typically used to supply cooling air to electronic equipments. The compact design is based around the Infineon 32-bit ARM® Cortex ™ XMC1302 microcontroller with readyto-use sensorless Field Oriented Control (FOC) firmware to support fast implemention into exisiting development platforms. The XMC1302 is a low-cost, high-performance microcontroller, and has flexible ADC features, Capture Compare Units (CCU4/8), and a Math Co-processor. The PCB layout has a unique ‘coin concept’. The spacing on the PCB board is ultilized with surface mount components which results in lower BOM costs: Figure 1 Server Fan PCB layout Coin Concept 1.1 XMC1302 Key Features The XMC1302 is a low-cost microcontroller, optimized for motor control applications. Package types TSSOP-16 VQFN-24 TSSOP-28 TSSOP-38 VQFN-40 XMC1302 as a controller for various types of motor Permanent Magnet Synchronous Motors (PMSM) Brushless DC Motors AC Induction Motors (ACIM) Servo Motors Brushed DC Motors Application Note 3 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Introduction Key features High performance 32-bit Cortex-M0 CPU MATH Co-processor (MATH), consists of a CORDIC unit for trigonometric calculation and a division unit On-Chip Memories, 16 kbytes on-chip high-speed SRAM, up to 200 kbytes on-chip Flash program and data memory 12 channels 12-bit ADCs with hardware trigger Built-in Temperature Sensor Capture/Compare Units 4 (CCU4) for use as general purpose timers Capture/Compare Units 8 (CCU8) for motor control PWM generation Watchdog Timer (WDT) for safety sensitive applications Application Note 4 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Reference Design Target Requirements 2 Reference Design Target Requirements The reference design is intended to meet common server fan application specifications: Table 1 Reference Design Requirements Item Requirement Motor Type 3 Phase PMSM motor Motor Pole Pair 2 pp Motor Resistance (per phase) 1.1 ~ 1.2 Ω Motor Inductance (per phase) 293 ~ 302 uH (10 kHz) PCB Layout Diameter 22 mm Operating Voltage 12 V Current Rating 1.00 A Power Rating 12 W Speed 0 to 25000 rpm Fault Detection Lock, reverse polarity Over Current Yes Control Interface POT / PWM input / FG Output Control Algorithm Field Oriented Control Microcontroller XMC1302 TSSOP16/VQFN24 Note: All test waveforms are captured and shown later in this document. Application Note 5 V1.0, 2015-05 Server Fan Control Reference Design AP32294 System Block Diagram 3 System Block Diagram The hardware can be dvided into four parts: Microcontroll (MCU) − The MCU consists of an XMC1302 ARM® Cortex ™ with single-shunt Field Oriented Control (FOC) algorithm. It is used to control high-side and low-side transistors with adjustable dead-time. MOSFET stage Control interface Voltage regulator This reference design uses ADC for current measurement with integrated gain in the XMC1302 microcontroller. A two-wire SWD or single-wire SPD debugging interface is supported. 12VDC MOSFET + Fan Motor Voltage Regulator PWMs 5V XMC1302 TSSOP16 VQFN24 Control Interface PWM Figure 2 ADC UART FG System Block Diagram Application Note 6 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Drive Features 4 Motor Drive Features The major requirements of server fan applications are for low audible noise and high efficiency. To boost the efficiency, design engineers need a means to offset the higher cost of a 3-phase fan motor compared to a single or dual-phase fan motor. Most server fan motors are based on a 3-phase Brushless DC (BLDC) motor and Permanent Magnet Synchronous Motor (PMSM). While BLDC and PMSM motors have always been preferred for performance (efficiency, noise, starting torque), a complex and robust sensorless motor control algorithm is required. 4.1 Infineon Sensorless FOC algorithm with XMC1302 Fast execution with hardware Math co-processor Optimized FOC block, without Inverse Park Transform Optimized Space Vector Modulation (SVM) using internal amplifier for single-shunt current sensing One single CORDIC calculation for Space Vector Modulation (SVM) Smooth and low-power start-up Application Note 7 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Hardware Design 5 Hardware Design This reference design hardware includes single-shunt current measurement. The operating supply voltage of the hardware is 10V to 30V. It supports up to 25 kHz PWM switching frequency. 5.1 Form Factors 22mm Top layer Figure 3 5.2 Figure 4 Bottom layer Diameter 22 mm with 2 layer Circular PCB layout Pin Mapping XMC1302 VQFN Pin assignment Application Note 8 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Hardware Design 5.3 Figure 5 Microcontroller Motor Control Ports XMC1302 Motor Control Ports Highlights XMC1302 ARM® Cortex ™ - M0 32-bit microcontroller for motor control. Control of High-side and Low-side transistors with dead-time. ADC current measurement with adjustable gain. Support debug interface which includes two wire SWD or 1 wire SPD. − The non-isolated debug interface pins are connected directly to the controller. No external crystal or resonator is required. This helps for small size PCB layout. Application Note 9 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Hardware Design 5.4 Figure 6 MOSFET Stage High Side and Low Side MOSFET circuitry Highlights Dual MOSFET switching with enhanced High-side driver circuitry. Direct drive of Low-side MOSFET. Single Shunt current sensing measurement. Application Note 10 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Hardware Design 5.5 Figure 7 Microcontroller Control Interface Interface circuitry with XMC1302 Highlights Speed control with PWM input including 12V level shifter. FG output with open collector circuitry for use in 12V domain. Two independent UART channels (RXD/TXD) with 12V level shifter (optional). Application Note 11 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Hardware Design 5.6 Figure 8 Power Supply Low Dropout Power Supply Highlights IFX20001MBV5 in small package SCT-595. Input voltage range up to 45V. Output voltage 5V, output current 30mA. Protection functions include over-temperature protection, and reverse polarity protection. Wide temperature range -40 ˚C ≤ Tj ≤ 125 ° C. Application Note 12 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Software State Machine 6 Software State Machine The Infineon Server Fan Control Reference Design software provides the following life-cycle states: Brake − When the board is powered on, braking is applied for position alignment. Start-up − The motor will start based on the voltage applied. Ramping − It performs speed adjustment (ramp-up or ramp-down). Transition − Maximum Efficiency Tracking (MET) is applied to increase transition from open loop to closed loop stability. Stop/Trip Protection − If any over-current protection is triggered, the motor will stop or stop-restart the operation. FOC PLL Observer − Closed loop algorithm to estimate the rotor position based on single shunt current feedback measurement. main() Power Up Init while (1) { } IRQ1 in FOC_Functions.c CCU80_0_IRQHandler() Speed Adjustment with PWM or Potentiometer (POT) Ramp-Down IRQ2 in ADC.c VADC0_G1_1_IRQHandler Read ADC Results FOC w/ PLL Observer Stop / or Trip Protection Brake Motor Ramp-Up MET Transition Figure 9 V/f Start-up Software State Machine Application Note 13 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data 7 Motor Control Test Data 7.1 Start-up Current Waveform When the fan motor is at a standstill, it is impossible to sense positional information from motor back-EMF. Infineon server fan reference design provides FOC direct start-up control to achieve better efficiency. FG start after FOC is stable CH 1 (Y): P2.10 (for FG) CH 2 (G): P0.0 (UH) – Inverter phase U high-side control signal CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A) Figure 10 Direct FOC Start-up Application Note 14 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data 7.2 Power Stage Inverter Dead-Time To minimize the unwanted ripple in torque that may affect motor motion smoothness, the XMC1302 Capture Compare Unit (CCU4/8) provides flexible dead-time generation. This is used to generate a blanking time period (high-side and low-side transistor in off-state simultaneously). Both transistors are switched off for a short period of time to prevent the transistors conducting simulatenously and causing a short circuit from DC link voltage to ground. The CCU8 supports assymetric dead-time which is required in this application for efficient switching. Dead-Time 0.5μs CH 1 (Y): P0.0 (UH) – Inverter phase U high-side control signal CH 2 (G): P0.1 (UL) – Inverter phase U low-side control signal CH 3 (B): Gate of inverter high-side switch (PMOSFET), for phase U CH 4 (P): Phase U output of inverter Figure 11 Phase U Rising Edge Output Application Note 15 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data Dead-Time 1.5μs CH 1 (Y): P0.0 (UH) – Inverter phase U high-side control signal CH 2 (G): P0.1 (UL) – Inverter phase U low-side control signal CH 3 (B): Gate of inverter high-side switch (PMOSFET), for phase U CH 4 (P): Phase U output of inverter Figure 12 Phase U Failing Edge Output To minimize the unwanted ripple in torque that may affect motor motion smoothness, XMC1302 Capture Compare Unit (CCU4/8) provides flexible dead-time generation. It is used to generate blanking time period (high-side and low-side transistor in off-state simultaneously). Both transistors are switched off for short period of time to prevent both transistors conducting simulatenously thus causing a short circuit from DC link voltage to ground. The CCU8 supports assymetric dead-time which is required in this application for efficient switching. Application Note 16 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data 7.3 Motor Steady-State Current Waveform CH 1 (Y): P2.10 (for FG) CH 2 (G): P0.0 (UH) – Inverter phase U high-side control signal CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A) Figure 13 At steady state stage (FOC Closed Loop) The Frequency Generator (FG) output is an important feature for server system. It is used as important feedback for the system to monitor the speed behavior of the Server Fan. For example, if the FG output is about 96Hz, 60 𝑥 𝐹𝐺𝑓𝑟𝑒𝑞 60 𝑥 96 𝐻𝑧 𝜔= = 𝑛 2 𝜔 = 2880 Where, ω = Motor Speed (in rpm) 𝑛 = No. of pole pairs Application Note 17 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data 7.4 Motor High Speed Current Waveform CH 1 (Y): Angle γ =arctan(Iβ/Iα) of fan motor phase current I CH 2 (G): Iα CH 3 (B): Iβ (where Iα/Iβ are from single-shunt current reconstruction) CH 4 (P): Current of fan motor Phase U (100mV/A) Figure 14 Motor Phase Current with constant high speed The motor phase current waveform has a harmonic of PWM frequency of 15 kHz. The harmonic distortion is mainly due to the small phase inductance of the fan motor. By increasing the PWM frequency, the harmonic distortion could be reduced. 𝜔= 60 𝑥 𝛾 60 𝑥 769 𝐻𝑧 = 𝑛 2 𝜔 = 23,070 Where, ω = Motor Speed (in rpm) 𝑛 = No. of pole pairs 𝛾 = Angle (in Hz) Application Note 18 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Motor Control Test Data 7.5 Start-up Lock Detection Start Retry to Start Stop until MCU Reset CH 1 (Y): P2.10 (for FG) CH 2 (G): CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A) Figure 15 Phase Current Waveform during Start-up The FG pin outputs a PWM waveform in the normal operation condition. During the start-up lock protection, FG output remains high until the motor restart. The retry process will only be stopped when the microcontroller power is reset. Application Note 19 V1.0, 2015-05 Server Fan Control Reference Design AP32294 Revision History 8 Revision History Current Version is V1.0, 2015-05 Page or Reference Description of change V1.0, 2015-03 Initial Version Application Note 20 V1.0, 2015-05 Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolGaN™, CoolMOS™, CoolSET™, CoolSiC™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, DrBLADE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, ISOFACE™, IsoPACK™, iWafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™, POWERCODE™, PRIMARION™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. 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