INTERSIL ISL8394

ISL8394
®
Data Sheet
March 13, 2006
Features
Low-Voltage, Single and Dual Supply,
Quad SPDT, Analog Switches
• Drop-in Replacement for MAX394
The Intersil ISL8394 device is a precision, quad SPDT analog
switches designed to operate from a single +2V to +12V
supply or from a ±2V to ±6V supply. Targeted applications
include battery powered equipment that benefit from the
devices’ low power consumption (5µW), low leakage currents
(2.5nA max), and fast switching speeds (tON = 50ns,
tOFF = 30ns). A 4Ω maximum RON flatness ensures signal
fidelity, while channel to channel mismatch is guaranteed to
be less than 2Ω.
The ISL8394 is a quad single-pole/double-throw (SPDT)
device and can be used as a quad SPDT, a quad 2:1
multiplexer, a single 4:1 multiplexer, or a dual 2-channel
differential multiplexer.
Table 1 summarizes the performance of this family. For higher
performance, pin compatible versions, see the ISL43240 data
sheet.
TABLE 1. FEATURES AT A GLANCE
Quad SPDT
±5V RON
17Ω
±5V tON/tOFF
50ns/30ns
5V RON
25Ω
5V tON/tOFF
80ns/40ns
3V RON
75Ω
3V tON/tOFF
150ns/75ns
Package
20 Ld SOIC
PART
MARKING
TEMP.
RANGE (°C)
PACKAGE
• ON Resistance (RON) . . . . . . . . . . . 17Ω (Typ) 35Ω (Max)
• RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1Ω
• Low Charge Injection . . . . . . . . . . . . . . . . . . . . . 10pC (Max)
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<5µW
• Low Leakage Current (Max at 85°C) . . . . . . . . . . . . 2.5nA
• Fast Switching Action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns
• Guaranteed Break-Before-Make
• Minimum 2000V ESD Protection per Method 3015.7
• TTL, CMOS Compatible
• Pb-Free Plus Anneal Available (RoHS Compliant)
• Battery Powered, Handheld, and Portable Equipment
- Barcode Scanners
- Laptops, Notebooks, Palmtops
• Communications Systems
- Radios
- Base Stations
- RF “Tee” Switches
• Test Equipment
- Ultrasound
- CAT/PET SCAN
- Electrocardiograph
Ordering Information
PART
NUMBER
• Four Separately Controlled SPDT Switches
Applications
ISL8394
Configuration
FN6038.3
PKG.
DWG. #
ISL8394IB
ISL8394IB
-40 to 85
20 Ld SOIC
M20.3
ISL8394IBZ
(See Note)
ISL8394IBZ
-40 to 85
20 Ld SOIC
(Pb-free)
M20.3
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
• Audio and Video Switching
• General Purpose Circuits
- +3V/+5V DACs and ADCs
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2004, 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL8394
Pinout
Pin Descriptions
(Note 1)
ISL8394 (SOIC)
TOP VIEW
IN1 1
20 IN4
NO1 2
19 NO4
COM1 3
PIN
18 COM4
NC1 4
17 NC4
V- 5
16 V+
FUNCTION
V+
Positive Power Supply Input
V-
Negative Power Supply Input. Connect to GND for
Single Supply Configurations.
GND
Ground Connection
IN
Digital Control Input
GND 6
15 N.C.
COM
NC2 7
14 NC3
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
COM2 8
13 COM3
NO2 9
12 NO3
IN2 10
11 IN3
Analog Switch Common Pin
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
LOGIC
ISL8394
NO SW
ISL8394
NC SW
0
OFF
ON
1
ON
OFF
NOTE:
Logic “0” ≤ 0.8V. Logic “1” ≥ 2.4V.
2
FN6038.3
March 13, 2006
ISL8394
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V
All Other Pins (Note 2) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, IN, NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
20 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Moisture Sensitivity (See Technical Brief TB363)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL8394IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(°C)
(NOTE 5)
MIN
TYP
Full
V-
-
V+
V
25
-
17
35
Ω
Full
-
-
45
Ω
25
-
0.5
2
Ω
Full
-
-
4
Ω
25
-
-
4
Ω
Full
-
-
6
Ω
25
-0.2
-
0.2
nA
Full
-2.5
-
2.5
nA
25
-0.4
-
0.4
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
2.4
-
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
VS = ±5.5V, VIN = 0V or V+
Full
-1
1
µA
VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
25
-
50
130
ns
Full
-
-
175
ns
25
-
30
75
ns
Full
-
-
100
ns
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
VS = ±4.5V, ICOM = 10mA, VNO or VNC = ±3.5V,
(See Figure 5)
ON Resistance, RON
RON Matching Between Channels,
∆RON
VS = ±5V, ICOM = 10mA, VNO or VNC = ±3V
RON Flatness, RFLAT(ON)
VS = ±5V, ICOM = 10mA, VNO or VNC = ±3V, 0V,
(Note 7)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V,
(Note 6)
COM ON Leakage Current,
ICOM(ON)
VS = ±5.5V, VCOM = VNO or VNC = ±4.5V, (Note 6)
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD
VS = ±5.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 3)
25
2
10
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2)
25
-
5
10
pC
NO OFF Capacitance, COFF
f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7)
25
-
12
-
pF
3
FN6038.3
March 13, 2006
ISL8394
Electrical Specifications: ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
NC OFF Capacitance, COFF
f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7)
25
-
12
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7)
25
-
39
-
pF
OFF Isolation
RL = 50Ω, CL = 15pF, f = 1MHz,
VNO or VNC = 1VRMS, (See Figures 4 and 6)
25
-
71
-
dB
25
-
-92
-
dB
Full
±2.0
-
±6
V
25
-1
0.01
1
µA
Full
-1
-
1
µA
25
-1
0.01
1
µA
Full
-1
-
1
µA
Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
VS = ±5.5V, VIN = 0V or V+, Switch On or Off
Positive Supply Current, I+
Negative Supply Current, I-
NOTES:
4. VIN = Input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. Flatness
specifications are guaranteed only with specified voltages.
8. Between any two switches.
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(°C)
MIN
(NOTE 5)
TYP
Full
0
-
V+
V
25
-
25
65
Ω
Full
-
-
75
Ω
25
-
0.5
2
Ω
Full
-
-
4
Ω
25
-
-
6
Ω
Full
-
-
8
Ω
25
-0.2
-
0.2
nA
Full
-2.5
-
2.5
nA
25
-0.4
-
0.4
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
2.4
-
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
V+ = 5.5V, VIN = 0V or V+
Full
-1
-
1
µA
V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
25
-
80
250
ns
Full
-
-
300
ns
PARAMETER
TEST CONDITIONS
MAX
(NOTE 5) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V,
(See Figure 5)
RON Matching Between Channels,
∆RON
V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3V
RON Flatness, RFLAT(ON)
V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V,
(Note 7)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
(Note 6)
COM ON Leakage Current,
ICOM(ON)
V+ = 5.5V, VCOM = VNO or VNC = 4.5V, (Note 6)
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
4
FN6038.3
March 13, 2006
ISL8394
Electrical Specifications: 5V Supply
PARAMETER
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
Turn-OFF Time, tOFF
V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
TEMP
(°C)
MIN
(NOTE 5)
TYP
MAX
(NOTE 5) UNITS
25
-
40
125
ns
Full
-
-
175
ns
Break-Before-Make Time Delay, tD
V+ = 5.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 3)
25
5
20
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2)
25
-
3
5
pC
Full
2
-
12
V
25
-1
0.01
1
µA
Full
-1
-
1
µA
25
-1
0.01
1
µA
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current, I+
V+ = 5.5V, V- = 0V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(°C)
MIN
(NOTE 5)
TYP
Full
0
-
V+
V
25
-
75
185
Ω
Full
-
-
250
Ω
25
-0.2
-
0.2
nA
Full
-2.5
-
2.5
nA
25
-0.4
-
0.4
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
2.4
-
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
V+ = 3.6V, VIN = 0V or V+
Full
-1
-
1
µA
Turn-ON Time, tON
V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
25
-
150
400
ns
Turn-OFF Time, tOFF
V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 1)
25
-
75
150
ns
Break-Before-Make Time Delay, tD
V+ = 3.6V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, (See Figure 3)
25
5
20
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2)
25
-
1
5
pC
Full
2
-
12
V
25
-1
0.01
1
µA
Full
-1
-
1
µA
25
-1
0.01
1
µA
Full
-1
-
1
µA
PARAMETER
TEST CONDITIONS
MAX
(NOTE 5) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.6V, VCOM = 0V, 4.5V, VNO or VNC = 3V, 1V,
(Note 6)
COM ON Leakage Current,
ICOM(ON)
V+ = 3.6V, VCOM = VNO or VNC = 3V, (Note 6)
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current, I+
V+ = 3.6V, V- = 0V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
5
FN6038.3
March 13, 2006
ISL8394
Test Circuits and Waveforms
V+
tr < 20ns
tf < 20ns
3V
LOGIC
INPUT
50%
C
VNC
0V
tON
NC
tON
SWITCH
OUTPUT
SWITCH
INPUTS
VOUT
75%
IN
75%
CL
35pF
RL
300Ω
GND
25%
25%
VNC
VOUT
COM
NO
VNO
VNO
C
C
LOGIC
INPUT
tOFF
tOFF
C
V-
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance.
RL
-----------------------------V OUT = V
(NO or NC) R + R
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
L
( ON )
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
C
∆VOUT
RG
COM
VOUT
NO OR NC
3V
ON
ON
LOGIC
INPUT
OFF
0V
VG
Q = ∆VOUT x CL
C
V-
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 2A. MEASUREMENT POINTS
GND
IN
CL
LOGIC
INPUT
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
3V
LOGIC
INPUT
C
C
0V
VNX
NO
VOUT
COM
NC
SWITCH
OUTPUT
VOUT
CL
35pF
RL
300Ω
80%
IN
0V
tD
LOGIC
INPUT
GND
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
6
FN6038.3
March 13, 2006
ISL8394
Test Circuits and Waveforms (Continued)
V+
V+
C
C
RON = V1/1mA
SIGNAL
GENERATOR
NO OR NC
NO OR NC
VNX
0V OR 2.4V
IN
1mA
COM
ANALYZER
0.8V OR 2.4V
IN
V1
COM
GND
GND
RL
C
C
V-
V-
Repeat test for all switches.
Repeat test for all switches.
FIGURE 5. RON TEST CIRCUIT
FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+
V+
C
SIGNAL
GENERATOR
NO1 OR NC1
50Ω
COM1
NO OR NC
IN1
IN
0V or 2.4V
IN2 0V OR 2.4V
COM2
ANALYZER
NO
CONNECTION
NO2 or NC2
GND
0V OR 2.4V
IMPEDANCE
ANALYZER
COM
GND
RL
C
V-
FIGURE 6. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL8394 quad analog switches offer precise switching
capability from a bipolar ±2V to ±6V or a single 2V to 12V
supply with low on-resistance (17Ω) and high speed
operation (tON = 50ns, tOFF = 30ns). The devices are
especially well suited to portable battery powered equipment
thanks to the low operating supply voltage (2V), low power
consumption (5µW), low leakage currents (2.5nA max). High
frequency applications also benefit from the wide bandwidth,
and the very high off isolation and crosstalk rejection.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V- (see
7
V-
FIGURE 7. CAPACITANCE TEST CIRCUIT
Figure 8). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
FN6038.3
March 13, 2006
ISL8394
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
VOPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL8394 construction is typical of most CMOS analog
switches, in that they have three supply pins: V+, V-, and
GND. V+ and V- drive the internal CMOS switches and set
their analog voltage limits, so there are no connections
between the analog signal path and GND. Unlike switches
with a 13V maximum supply voltage, the ISL8394 15V
maximum supply voltage provides plenty of room for the
10% tolerance of 12V supplies (±6V or 12V single supply),
as well as room for overshoot and noise spikes.
This family of switches performs equally well when operated
with bipolar or single voltage supplies.The minimum
recommended supply voltage is 2V or ±2V. It is important to
note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the
electrical specification tables and Typical Performance
curves for details.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
200MHz (see Figure 15), with a small signal -3dB bandwidth
in excess of 300MHz, and a large signal bandwidth
exceeding 300MHz.
An off switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 16 details the high Off Isolation and Crosstalk
rejection provided by this switch. At 10MHz, off isolation is
about 50dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One
of these diodes conducts if any analog signal exceeds V+
or V-.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or V- and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and GND.
V+ and GND power the internal logic (thus setting the digital
switching point) and level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no
affect on logic thresholds. This switch family is TTL
compatible (0.8V and 2.4V) over a V+ supply range of 2.7V
to 10V. At 12V the VIH level is about 2.5V. This is still below
the TTL guaranteed high output minimum level of 2.8V, but
noise margin is reduced. For best results with a 12V supply,
use a logic family that provides a VOH greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
8
FN6038.3
March 13, 2006
ISL8394
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
25
20
15
60
50
25°C
40
25°C
30
-40°C
RON (Ω)
V- = 0V
85°C
37.5
-40°C
3
4
5
6
7
8
V+ (V)
9
10
11
12
45
V+ = 3.3V
-40°C
V- = 0V
V- = 0V
V+ = 5V
85°C
25°C
25°C
-40°C
0
1
2
3
4
5
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
VS = ±2V
ICOM = 1mA
15
85°C
35
25°C
30
25
10
-40°C
20
35
VS = ±3V
30
5
V+ = 3.3V
85°C
25
25°C
20
Q (pC)
RON (Ω)
85°C
40
VCOM (V)
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
40
50
20
35
30
25
20
15
12.5
V+ = 2.7V
V- = 0V
20
60
30
25°C
25
0
85°C
85°C
62.5
50
ICOM = 1mA
70
-40°C
10
RON (Ω)
80
VCOM = (V+) - 1V
ICOM = 1mA
V- = -5V
-40°C
15
10
25
0
V+ = 5V
20
25°C
VS = ±5V
85°C
VS = ±5V
-5
15
10
-40°C
-10
5
-5
-4
-3
-2
-1
0
1
2
3
4
VCOM (V)
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
9
5
-5
-2.5
0
VCOM (V)
2.5
5
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
FN6038.3
March 13, 2006
ISL8394
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
250
125
150
100
tOFF (ns)
tON (ns)
0
300
V- = 0V
250
85°C
0
3
V- = 0V
40
25°C
20
-40°C
2
0
50
30
100
50
-40°C
85°C
25°C
150
85°C
25
-40°C
200
25°C
50
85°C
50
-40°C
75
25°C
4
5
6
7
8
9
10
11
10
12
-40°C
2
3
4
5
6
V+ (V)
8
9
10
11
GAIN
0
VIN = 5VP-P
VIN = 5VP-P
0
45
90
135
180
RL = 50Ω
10
100
FREQUENCY (MHz)
FIGURE 15. FREQUENCY RESPONSE
600
CROSSTALK (dB)
PHASE
PHASE (DEGREES)
-3
VIN = 0.2VP-P
10
V+ = 3V to 12V or
-20 VS = ±2V to ±5V
RL = 50Ω
-30
VIN = 0.2VP-P
3
12
FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE
-10
VS = ±5V
1
7
V+ (V)
FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
VCOM = (V+) - 1V
V- = -5V
25°C
100
25°C
20
30
-40
40
-50
50
-60
60
ISOLATION
-70
70
-80
80
OFF ISOLATION (dB)
200
VCOM = (V+) - 1V
V- = -5V
-40°C
CROSSTALK
-90
90
-100
100
-110
1k
10k
100k
1M
10M
110
100M 500M
FREQUENCY (Hz)
FIGURE 16. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
VTRANSISTOR COUNT:
ISL8394: 418
PROCESS:
Si Gate CMOS
10
FN6038.3
March 13, 2006
ISL8394
Small Outline Plastic Packages (SOIC)
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
C
0.10(0.004)
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.014
0.019
0.35
0.49
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4961
0.5118
12.60
13.00
3
E
0.2914
0.2992
7.40
7.60
4
e
α
B S
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
α
NOTES:
MILLIMETERS
20
0°
20
8°
0°
7
8°
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
Rev. 2 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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11
FN6038.3
March 13, 2006