P3P816711A Spread Spectrum Peak EMI Reduction Device Description P3P816711A generates a 1x LVCMOS low EMI Spread Spectrum clock of the input. The device accepts an AC or DC coupled external clock input at CLKIN. It reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. It allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass EMI regulations. P3P816711A use the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all-digital method. P3P816711A operates over a VDD range of 3.3 V ± 10% and is available in TSOP−6 package over a temperature range of 0°C to +70°C. P3I816711A operates over a temperature range of −40°C to +85°C. Application The P3P816711A is targeted towards EMI management in consumer electronics applications including Set Top Box. Features • • • • • • • • • 1x Low EMI Spread Spectrum Clock of the Input External Reference Input Clock: 30 MHz Output Clock: 30 MHz ± 0.3%(typ) Low Inherent Cycle-to-Cycle Jitter Supply Voltage: 3.3 V ± 10% LVCMOS Input and Output Available in TSOP−6 (6 Lead TSOT−23) Operating Temperature Range: −40°C to +85°C These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2011 August, 2011 − Rev. 0 1 http://onsemi.com MARKING DIAGRAM TSOP−6 CASE 318G 1 BM1 MG G 1 BM1 = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONFIGURATION 1 ModOUT NC GND P3P 816711A CLKIN VDD NC (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Publication Order Number: P3P816711A/D P3P816711A VDD ModOUT PLL CLKIN/XIN GND Figure 1. Block Diagram Table 1. PIN DESCRIPTION Pin# Pin Name Type 1 NC 2 GND Power 3 CLKIN Input 4 NC Description No Connect Ground to entire chip. External Reference Clock Input. No Connect 5 VDD Power Power Supply to entire chip. 6 ModOUT Output Spread Spectrum Clock Output. Table 2. OPERATING CONDITIONS Symbol VDD TA Parameter Voltage on any pin with respect to VSS Operating Temperature Commercial Industrial Min Max Unit 2.97 3.63 V 0 −40 +70 +85 °C CL Load Capacitance 15 pF CIN Input Capacitance 7 pF Table 3. ABSOLUTE MAXIMUM RATINGS Symbol Parameter VDD, VIN TSTG Rating Unit Voltage on any pin with respect to Ground −0.5 to +4.6 V Storage Temperature −65 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C Static Discharge Voltage (As per JEDEC STD22−A114−B) 2.0 kV TDV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 P3P816711A Table 4. DC ELECTRICAL CHARACTERISTICS Symbol Parameter Min Typ Max Unit 3.3 3.63 V VDD Operating voltage 2.97 VIL Input low voltage 0 0.13xVDD V VIH Input high voltage 0.85xVDD VDD V 0.4 V VOL Output low voltage (ModOUT Output) IOL = 4 mA VOH Output high voltage (ModOUT Output) IOH = −4 mA IDD Dynamic supply current (Unloaded Output) 10 mA ICC Static supply current (CLKIN pulled to GND) 0.5 mA Max Unit 2.4 V Table 5. AC ELECTRICAL CHARACTERISTICS Symbol fIN fOUT Parameter Min Typ Input Clock frequency 30 ModOUT Clock frequency 30 MHz MHz tLH (Notes 1, 2) ModOUT Rise time (Measured from 20% to 80%) 5.0 ns tHL (Notes 1, 2) ModOUT Fall time (Measured from 80% to 20%) 4.5 ns 55 % TDCOUT (Notes 1, 2) Output Clock Duty Cycle (ModOUT) (Measured at 50%) TJC (Note 2) Cycle−to−Cycle Jitter (ModOUT with Spread ON) tON 45 50 ps ±200 PLL Lock Time (Stable power supply, valid input clock to valid clock on ModOUT) 3.0 ms 1. Parameters are specified with 15 pF loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production. VDD C1 C2 0.1 mF 2.2 mF 5 VDD CLKIN 3 P3P816711A 6 ModOUT Clock GND 2 Figure 2. Application Schematic Table 6. ORDERING INFORMATION Part Number P3P816711A−06OR Marking Temperature Package Type Shipping† BM1 0°C to +70°C TSOP−6, Commerical (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 3 P3P816711A PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE U D ÉÉ ÉÉ 6 E1 1 NOTE 5 5 2 H L2 4 GAUGE PLANE E 3 L b C DETAIL Z e 0.05 M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. SEATING PLANE DIM A A1 b c D E E1 e L L2 M c A A1 DETAIL Z MIN 0.90 0.01 0.25 0.10 2.90 2.50 1.30 0.85 0.20 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 2.75 3.00 1.50 1.70 0.95 1.05 0.40 0.60 0.25 BSC 10° − RECOMMENDED SOLDERING FOOTPRINT* 6X 0.60 6X 3.20 0.95 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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