CM1214A 1 and 2-Channel AC Signal ESD Protector Product Description The CM1214A ESD protector is used to protect bipolar signal lines against electrostatic discharge (ESD). The CM1214A allows operation in high−speed environments with signals levels up to ±5 V. www.onsemi.com The CM1214A comes in two versions: • The CM1214A−01SO is a single channel ESD protector and is available in a 3−lead SOT23−3 package. • The CM1214A−02MR is a dual channel ESD protector and is available in an 8−lead MSOP−8 package. The low sub−1 pF loading capacitance makes the CM1214A−01SO ideal for protecting high−speed interfaces including RF switches and amplifiers. The CM1214A−02MR is ideal for dual high−speed signal pairs used in Gigabit Ethernet, ADSL, etc. The CM1214A−02MR can also be used for higher transmit voltage applications by connecting the two channels in series. SOT23−3 SO SUFFIX CASE 318 MSOP−8 MR SUFFIX CASE 846AD BLOCK DIAGRAM CH1 CH2 CM1214A−01SO CH1 CH3 CH2 CH4 CM1214A−02MR Features • Single Channel ESD Protection for an AC Signal Up To ±5 V for • • • • • • • 0.25 W Transmit Power Connects Two Channels in Series for Signals Up To ±10 V (1 W transmit power) ±8 kV ESD Protection Per IEC 61000−4−2 Contact Discharge Sub−1pF Loading Capacitance Minimal Variation with Voltage and Temperature Each I/O Pin Can Withstand Over 1000 ESD Strikes* SOT23−3 and MSOP−8 Packages These Devices are Pb−Free and are RoHS Compliant MARKING DIAGRAMS F1S MG G 1 M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) RF2S XXXXX YYWW Applications • • • • RF Switch and Amplifier Protection RF Modules and RF IC Protection Wireless Handsets and WLAN High−Speed AC Signals for Gbit Ethernet, etc. XXXXX = Last 5 Digits of Lot# YYWW = Date Code ORDERING INFORMATION Device Package Shipping† CM1214A−01SO SOT23 (Pb−Free) 3000/Tape & Reel CM1214A−02MR MSOP (Pb−Free) 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *Standard test condition is IEC61000−4−2 level 4 test circuit with each pin subjected to ±8 kV contact discharge for 1000 pulses. Discharges are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run. The part is then subjected to standard production test to verify that all of the tested parameters are within spec after the 1000 strikes. © Semiconductor Components Industries, LLC, 2015 March, 2015 − Rev. 5 1 Publication Order Number: CM1214A/D CM1214A PACKAGE / PINOUT DIAGRAMS Table 1. PIN DESCRIPTIONS SOT23−3 Package Name 1 CH1 ESD Channel 2 CH2 ESD Channel 3 N.C. No connect Top View Description CH1 1 F1S Pin CH2 2 SOT23−3 MSOP−8 Package Name Description 1 CH1 ESD Channel 2 N.C. No connect 3 N.C. No connect 4 CH3 ESD Channel 5 N.C. No connect 6 CH4 ESD Channel 7 CH2 ESD Channel 8 N.C. No connect Top View CH1 1 N.C.* 2 N.C.* 3 CH3 4 RF2S Pin N.C. 3 8 N.C.* 7 CH2 6 CH4 5 N.C.* MSOP−8 * All N.C. pins must be left floating (i.e., not connected to the PCB). See applications section for more information. SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units DC Voltage between CH pins 7 V Operating Temperature Range −40 to +85 °C Storage Temperature Range −65 to +150 °C Package Power Rating SOT23−3 Package (CM1214A−01SO) MSOP8 Package (CM1214A−02MR) mW 225 400 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Rating Units –40 to +85 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Parameter Conditions Min Typ ±7 Standoff Voltage I = 10 mA ESD Voltage Protection Peak discharge voltage between CH pins a) Contact discharge per IEC 61000−4−2 standard (Notes 2 and 3) ILEAK Channel Leakage Current TA = 25°C, 5.5 V between CH pins ±0.1 RDYN Dynamic Resistance TA = 25°C, IPP = 1 A, tP = 8/20 mS Any I/O pin to Ground (Note 4) 1.36 VST VESD Max Units V kV ±8 www.onsemi.com 2 ±1.0 mA W CM1214A Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Parameter Conditions VCL Channel Clamp Voltage TA = 25°C, IPP = 1 A, tP = 8/20 mS (Note 4) CIN Channel Input Capacitance Voltage between CH pins = 0 V Voltage between CH pins = 5 V Measured at 1 MHz between CH pins Min Typ Max 11.3 Units V pF 0.4 0.35 0.6 0.54 0.9 0.8 1. All parameters specified at TA = −40°C to +85°C unless otherwise noted. 2. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W. 3. From CH pin with other CH pin grounded. 4. No Connect pins are left open for all tests. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. PERFORMANCE INFORMATION Typical Capacitance Characteristics vs. Voltage CM1214A illustrates how the loading capacitance remains mainly flat across the voltage range form 0 V to 5 V, the voltage between CH pins. Figure 1. CM1214A Capacitance vs. Voltage Typical Voltage Current (VI) Characteristics (low current) CM1214A shows how the CM1214A experiences a symmetrical I/V curve, without any snapback or trigger voltage. It gradually starts tu turn on at about 6 V and clamps above 7 V. Figure 2. CM1214A VI Characteristics, Low Current www.onsemi.com 3 CM1214A PERFORMANCE INFORMATION (Cont‘d) Typical Voltage−Current (VI) Characteristics (high current, pulse condition) CM1214A shows how the CM1214A experiences a symmetrical I/V curve, without any snapback or trigger voltage. The curve shows only one polarity. Figure 3. CM1214A VI Characteristics, High Current, Pulse (clamping) Condition Typical Capacitance Characteristics vs. Temperature CM1214A illustrates the loading capacitance for both 0 VDC and 1.65 VDC input across the −40 to 85°C temperature range. Figure 4. CM1214A Capacitance vs. Temperature www.onsemi.com 4 CM1214A PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment) Figure 5. Insertion Loss vs. Frequency (0 V DC Bias) Figure 6. Insertion Loss vs. Frequency (2.5 V DC Bias) www.onsemi.com 5 CM1214A APPLICATION INFORMATION CM1214A−01SO The CM1214A−01SO protects a single bipolar signal line often found in RF circuits. One I/O pin (pin 1 for example) is connected to the signal line for protection, and the other I/O pin is tied to GND. It is important to have a solid ground connection to reduce the clamping voltage. Pin 3 of the 3−lead SOT23 must be left open (and not connected on the PCB). CM1214A−02MR The CM1214A−02MR protects two bipolar lines, such as for Gbit Ethernet. The PCB traces underneath the package connect across to the corresponding pins (Pins 1, 4, 6 and 7). Pins 2, 3, 5 and 8 of the MSOP−8 package must be left open (and not connected on the PCB). Any disturbance on the line above or below the standoff voltage is clamped. RF ANTENNA LNA SIGNAL LINE C L SWITCH ESD PA N.C. ESD GND SOT23−3 Figure 7. Typical Application − RF Switch and Amplifier Protection, CM1214A−01SO in 3−lead SOT23 TX+ CH1 FROM ASIC CH2 TX− RX+ CH3 TO CONNECTOR CH4 RX− CM1214A−02MR CM1214A−02MR Figure 8. Typical Application − Ethernet Protection, CM1214A−02MR in 8−lead MSOP www.onsemi.com 6 CM1214A APPLICATION INFORMATION (Cont’d) IEEE1394 PHY LLC GALV ISO CM1214A−02 CM1214A−02 Keep the ESD devices on the PHY side of the galvanic isolation and inside the VCC domain of the PHY controller Figure 9. Typical Application − IEEE1394 Protection, CM1214A−02MR in 8−lead MSOP www.onsemi.com 7 GND CM1214A PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AP NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D SEE VIEW C 3 HE E DIM A A1 b c D E e L L1 HE q c 1 2 b 0.25 e q A L A1 L1 VIEW C SOLDERING FOOTPRINT 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 SCALE 10:1 0.8 0.031 www.onsemi.com 8 mm Ǔ ǒinches MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 −−− 10 ° MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0° INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10° CM1214A PACKAGE DIMENSIONS MSOP 8, 3x3 CASE 846AD−01 ISSUE O SYMBOL MIN NOM MAX A E E1 1.10 A1 0.05 0.10 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 c 0.13 D 2.90 3.00 0.23 3.10 E 4.80 4.90 5.00 E1 2.90 3.00 3.10 0.65 BSC e L 0.40 0.60 L1 L2 θ 0.80 0.95 REF 0.25 BSC 0º 6º TOP VIEW DETAIL A D END VIEW A A2 A1 c e b q SIDE VIEW L2 Notes: (1) All dimensions are in millimeters. Angles in degrees. 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