NCP1653 D

NCP1653, NCP1653A
Compact, Fixed-Frequency,
Continuous Conduction
Mode PFC Controller
The NCP1653 is a controller designed for Continuous Conduction
Mode (CCM) Power Factor Correction (PFC) boost circuits. It
operates in the follower boost or constant output voltage in 67 or 100
kHz fixed switching frequency. Follower boost offers the benefits of
reduction of output voltage and hence reduction in the size and cost
of the inductor and power switch. Housed in a DIP−8 or SO−8
package, the circuit minimizes the number of external components
and drastically simplifies the CCM PFC implementation. It also
integrates high safety protection features. The NCP1653 is a driver
for robust and compact PFC stages.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
IEC1000−3−2 Compliant
Continuous Conduction Mode
Average Current−Mode or Peak Current−Mode Operation
Constant Output Voltage or Follower Boost Operation
Very Few External Components
Fixed Switching Frequency: 67 kHz = NCP1653A,
Fixed Switching Frequency: 100 kHz = NCP1653
Soft−Start Capability
VCC Undervoltage Lockout with Hysteresis (8.7 / 13.25 V)
Overvoltage Protection (107% of Nominal Output Level)
Undervoltage Protection or Shutdown (8% of Nominal Output Level)
Programmable Overcurrent Protection
Programmable Overpower Limitation
Thermal Shutdown with Hysteresis (120 / 150_C)
This is a Pb−Free Device
Typical Applications
•
•
•
•
MARKING DIAGRAMS
8
8
NCP1653
AWL
YYWWG
8
1
PDIP−8
P SUFFIX
CASE 626
1
8
8
1
SO−8
D SUFFIX
CASE 751
NCP1653A
AWL
YYWWG
1
8
N1653
ALYW
G
1
1653A
ALYW
G
1
A suffix
A
WL, L
YY, Y
WW, W
G or G
= 67 kHz option
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
FB 1
8 VCC
Vcontrol 2
7 Drv
In 3
TV & Monitors
PC Desktop SMPS
AC Adapters SMPS
White Goods
AC
Input
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6 GND
CS 4
5 VM
(Top View)
ORDERING INFORMATION
EMI
Filter
Output
See detailed ordering and shipping information on page 19 of
this data sheet.
15 V
FB
VCC
Vcontrol Drv
In
Gnd
CS
VM
NCP1653
Figure 1. Typical Application Circuit
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 10
1
Publication Order Number:
NCP1653/D
NCP1653, NCP1653A
Iin
EMI
Filter
AC
Input
L
Vin
Output Voltage (Vout)
IL
Cbulk
Cfilter
RCS
RFB
on
IL
off
IFB
Vcontrol
1
FB / SD
Vreg
Current
Mirror
2
300 k
9V
96% I ref
13.25 V
/ 8.7 V
VCC
VCC
Overvoltage
Protection
(IFB > 107% Iref)
UVLO
+
18 V
Vcontrol
R1
R1 = constant
Shutdown / UVP
(IFB < 8% Iref)
4% Iref Hysteresis
&
Current
Mirror
Overpower
Limitation
(IS Ivac > 3 nA2)
Reference Block
Turn on
VM
VM =
5
Thermal
Shutdown
(120 / 150 °C)
Vref
+
Cramp
Gnd
6
0
1
−
12 k
In
3
RMISIvac
2 Icontrol
PFC
Modulation
OR
Vramp
R
S
67 or 100 kHz clock
Figure 2. Functional Block Diagram
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2
Cvac
CS
Current
Mirror
VCC
+
Ivac
x
Overcurrent
Protection
(IS > 200 mA)
RM
Ich
Rvac
9V
Internal Bias
9V
CM
Ccontrol
0
Icontrol =
VCC
IM
9V
1
1
Regulation Block
−
8
I ref I FB
0
4
IS
RS
9V
Drv
7
Q
Output
Driver
NCP1653, NCP1653A
PIN FUNCTION DESCRIPTION
Pin
Symbol
Name
Function
1
FB / SD
Feedback /
Shutdown
This pin receives a feedback current IFB which is proportional to the PFC circuit output voltage.
The current is for output regulation, output overvoltage protection (OVP), and output undervoltage
protection (UVP).
When IFB goes above 107% Iref, OVP is activated and the Drive Output is disabled.
When IFB goes below 8% Iref, the device enters a low−consumption shutdown mode.
2
Vcontrol
Control Voltage /
Soft−Start
The voltage of this pin Vcontrol directly controls the input impedance and hence the power factor of
the circuit. This pin is connected to an external capacitor Ccontrol to limit the Vcontrol bandwidth
typically below 20 Hz to achieve near unity power factor.
The device provides no output when Vcontrol = 0 V. Hence, Ccontrol also works as a soft−start
capacitor.
3
In
Input Voltage
Sense
This pin sinks an input−voltage current Ivac which is proportional to the RMS input voltage Vac.
The current Ivac is for overpower limitation (OPL) and PFC duty cycle modulation. When the
product (IS⋅Ivac) goes above 3 nA2, OPL is activated and the Drive Output duty ratio is reduced by
pulling down Vcontrol indirectly to reduce the input power.
4
CS
Input Current
Sense
This pin sources a current IS which is proportional to the inductor current IL. The sense current IS
is for overcurrent protection (OCP), overpower limitation (OPL) and PFC duty cycle modulation.
When IS goes above 200 mA, OCP is activated and the Drive Output is disabled.
5
VM
Multiplier
Voltage
This pin provides a voltage VM for the PFC duty cycle modulation. The input impedance of the
PFC circuit is proportional to the resistor RM externally connected to this pin. The device operates
in average current−mode if an external capacitor CM is connected to the pin. Otherwise, it
operates in peak current−mode.
6
GND
The IC Ground
7
Drv
Drive Output
8
VCC
Supply Voltage
−
This pin provides an output to an external MOSFET.
This pin is the positive supply of the device. The operating range is between 8.75 V and 18 V with
UVLO start threshold 13.25 V.
MAXIMUM RATINGS
Symbol
Value
Unit
FB, Vcontrol, In, CS, VM Pins (Pins 1−5)
Maximum Voltage Range
Maximum Current
Rating
Vmax
Imax
−0.3 to +9
100
V
mA
Drive Output (Pin 7)
Maximum Voltage Range
Maximum Current Range (Note 3)
Vmax
Imax
−0.3 to +18
1.5
V
A
Power Supply Voltage (Pin 8)
Maximum Voltage Range
Maximum Current
Vmax
Imax
−0.3 to +18
100
V
mA
25
V
PD
RqJA
800
100
mW
°C/W
PD
RqJA
450
178
mW
°C/W
Operating Junction Temperature Range
TJ
−40 to +125
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Transient Power Supply Voltage, Duration < 10 ms, IVCC < 20 mA
Power Dissipation and Thermal Characteristics
P suffix, Plastic Package, Case 626
Maximum Power Dissipation @ TA = 70°C
Thermal Resistance Junction−to−Air
D suffix, Plastic Package, Case 751
Maximum Power Dissipation @ TA = 70°C
Thermal Resistance Junction−to−Air
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1−8: Human Body Model 2000 V per JEDEC Standard JESD22, Method A114.
Machine Model Method 190 V per JEDEC Standard JES222, Method A115A.
2. This device contains Latchup protection and exceeds ±100 mA per JEDEC Standard JESD78.
3. Guaranteed by design.
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NCP1653, NCP1653A
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C. For min/max values, TJ = −40°C to +125°C, VCC = 15 V,
IFB = 100 mA, Ivac = 30 mA, IS = 0 mA, unless otherwise specified)
Characteristics
Pin
Symbol
Min
Typ
Max
Unit
7
fSW
90
60.3
102
67
110
73.7
kHz
7
Dmax
94
−
−
%
ROH
ROL
5.0
2.0
9.0
6.6
20
18
W
W
OSCILLATOR
Switching Frequency
NCP1653
NCP1653A
Maximum Duty Cycle (VM = 0 V) (Note 3)
GATE DRIVE
Gate Drive Resistor
Output High and Draw 100 mA out of Drv pin (Isource = 100 mA)
Output Low and Insert 100 mA into Drv pin (Isink = 100 mA)
7
Gate Drive Rise Time from 1.5 V to 13.5 V (Drv = 2.2 nF to Gnd)
7
tr
−
88
−
ns
Gate Drive Fall Time from 13.5 V to 1.5 V (Drv = 2.2 nF to Gnd)
7
tf
−
61.5
−
ns
FEEDBACK / OVERVOLTAGE PROTECTION / UNDERVOLTAGE PROTECTION
Reference Current (VM = 3 V)
1
Iref
192
204
208
mA
Regulation Block Ratio
1
IregL/Iref
95
96
98
%
Vcontrol Pin Internal Resistor
2
Rcontrol
−
300
−
kW
Maximum Control Voltage (IFB = 100 mA)
2
Vcontrol(max)
−
2.4
−
V
Maximum Control Current (Icontrol(max) = Iref / 2)
2
Icontrol(max)
−
100
−
mA
Feedback Pin Voltage (IFB = 100 mA)
Feedback Pin Voltage (IFB = 200 mA)
1
VFB1
1.0
1.3
1.5
1.8
1.9
2.2
V
V
Overvoltage Protection
OVP Ratio
Current Threshold
Propagation Delay
1
IOVP/Iref
IOVP
tOVP
104
−
−
107
214
500
−
230
−
%
mA
ns
Undervoltage Protection (VM = 3 V)
UVP Activate Threshold Ratio
UVP Deactivate Threshold Ratio
UVP Lockout Hysteresis
Propagation Delay
1
IUVP(on)/Iref
IUVP(off)/Iref
IUVP(H)
tUVP
4.0
7.0
4.0
−
8.0
12
8.0
500
15
20
−
−
%
%
mA
ns
CURRENT SENSE
Current Sense Pin Offset Voltage (IS = 100 mA)
4
VS
0
10
30
mV
Overcurrent Protection Threshold (VM = 1 V)
4
IS(OCP)
185
200
215
mA
OVERPOWER LIMITATION
Input Voltage Sense Pin Internal Resistor
4
Rvac(int)
−
12
−
kW
3−4
IS × Ivac
−
3.0
−
nA2
4
IS(OPL1)
IS(OPL2)
80
24
100
32
140
48
mA
mA
PWM Comparator Reference Voltage
5
Vref
2.25
2.62
2.75
V
Multiplier Current (Vcontrol = Vcontrol(max), Ivac = 30 mA, IS = 25 mA)
Multiplier Current (Vcontrol = Vcontrol(max), Ivac = 30 mA, IS = 75 mA)
Multiplier Current (Vcontrol = Vcontrol(max) / 10, Ivac = 30 mA, IS = 25 mA)
Multiplier Current (Vcontrol = Vcontrol(max) / 10, Ivac = 30 mA, IS = 75 mA)
5
IM1
IM2
IM3
IM4
1.0
3.2
10
30
2.85
9.5
35
103.5
5.8
18
58
180
mA
mA
mA
mA
Thermal Shutdown Threshold (Note 4)
−
TSD
150
−
−
°C
Thermal Shutdown Hysteresis
−
−
−
30
−
°C
Over Power Limitation Threshold
Sense Current Threshold (Ivac = 30 mA, VM = 3 V)
Sense Current Threshold (Ivac = 100 mA, VM = 3 V)
CURRENT MODULATION
THERMAL SHUTDOWN
4. Guaranteed by design.
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NCP1653, NCP1653A
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C. For min/max values, TJ = −40°C to +125°C, VCC = 15 V,
IFB = 100 mA, Ivac = 30 mA, IS = 0 mA, unless otherwise specified)
Characteristics
Pin
Symbol
Min
Typ
Max
Unit
VCC(on)
VCC(off)
VCC(H)
12.25
8.0
4.0
13.25
8.7
4.55
14.5
9.5
−
V
V
V
Istup
Istup1
Istup2
Istup3
ICC1
ICC2
Istdn
−
−
−
−
−
−
−
18
0.95
21
21
3.7
4.7
33
50
1.5
50
50
5.0
6.0
50
mA
mA
mA
mA
mA
mA
mA
SUPPLY SECTION
Supply Voltage
UVLO Startup Threshold
Minimum Operating Voltage after Startup
UVLO Hysteresis
8
Supply Current:
Startup (VCC = VCC(on) − 0.2 V)
Startup (VCC < 8.0 V, IFB = 200 mA)
Startup (8.0 V < VCC < VCC(on) − 0.2 V, IFB = 200 mA)
Startup (VCC < VCC(on) − 0.2 V, IFB = 0 mA) (Note 5)
Operating (VCC = 15 V, Drv = open, VM = 3 V)
Operating (VCC = 15 V, Drv = 1 nF to Gnd, VM = 1 V)
Shutdown (VCC = 15 V and IFB = 0 A)
8
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Please refer to the “Biasing the Controller” Section in the Functional Description.
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5
NCP1653, NCP1653A
TYPICAL CHARACTERISTICS
100
NCP1653
Dmax, MAXIMUM DUTY CYCLE (%)
fSW, SWITCHING FREQUENCY (kHz)
110
105
100
95
90
85
80
75
NCP1653A
70
65
60
−50
−25
0
25
50
75
100
99
98
97
96
95
94
93
VM = 0 V
92
91
90
−50
125
−25
TJ, JUNCTION TEMPERATURE (°C)
50
75
100
125
Figure 4. Maximum Duty Cycle vs. Temperature
14
205
12
Iref, REFERENCE CURRENT (mA)
ROH & ROL, GATE DRIVE RESISTANCE (W)
25
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. Switching Frequency vs. Temperature
ROH
10
8
ROL
6
4
2
0
−50
0
−25
0
25
50
75
100
125
204
203
202
201
200
199
198
197
196
195
−50
TJ, JUNCTION TEMPERATURE (°C)
−25
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Gate Drive Resistance vs. Temperature
Figure 6. Reference Current vs. Temperature
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NCP1653, NCP1653A
TYPICAL CHARACTERISTICS
100
TJ = 25°C
2.5
REGULATION BLOCK RATIO (%)
Vcontrol, CONTROL VOLTAGE (V)
3
TJ = 125°C
2
TJ = −40°C
1.5
1
0.5
0
100
120
140
160
180
200
220
98
97
96
95
94
93
92
91
90
−50
0
−25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Regulation Block
Figure 8. Regulation Block Ratio vs.
Temperature
125
2.5
FEEDBACK PIN VOLTAGE (V)
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
−50
0
−25
25
50
75
100
2
1.5
IFB = 100 mA
1
0.5
0
−50
125
IFB = 200 mA
−25
Figure 9. Maximum Control Voltage vs.
Temperature
OVERVOLTAGE PROTECTION RATIO (%)
TJ = −40°C
1.5
TJ = 25°C
1
TJ = 125°C
0.5
0
0
50
100
150
200
25
50
75
100
125
Figure 10. Feedback Pin Voltage vs.
Temperature
2.5
2
0
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
FEEDBACK PIN VOLTAGE (V)
25
IFB, FEEDBACK CURRENT (mA)
3.0
MAXIMUM CONTROL VOLTAGE (V)
99
250
120
118
116
114
112
110
108
106
104
102
100
−50
IFB, FEEDBACK PIN CURRENT (mA)
−25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Feedback Pin Voltage vs. Feedback
Current
Figure 12. Overvoltage Protection Ratio
vs. Temperature
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7
125
NCP1653, NCP1653A
16
UNDERVOLTAGE PROTECTION
THRESHOLD RATIO (%)
230
225
220
215
210
205
200
−50
0
−25
25
50
75
100
14
12
8
6
IUVP(on)/Iref
4
2
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Overvoltage Protection Threshold
vs. Temperature
Figure 14. Undervoltage Protection
Thresholds vs. Temperature
210
90
208
80
70
60
50
40
30
TJ = −40 °C
20
TJ = 125 °C
TJ = 25 °C
10
0
100
50
150
200
204
202
200
198
196
194
192
190
−50
250
0
−25
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Current Sense Pin Voltage vs.
Sense Current
Figure 16. Overcurrent Protection Threshold
vs. Temperature
4
7
3.5
Vvac, IN PIN VOLTAGE (V)
Ivac = 100 mA
3
Ivac = 30 mA
2.5
2
1.5
1
0.5
0
−50
125
206
IS, SENSE CURRENT (mA)
OVERPOWER LIMITATION THRESHOLD (nA2)
0
−25
TJ, JUNCTION TEMPERATURE (°C)
100
0
IUVP(off)/Iref
10
0
−50
125
OVERCURRENT PROTECTION
THRESHOLD (mA)
CURRENT SENSE PIN VOLTAGE (mV)
OVERVOLTAGE PROTECTION THRESHOLD (mA)
TYPICAL CHARACTERISTICS
−25
0
25
50
75
100
6
5
4
TJ = 25 °C
3
TJ = 125 °C
2
1
0
125
TJ = −40 °C
TJ, JUNCTION TEMPERATURE (°C)
0
50
100
150
Ivac, INPUT−VOLTAGE CURRENT (mA)
Figure 17. Overpower Limitation Threshold
vs. Temperature
Figure 18. In Pin Voltage vs.
Input−Voltage Current
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200
NCP1653, NCP1653A
3
MAXIMUM CONTROL CURRENT (mA)
200
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
−50
−25
0
25
50
75
100
125
IS = 25 mA
180
160
140
IS = 75 mA
120
100
80
60
40
Ivac = 30 mA
Vcontrol = Vcontrol(max)
IS Ivac
20 Icontrol =
0
−50
2IM
0
−25
derived from the (eq.8)
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. PWM Comparator Reference
Voltage vs. Temperature
Figure 20. Maximum Control Current vs.
Temperature
20
125
SUPPLY VOLTAGE UNDERVOLTAGE
LOCKOUT THRESHOLDS (V)
20
18
16
14
12
IS = 75 mA
10
IS = 25 mA
8
Ivac = 30 mA
Vcontrol = 10 % Vcontrol(max)
6
4
IS Ivac
Icontrol =
2
0
−50
2IM
0
−25
derived from the (eq.8)
25
50
75
100
125
18
16
VCC(on)
14
12
10
8
VCC(off)
6
4
2
0
−50
0
−25
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 21. 10% of Maximum Control Current
vs. Temperature
Figure 22. Supply Voltage Undervoltage
Lockout Thresholds vs. Temperature
80
OPERATING SUPPLY CURRENT (mA)
SUPPLY CURRENT IN STARTUP AND
SHUTDOWN MODE (mA)
10% OF MAXIMUM CONTROL CURRENT (mA)
PWM COMPARATOR REF. VOLTAGE (V)
TYPICAL CHARACTERISTICS
70
60
50
40
Istdn
30
20
Istup
10
0
−50
−25
0
25
50
75
100
125
6
5
ICC2, 1 nF Load
4
ICC1, No Load
3
2
1
0
−50
TJ, JUNCTION TEMPERATURE (°C)
VCC = 15 V
−25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 23. Supply Current in Startup and
Shutdown Mode vs. Temperature
Figure 24. Operating Supply Current vs.
Temperature
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125
125
NCP1653, NCP1653A
FUNCTIONAL DESCRIPTION
Introduction
5. Thermal Shutdown (TSD) is activated and the
Drive Output (Pin 7) is disabled when the
junction temperature exceeds 150_C. The
operation resumes when the junction temperature
falls down by typical 30_C.
The NCP1653 is a Power Factor Correction (PFC) boost
controller designed to operate in fixed−frequency
Continuous Conduction Mode (CCM). It can operate in
either peak current−mode or average current−mode.
Fixed−frequency operation eases the compliance with
EMI standards and the limitation of the possible radiated
noise that may pollute surrounding systems. The CCM
operation reduces the application di/dt and the resulting
interference. The NCP1653 is designed in a compact 8−pin
package which offers the minimum number of external
components. It simplifies the design and reduces the cost.
The output stage of the NCP1653 incorporates ±1.5 A
current capability for direct driving of the MOSFET in
high−power applications.
The NCP1653 is implemented in constant output voltage
or follower boost modes. The follower boost mode permits
one to significantly reduce the size of the PFC circuit
inductor and power MOSFET. With this technique, the
output voltage is not set at a constant level but depends on
the RMS input voltage or load demand. It allows lower
output voltage and hence the inductor and power MOSFET
size or cost are reduced.
Hence, NCP1653 is an ideal candidate in high−power
applications where cost−effectiveness, reliability and high
power factor are the key parameters. The NCP1653
incorporates all the necessary features to build a compact
and rugged PFC stage.
CCM PFC Boost
A CCM PFC boost converter is shown in Figure 25. The
input voltage is a rectified 50 or 60 Hz sinusoidal signal.
The MOSFET is switching at a high frequency (typically
102 kHz in the NCP1653) so that the inductor current IL
basically consists of high and low−frequency components.
Filter capacitor Cfilter is an essential and very small value
capacitor in order to eliminate the high−frequency
component of the inductor current IL. This filter capacitor
cannot be too bulky because it can pollute the power factor
by distorting the rectified sinusoidal input voltage.
Iin
IL
L
Vout
Vin
Cfilter
Cbulk
Figure 25. CCM PFC Boost Converter
PFC Methodology
The NCP1653 uses a proprietary PFC methodology
particularly designed for CCM operation. The PFC
methodology is described in this section.
The NCP1653 provides the following protection features:
1. Overvoltage Protection (OVP) is activated and
the Drive Output (Pin 7) goes low when the
output voltage exceeds 107% of the nominal
regulation level which is a user−defined value.
The circuit automatically resumes operation when
the output voltage becomes lower than the 107%.
2. Undervoltage Protection (UVP) is activated and
the device is shut down when the output voltage
goes below 8% of the nominal regulation level.
The circuit automatically starts operation when
the output voltage goes above 12% of the
nominal regulation level. This feature also
provides output open−loop protection, and an
external shutdown feature.
3. Overpower Limitation (OPL) is activated and the
Drive Output (Pin 7) duty ratio is reduced by
pulling down an internal signal when a computed
input power exceeds a permissible level. OPL is
automatically deactivated when this computed input
power becomes lower than the permissible level.
4. Overcurrent Protection (OCP) is activated and
the Drive Output (Pin 7) goes low when the
inductor current exceeds a user−defined value.
The operation resumes when the inductor current
becomes lower than this value.
IL
Iin
t1
t2
time
T
Figure 26. Inductor Current in CCM
As shown in Figure 26, the inductor current IL in a
switching period T includes a charging phase for duration
t1 and a discharging phase for duration t2. The voltage
conversion ratio is obtained in (eq.1).
t ) t2
Vout
T
+ 1
+
t2
T * t1
Vin
Vin +
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10
T * t1
Vout
T
(eq.1)
NCP1653, NCP1653A
The input filter capacitor Cfilter and the front−ended EMI
filter absorbs the high−frequency component of inductor
current IL. It makes the input current Iin a low−frequency
signal only of the inductor current.
Iin + IL−50
t1 CrampVref
T * t1
VM + Vref *
+ Vref
Cramp
T
T
From (eq.3) and (eq.6), the input impedance Zin is
re−formulated in (eq.7).
(eq.2)
Zin +
The suffix 50 means it is with a 50 or 60 Hz bandwidth
of the original IL.
From (eq.1) and (eq.2), the input impedance Zin is
formulated.
T * t1 Vout
V
Zin + in +
Iin
T IL−50
VM
+
Cramp
0
1
Vref
(eq.3)
PFC Modulation
−
R
+
Vramp
VM Vout
Vref IL−50
(eq.7)
Because Vref and Vout are roughly constant versus time,
the multiplier voltage VM is designed to be proportional to
the IL−50 in order to have a constant Zin for PFC purpose.
It is illustrated in Figure 28.
Power factor is corrected when the input impedance Zin
in (eq.3) is constant or slowly varying in the 50 or 60 Hz
bandwidth.
Ich
(eq.6)
V in
I in
Q
time
IL
time
S
VM
clock
time
Vref
Figure 28. Multiplier Voltage Timing Diagram
It can be seen in the timing diagram in Figure 27 that VM
originally consists of a switching frequency ripple coming
from the inductor current IL. The duty ratio can be
inaccurately generated due to this ripple. This modulation
is the so−called “peak current−mode”. Hence, an external
capacitor CM connected to the multiplier voltage VM pin
(Pin 5) is essential to bypass the high−frequency
component of VM. The modulation becomes the so−called
“average current−mode” with a better accuracy for PFC.
Vramp
VM
VM without
filtering
Clock
Latch Set
Latch Reset
VM
Output
5
IM
Inductor
Current
Figure 27. PFC Duty Modulation and Timing Diagram
CM
The PFC duty modulation and timing diagram is shown
in Figure 27. The MOSFET on time t1 is generated by the
intersection of reference voltage Vref and ramp voltage
Vramp. A relationship in (eq.4) is obtained.
I t
Vramp + VM ) ch 1 + Vref
Cramp
Cramp Vref
T
RM Ivac IS
2Icontrol
PFC Duty
Modulation
RM
Figure 29. External Connection on the Multiplier
Voltage Pin
(eq.4)
The multiplier voltage VM is generated according to
(eq.8).
The charging current Ich is specially designed as in
(eq.5). The multiplier voltage VM is therefore expressed in
terms of t1 in (eq.6).
Ich +
VM =
RM Ivac IS
VM +
2 Icontrol
(eq.8)
Input−voltage current Ivac is proportional to the RMS
input voltage Vac as described in (eq.9). The suffix ac
(eq.5)
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11
NCP1653, NCP1653A
over the bandwidth of 50 or 60 Hz and power factor is
corrected.
Practically, the differential−mode inductance in the
front−ended EMI filter improves the filtering performance
of capacitor Cfilter. Therefore, the multiplier capacitor CM
is generally with a larger value comparing to the filter
capacitor Cfilter.
Input and output power (Pin and Pout) are derived in
(eq.13) when the circuit efficiency η is obtained or
assumed. The variable Vac stands for the RMS input
voltage.
stands for the RMS. Ivac is a constant in the 50 or 60 Hz
bandwidth. Multiplier resistor RM is the external resistor
connected to the multiplier voltage VM pin (Pin 5). It is also
constant. RM directly limits the maximum input power
capability and hence its value affects the NCP1653 to
operate in either “follower boost mode” or “ constant
output voltage mode”.
Ivac +
ǒ
Ǹ2 V * 4 V
ac
V
[ ac
Ǔ
RȀ
Rvac ) 12 kW
vac
(eq.9)
Sense current IS is proportional to the inductor current IL
as described in (eq.10). IL consists of the high−frequency
component (which depends on di/dt or inductor L) and
low−frequency component (which is IL−50).
R
IS + CS IL
RS
2 RS RȀvac Icontrol Vref Vac
V 2
Pin + ac +
Zin
RM RCS Vout
T
(eq.10)
Control current Icontrol is a roughly constant current that
comes from the PFC output voltage Vout that is a slowly
varying signal. The bandwidth of Icontrol can be
additionally limited by inserting an external capacitor
Ccontrol to the control voltage Vcontrol pin (Pin 2) in
Figure 30. It is recommended to limit fcontrol, that is the
bandwidth of Vcontrol (or Icontrol), below 20 Hz typically to
achieve power factor correction purpose. Typical value of
Ccontrol is between 0.1 mF and 0.33 mF.
Pout + hPin + h
I control =
96% I ref I ref IFB
Regulation Block
Vcontrol
(eq.13a)
2 RS RȀvac Icontrol Vref Vac
RM RCS Vout
Icontrol Vac
T
Vout
(eq.13b)
Follower Boost
The NCP1653 operates in follower boost mode when
Icontrol is constant. If Icontrol is constant based on (eq.13), for
a constant load or power demand the output voltage Vout of
the converter is proportional to the RMS input voltage Vac. It
means the output voltage Vout becomes lower when the RMS
input voltage Vac becomes lower. On the other hand, the
output voltage Vout becomes lower when the load or power
demand becomes higher. It is illustrated in Figure 31.
Vreg
300 k
Icontrol Vac
Vout
Vcontrol
R1
2
V out (Traditional boost)
Ccontrol
V out (Follower boost)
Figure 30. Vcontrol Low−Pass Filtering
1
Ccontrol u
2 p 300 kW fcontrol
V in
(eq.11)
From (eq.7)−(eq.10), the input impedance Zin is
re−formulated in (eq.12).
Zin +
Zin +
time
RM RCS Vac Vout IL
2 RS RȀvac Icontrol Vref IL−50
RM RCS Vac Vout
whenIL + IL−50
2 RS RȀvac Icontrol Vref
P out
time
(eq.12)
Figure 31. Follower Boost Characteristics
The multiplier capacitor CM is the one to filter the
high−frequency component of the multiplier voltage VM.
The high−frequency component is basically coming from
the inductor current IL. On the other hand, the filter
capacitor Cfilter similarly removes the high−frequency
component of inductor current IL. If the capacitors CM and
Cfilter match with each other in terms of filtering capability,
IL becomes IL−50. Input impedance Zin is roughly constant
Follower Boost Benefits
The follower boost circuit offers an opportunity to reduce
the output voltage Vout whenever the RMS input voltage
Vac is lower or the power demand Pout is higher. Because
of the step−up characteristics of boost converter, the output
voltage Vout will always be higher than the input voltage
Vin even though Vout is reduced in follower boost operation.
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12
NCP1653, NCP1653A
As a result, the on time t1 is reduced. Reduction of on time
makes the loss of the inductor and power MOSFET smaller.
Hence, it allows cheaper cost in the inductor and power
MOSFET or allows the circuit components to operate at a
lower stress condition in most of the time.
depending on different values of Vac and Pout. The follower
boost operating area is illustrated in Figure 33.
Vout
96% Iref RFB
Pout(min)
1
Output Feedback
The output voltage Vout of the PFC circuit is sensed as a
feedback current IFB flowing into the FB pin (Pin 1) of the
device. Since the FB pin voltage VFB1 is much smaller than
Vout, it is usually neglected.
V
* VFB1
V
IFB + out
[ out
RFB
RFB
Vac(min)
When IFB is between 96% and 100% of Iref (i.e., 96% RFB
× Iref < Vout < RFB × Iref), the NCP1653 operates in constant
output voltage mode which is similar to the follower boost
mode characteristic but with narrow output voltage range.
The regulation block output Vreg decreases linearly with
IFB in the range from 96% of Iref to Iref. It gives a linear
function of Icontrol in (eq.16).
Icontrol +
Vout +
IFB
Figure 32. Regulation Block
Region (1): IFB < 96% × Iref
ǒ
Vac
RM RCS
Pout
0.04
2 RS RȀvac Vref Icontrol(max) h
Vout
Iref RFB
When IFB is less than 96% of Iref (i.e., Vout < 96% RFB
× Iref), the NCP1653 operates in follower boost mode. The
regulation block output Vreg is at its maximum value.
Icontrol becomes its maximum value (i.e., Icontrol =
Icontrol(max) = Iref/2 = 100 mA) which is a constant. (eq.13)
becomes (eq.15).
(eq.16)
Vac
FB Iref
)R
Ǔ
(eq.17)
Pout(min)
1
Pout(max)
2
96% Iref RFB
1. Pout increases, Vout decreases
2. Vac decreases, Vout decreases
V ac(min)
2 RS RȀvac Icontrol(max) Vref Vac
Vac
Pout
Ǔ
According to (eq.17), output voltage Vout becomes RFB
× Iref when power is low (Pout ≈ 0). It is the maximum value
of Vout in this operating region. Hence, it can be concluded
that output voltage increases when power decreases. It is
similar to the follower boost characteristic in (eq.15). On
the other hand in (eq.17), output voltage Vout becomes RFB
× Iref when RMS input voltage Vac is very high. It is the
maximum value of Vout in this operating region. Hence, it
can also be concluded that output voltage increases when
RMS input voltage increases. It is similar to another
follower boost characteristic in (eq.15). This characteristic
is illustrated in Figure 34.
Icontrol(max)
T
ǒ
Icontrol(max)
Vout
1*
0.04
RFB Iref
Resolving (eq.16) and (eq.13),
Icontrol
RM RCS Pout
Vac
Region (2): 96% × Iref < IFB < Iref
Feedback current IFB which represents the output voltage
Vout is processed in a function with a reference current
(Iref = 200 mA typical) as shown in regulation block
function in Figure 32. The output of the voltage regulation
block, low−pass filter on Vcontrol pin and the Icontrol =
Vcontrol / R1 block is in Figure 30 is control current Icontrol.
And the input is feedback current IFB. It means that Icontrol
is the output of IFB and it can be described as in Figure 32.
There are three linear regions including: (1) IFB < 96% ×
Iref, (2) 96% × Iref <IFB < Iref, and (3) IFB > Iref. They are
discussed separately as follows:
Vout + h
Vac(max)
Figure 33. Follower Boost Region
(eq.14)
Output Voltage Regulation
Iref
1. Pout increases, Vout decreases
2. Vac decreases, Vout decreases
V in
where RFB is the feedback resistor across the FB pin
(Pin 1) and the output voltage referring to Figure 2.
Then, the feedback current IFB represents the output
voltage Vout and will be used in the output voltage
regulation, undervoltage protection (UVP), and
overvoltage protection (OVP).
96% Iref
2
Pout(max)
Vac(max)
Vac
Figure 34. Constant Output Voltage Region
(eq.15)
Region (3): IFB > Iref
When IFB is greater than Iref (i.e., Vout > RFB × Iref), the
NCP1653 provides no output or zero duty ratio. The
regulation block output Vreg becomes 0 V. Icontrol also
becomes zero. The multiplier voltage VM in (eq.8)
The output voltage Vout is regulated at a particular level
with a particular value of RMS input voltage Vac and output
power Pout. However, this output level is not constant and
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13
NCP1653, NCP1653A
becomes its maximum value and generates zero on time t1.
Then, Vout decreases and the minimum can be Vout = Vin in
a boost converter. Going down to Vin, Vout automatically
enters the previous two regions (i.e., follower boost region
or constant output voltage region) and hence output voltage
Vout cannot reach input voltage Vin as long as the NCP1653
provides a duty ratio for the operation of the boost
converter.
In conclusion, the NCP1653 circuit operates in one of the
following conditions:
Constant output voltage mode: The output voltage is
regulated around the range between 96% and 100% of RFB
× Iref. The output voltage is described in (eq.16). Its
behavior is similar to a follower boost.
Follower boost mode: The output voltage is regulated
under 96% of RFB × Iref and Icontrol = Icontrol(max) = Iref/2 =
100 mA. The output voltage is described in (eq.15).
to enable the NCP1653 to operate. Hence, UVP happens
when the output voltage is abnormally undervoltage, the
FB pin (Pin 1) is opened, or the FB pin (Pin 1) is manually
pulled low.
Soft−Start
The device provides no output (or no duty ratio) when the
Vcontrol (Pin 2) voltage is zero (i.e., Vcontrol = 0 V). An
external capacitor Ccontrol connected to the Vcontrol pin
provides a gradually increment of the Vcontrol voltage (or
the duty ratio) in the startup and hence provides a soft−start
feature.
Current Sense
The device senses the inductor current IL by the current
sense scheme in Figure 36. The device maintains the
voltage at the CS pin (Pin 4) to be zero voltage (i.e.,
VS ≈ 0 V) so that (eq.10) can be formulated.
Overvoltage Protection (OVP)
IL
When the feedback current IFB is higher than 107% of the
reference current Iref (i.e., Vout > 107% RFB × Iref ), the
Drive Output (Pin 7) of the device goes low for protection.
The circuit automatically resumes operation when the
feedback current becomes lower than 107% of the
reference current Iref.
The maximum OVP threshold is limited to 230 mA which
corresponds to 230 mA × 1.92 MW + 2.5 V = 444.1 V when
RFB = 1.92 MW (680 kW + 680 kW + 560 kW) and
VFB1 = 2.5 V (for the worst case referring to Figure 11).
Hence, it is generally recommended to use 450 V rating
output capacitor to allow some design margin.
RS
IS
RCS
IL
CS
+
NCP1653
VS
−
Gnd
Figure 36. Current Sensing
This scheme has the advantage of the minimum number
of components for current sensing and the inrush current
limitation by the resistor RCS. Hence, the sense current IS
represents the inductor current IL and will be used in the
PFC duty modulation to generate the multiplier voltage
VM, Overpower Limitation (OPL), and overcurrent
protection.
Undervoltage Protection (UVP)
ICC
Overcurrent Protection (OCP)
ICC2
Shutdown
Overcurrent protection is reached when IS is larger than
IS(OCP) (200 mA typical). The offset voltage of the CS pin
is typical 10 mV and it is neglected in the calculation.
Hence, the maximum OCP inductor current threshold
IL(OCP) is obtained in (eq.15).
Operating
Istdn
8% I
ref
12% I ref
I
IL(OCP) +
FB
RSIS(OCP)
R
+ S
RCS
RCS
200 mA
(eq.18)
When overcurrent protection threshold is reached, the
Drive Output (Pin 7) of the device goes low. The device
automatically resumes operation when the inductor current
goes below the threshold.
Figure 35. Undervoltage Protection
When the feedback current IFB is less than 8% of the
reference current Iref (i.e., the output voltage Vout is less
than 8% of its nominal value), the device is shut down and
consumes less than 50 mA. The device automatically starts
operation when the output voltage goes above 12% of the
nominal regulation level. In normal situation of boost
converter configuration, the output voltage Vout is always
greater than the input voltage Vin and the feedback current
IFB is always greater than 8% and 12% of the nominal level
Input Voltage Sense
The device senses the RMS input voltage Vac by the
sensing scheme in Figure 37. The internal current mirror is
with a typical 4 V offset voltage at its input so that the
current Ivac can be derived in (eq.9). An external capacitor
Cvac is to maintain the In pin (Pin 3) voltage in the
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14
NCP1653, NCP1653A
limited. The OPL is automatically deactivated when the
product (IS × Ivac) becomes lower than the 3 nA2 level. This
3 nA2 level corresponds to the approximated input power
(IL × Vac) to be smaller than the particular expression in
(eq.20).
calculation to always be the peak of the sinusoidal voltage
due to very little current consumption (i.e., Vin = √2 Vac and
Ivac ≈ 0). This Ivac current represents the RMS input voltage
Vac and will be used in overpower limitation (OPL) and the
PFC duty modulation.
V in
IS Ivac t 3 nA2
Current
Mirror
Rvac
12 k
In
Ivac
ǒIL @ RRCS
Ǔ
S
Ǔ
Ǹ2
Vac @
t 3 nA2
Rvac ) 12 kW
R Rvac ) 12 kW
IL @ Vac t S
3 nA2
Ǹ2
RCS
4V
3
Cvac
ǒ
Biasing the Controller
9V
It is recommended to add a typical 1 nF to 100 nF
decoupling capacitor next to the VCC pin for proper operation.
When the NCP1653 operates in follower boost mode, the PFC
output voltage is not always regulated at a particular level
under all application range of input voltage and load power.
It is not recommended to make a low−voltage bias supply
voltage by adding an auxiliary winding on the PFC boost
inductor. Alternatively, it is recommended to get the VCC
biasing supply from the second−stage power conversion stage
as shown in Figure 39.
Figure 37. Input Voltage Sensing
There is an internal 9 V ESD Zener Diode on the pin.
Hence, the value of Rvac is recommended to be at least
938 kW for possibly up to 400 V instantaneous input voltage.
12 kW
Rvac
u
9 V*4 V
400 V * 9 V
(eq.19)
Rvac u 938 kW
Vbulk
Overpower Limitation (OPL)
Sense current IS represents the inductor current IL and
hence represents the input current approximately.
Input−voltage current Ivac represents the RMS input
voltage Vac and hence represents the input voltage. Their
product (IS × Ivac) represents an approximated input power
(IL × Vac).
AC
EMI
Input Filter
Vcc
V reg
300 k
96% I ref
I ref I FB
0
(eq.20)
NCP1653
2
Output
Voltage
Second−stage
Power Converter
Vcontrol
1
Figure 39. Recommended Biasing Scheme in
Follower Boost Mode
Regulation Block
When the NCP1653 operates in constant output voltage
mode, it is possible to make a low−voltage bias supply by
adding an auxiliary winding on the PFC boost inductor in
Figure 40. In PFC boost circuit, the input is the rectified AC
voltage and it is non−constant versus time that makes the
auxiliary winding voltage also non−constant. Hence, the
configuration in Figure 40 charges the voltages in
capacitors C1 and C2 to n×(Vout − Vin) and n×Vin and n is
the turn ratio. As a result, the stack of the voltages is n×Vout
that is constant and can be used as a biasing voltage.
Overpower
Limitation
Figure 38. Overpower Limitation Reduces Vcontrol
When the product (IS × Ivac) is greater than a permissible
level 3 nA2, the output Vreg of the regulation block is pulled
to 0 V. It makes Vcontrol to be 0 V indirectly and VM is
pulled to be its maximum. It generates the minimum duty
ratio or no duty ratio eventually so that the input power is
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15
NCP1653, NCP1653A
Vout
Vin
C2
VCC Undervoltage Lockout (UVLO)
The device typically starts to operate when the supply
voltage VCC exceeds 13.25 V. It turns off when the supply
voltage VCC goes below 8.7 V. An 18 V internal ESD Zener
Diode is connected to the VCC pin (Pin 8) to prevent
excessive supply voltage. After startup, the operating range
is between 8.7 V and 18 V.
C1
Thermal Shutdown
VCC
An internal thermal circuitry disables the circuit gate
drive and then keeps the power switch off when the junction
temperature exceeds 150_C. The output stage is then
enabled once the temperature drops below typically 120_C
(i.e., 30_C hysteresis). The thermal shutdown is provided
to prevent possible device failures that could result from an
accidental overheating.
Figure 40. Self−biasing Scheme in Constant Output
Voltage Mode
When the NCP1653 circuit is required to be startup
independently from the second−stage converter, it is
recommended to use a circuit in Figure 41. When there is
no feedback current (IFB = 0 mA) applied to FB pin (Pin 1),
the NCP1653 VCC startup current is as low (50 mA
maximum). It is good for saving the current to charge the
VCC capacitor. However, when there is some feedback
current the startup current rises to as high as 1.5 mA in the
VCC < 4 V region. That is why the circuit of Figure 41 can
be implemented: a PNP bipolar transistor derives the
feedback current to ground at low VCC levels (VCC < 4 V)
so that the startup current keeps low and an initial voltage
can be quickly built up in the VCC capacitor. The values in
Figure 41 are just for reference.
Input
Output Drive
The output stage of the device is designed for direct drive
of power MOSFET. It is capable of up to ±1.5 A peak drive
current and has a typical rise and fall time of 88 and
61.5 ns with a 2.2 nF load.
Output
180k
180k
180k
1.5M
100uF
NCP1653
560k
BC556
Figure 41. Recommended Startup Biasing Scheme
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16
NCP1653, NCP1653A
Application Schematic
680 k
Fuse
Input
90 Vac
to
265 Vac
KBU6K
150 mH
600 mH
560 k
CSD04060
100 nF
680 nF
1 mF
680 k
100 mF
450 V
Output
390 V
4.7 M
SPP20N60S
33 nF
2 x 3.9 mH
470 k
0.1
NCP1653
2.85 k
330 nF
15 V
4.5
1 nF
1 nF
56 k
330 pF
10 k
Figure 42. 300 W 100 kHz Power Factor Correction Circuit
Table 1. Total Harmonic Distortion and Efficiency
Input Voltage
(V)
Input Power
(W)
Output Voltage
(V)
Output Current
(A)
Power Factor
Total Harmonic
Distortion (%)
Efficiency
(%)
110
331.3
370.0
0.83
0.998
4
93
110
296.7
373.4
0.74
0.998
4
93
110
157.3
381.8
0.38
0.995
7
92
110
109.8
383.5
0.26
0.993
9
91
110
80.7
384.4
0.19
0.990
10
91
110
67.4
385.0
0.16
0.988
10
91
220
311.4
385.4
0.77
0.989
9
95
220
215.7
386.2
0.53
0.985
8
95
220
157.3
386.4
0.38
0.978
9
93
220
110.0
386.7
0.27
0.960
11
95
220
80.2
386.5
0.19
0.933
14
92
220
66.9
386.6
0.16
0.920
15
92
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17
NCP1653, NCP1653A
APPENDIX I – SUMMARY OF EQUATIONS IN NCP1653 BOOST PFC
Description
Boost Converter
Follower Boost Mode
Constant Output Voltage Mode
Same as Follower Boost Mode
t ) t2
Vout
T
+ 1
+
t2
T * t1
Vin
³ Vout * Vin + t
t1
t
+ 1
1 ) t2
T
Vout
Input Current Averaged by
Filter Capacitor
Iin + IL * 50
Same as Follower Boost Mode
Nominal Output Voltage (IFB
= 200 mA)
Vout(nom) + IFBRFB ) VFB1
[ IFBRFB + 200 mA @ RFB
Same as Follower Boost Mode
Feedback Pin Voltage VFB1
Please refer to Figure 11.
Same as Follower Boost Mode
Output Voltage
Vin t Vout t 192 mA @ RFB
192 mA @ RFB t Vout t 200 mA @ RFB
Inductor Current
Peak−Peak Ripple
DIL(pk * pk) t 2 @ IL * 50
Same as Follower Boost Mode
Control Current
I
Icontrol + Icontrol(max) + ref + 100 mA
2
Icontrol +
ǒ
Ǔ
Icontrol(max)
Vout
1*
0.04
RFBIref
and Icontrol t Icontrol(max) + 100 mA
Switching Frequency
f + 67 or 100 kHz
Same as Follower Boost Mode
Minimum Inductor for CCM
V
* Vin
Vin
1
L u L(CRM) + out
Vout
DIL(pk * pk) f
Same as Follower Boost Mode
Input Impedance
R R V V
Zin + M CS ac out
RSRȀvacIrefVref
Input Power
Output Power
Maximum Input Power when
Icontrol = 100 mA
Current Limit
Power Limit
Pin +
Zin +
RS RȀvac Iref Vref Vac
Vout
RM RCS
Pout + hPin +
Pin +
hRS RȀvac Iref Vref Vac
Vout
RM RCS
Pin(max) + Pin +
RS RȀvac Iref Vref Vac
Vout
RM RCS
RM RCS Vac Vout
2RS RȀvac Icontrol Vref
2RSRȀvacVref IcontrolVac
RMRCS
Vout
Pout +
h2 RS RȀvac Vref Icontrol Vac
RM RCS
Circuit will enter follower boost region when
maximum power is reached.
IL(OCP) +
RS
@ 200 mA
RCS
Same as Follower Boost Mode
IL @ VAC t
RS Rvac ) 12 kW
@ 3 nA2
Ǹ2
RCS
Same as Follower Boost Mode
Output Overvoltage
Vout(OVP) + 107% @ Vout(nom)
[ 214 mA @ RFB
Same as Follower Boost Mode
Output Undervoltage
Vout(UVP * on) + 8% @ Vout(nom)
[ 16 mA @ RFB
Vout(UVP * off) + 12% @ Vout(nom)
[ 24 mA @ RFB
Same as Follower Boost Mode
Input Voltage Sense Pin
Resistor Rvac
PWM Comparator
Reference Voltage
Rvac u 938 kW and RȀvac +
Rvac ) 12 kW
Ǹ2
Same as Follower Boost Mode
Same as Follower Boost Mode
Vref + 2.62 V
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18
Vout
NCP1653, NCP1653A
ORDERING INFORMATION
Package
Shipping†
Switching Frequency
NCP1653PG
PDIP−8
(Pb−Free)
50 Units / Rail
100 kHz
NCP1653DR2G
SO−8
(Pb−Free)
2500 Units / Tape & Reel
NCP1653APG
PDIP−8
(Pb−Free)
50 Units / Rail
NCP1653ADR2G
SO−8
(Pb−Free)
2500 Units / Tape & Reel
Device
67 kHz
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
19
NCP1653, NCP1653A
PACKAGE DIMENSIONS
PDIP−8
P SUFFIX
CASE 626−05
ISSUE N
D
A
E
H
8
5
E1
1
4
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
e
8X
SIDE VIEW
b
0.010
M
eB
END VIEW
M
C A
M
B
M
NOTE 6
www.onsemi.com
20
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT
TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION E3 IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
NCP1653, NCP1653A
PACKAGE DIMENSIONS
SO−8
D SUFFIX
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0 _
8 _
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent− Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product
or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in
SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must
be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products
are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or
for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products
for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against
all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended
or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action
Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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21
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For additional information, please contact your loca
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NCP1653/D