DC1653A
Oct. 4, 2010
LTC6803-3 Battery Monitor
HARDWARE/SOFTWARE USERS GUIDE
DESCRIPTION
0B
LTC6803-3 KEY FEATURES
Evaluation circuit DC1653A is a Battery Monitoring
System to demonstrate the functional operation of the
LTC6803-3 integrated circuit. The design includes the
ability to daisy-chain up to 10 devices with built-in
board-to-board ribbon-cable interconnects and selectively apply resistive loading to any cell for purposes of
“Passive Balancing.” Additionally, the board includes
an available DC-DC boost conversion section to power
the IC from an isolated external 5V supply.
1B
CELLS CONNECTOR
Separate Cell 0 ADC input (bottom-cell connection).
Conversion range down to –300mV per cell.
Robust daisy chain SPI common-mode immunity.
Packet Error Checking on command writes.
6X lower standby current than LTC6802.
Power-down mode for “no battery drain”.
Active pullup on discharge-control outputs (S pins).
Extensive diagnostic commands.
DC1653A DEMO FEATURES
2B
DISCHARGE SWITCHES
LTC6803-3
BOTTOM
PORT
DC-DC
BOOST
TOP
PORT
Controllable discharging for Passive Balancing.
Enhanced protection circuitry for IC and external
discharge transistors during hot plugging of cells.
Graphical User Interface (GUI) screen for demonstration of new features and program code development.
Available 60V boost supply from isolated 5V external supply. Jumper configuration offers –5V offset
for V– to support negative cell readings.
Footprint for LTC6655-3.3 calibration reference.
DC1653A
GETTING STARTED WITH ONE BOARD CONNECTED
3B
SINGLE BOARD CONNECTION TO PC AND GUI
5B
Step 1. Set jumpers on DC1653A to the default positions indicated in Table 1.
TABLE 1. JUMPER FUNCTIONS
6B
JUMPER
FUNCTION
DEFAULT
POSITION
Active
JP6
Top of Stack (TOS)
JP5
General Purpose I/O
(GPIO1)
General Purpose I/O
(GPIO2)
Voltage Mode
(VMODE)
Active
JP2
-POWER
Stack
JP1
+POWER
Stack
JP4
JP3
Active
Active
DEFAULT POSITION
Indicates that the cells monitored by the
board are at the top of the battery stack. Data
is not transferred in or out of the Top Port of
this board.
Output connected to pull-up resistor to Vreg.
Can be programmed as an input or an output.
Output connected to pull-up resistor to Vreg.
Can be programmed as an input or an output.
Bottom SPI port is configured as normal TTL
voltage level inputs and outputs. Required
setting for the board on the bottom of the
battery cell stack. A 5KΩ PULL-UP RESISTOR
MUST BE CONNECTED FROM THE SDO
OUTPUT LINE (CONNECTOR J2, PIN 5) TO
THE LOGIC POWER RAIL OF THE CIRCUIT
DRIVING THE BOTTOM SPI PORT (SEE
TEXT).
Connects V- of the LTC6803 to the Cell 0
potential of the stack.
Connects V+ of the LTC6803 to the Cell 12
potential of the stack.
Step 2. Connect DC590B Quick Eval USB cable to
PC/Laptop USB port. Connect ribbon cable from
DC590B to the Bottom Port of DC1653A (J2).
Make sure that the driver for DC590B has been
downloaded from www.linear.com and installed on
the computer. This can be verified by running
Quick Eval and seeing the message that there is a
missing module for this board type. Close the
Quick Eval program and then launch only the control program:
HU
UH
LTC6803-1-3_GUI_Vxx_yyyymmdd.exe
2
ALTERNATIVE POSITION
Allows data to be passed to and from both the
Top and Bottom Ports of the board.
Forced to a logic low level.
Forced to a logic low level.
Bottom Port is configured as a current inputs
and outputs. Required setting for all boards on
a cell stack above the bottom board.
Forces V- to be at a potential 5V below Cell 0.
Only usable if separate external power is applied. Permits all cells to properly measure
down to -300mV.
Connects V+ to the isolated boost power
supply. Only usable if separate external power
is applied. Permits full power-down of the
LTC6803 when external power is removed.
When the DC590B Quick Eval board recognizes the
String ID code from the DC1653A board, the program will open and present the control screen.
This sometimes requires two launches of the GUI
program to properly initialize.
A DC590B board has the required pull-up resistor
to the SDO line already connected. If a system
other than DC590 is driving the bottom port
(which must be set to Voltage Mode) must have a
5KΩ pull-up resistor added between the SDO line
(J2, PIN 5) and the 3V/5V logic supply rail of the
DC1653A
driving system. This pull-up resistor was not added to the DC1653 because it cannot be present
when the port is configured for current mode operation on a multiple board monitor of a stack of
cells.
Step 3. Connect the cells to be monitored to the cells
connector J1. This connector is in two pieces. The
setscrew piece can be unplugged to make it safer
to attach wiring from a four to twelve cell battery
stack. The LTC6803-3 is intended to measure from
four to twelve individual cells with a total stack voltage of 10V to 50V.
With fewer than 12 cells to be monitored, the bottom cell of the stack should always be connected
as Cell 1 between terminals J1-5(+cell contact) and
J1-4(-cell contact). Terminal J1-4, is the Cell 0 reference point for the battery cell stack. The second
cell on the stack connects between terminals J16(+cell contact) and J1-5(-cell contact). All higher
numbered terminals on J1 not used for cell connections may be shorted together. If the V+ positive supply for the DC1653A is to be the cell stack,
then the terminal J1-16 must connect to the top of
the battery stack. Figure 1 illustrates a connection
for fewer than 12 cells.
Figure 1. Connection of four cells (cell voltages at least 2.5V)
SPECIAL NOTE FOR DEMONSTRATION PURPOSES
7B
DC1653A and the GUI program are useful to serve as a
demonstration tool to highlight the features of the
LTC6803-3. If actual battery cells are not available, a
series string of 150Ω resistors connected between
each of the J1 connector terminals can be used instead. Each resistor will serve as a cell voltage. A lab
power supply voltage of 10V to 50V can be connected
across the resistor string between terminals J1-16(+)
and J1-4(-).
When using resistors instead of cells, the discharge
indicating LEDs on the DC1653A board will not light
due to limited available current in the resistor-string.
Step 4. Apply power.
Inserting the setscrew piece into connector J1 will
apply power to the board from the battery cell stack.
For the demo set up simply turn on the lab power
supply preset to a voltage between 10V and 50V.
3
DC1653A
THE CONTROL PROGRAM
THE GRAPHICAL USER INTERFACE (GUI) SCREEN
8B
Figure 2 shows the control panel that appears on the
computer screen. The DC1653A board must be connected to the DC590 interface card for the program to
open. The control screen will close if any of the boards
are disconnected. Controls on this panel are used to
communicate with the LTC6803-3. Commands are issued and information is retrieved and displayed on this
screen. This panel is useful not only for demonstrating
Figure 2. GUI Control Panel Start-up Screen
4
the operation of the LTC6803-3, but also for software
developers to observe the Hex codes exchanged with
the device.
The control screen makes good use of color to provide
cell status and operating conditions at a glance. White
indicates non-existent or stale data. A step by step
procedure for one board connected to a stack of cells
follows to explain the operation of the control panel.
Sections are highlighted for each procedure.
DC1653A
OPERATING THE CONTROL
SCREEN
4B
FIRST THINGS FIRST
9B
Figure 2 is the initial start-up screen that appears when
the program is launched and the Quick Eval interface
card recognizes that the DC1653A board is connected.
Once power is supplied to the board from a stack of
cells or a power supply, the communication between
the PC and the board can be checked.
1: READ CONFIGURATION
10B
command and received by the GUI, the control program calculates a PEC in the same manner. This byte
is compared with the appended receive byte to check
that the data transmission was properly executed. The
Received PEC byte and the calculated PEC from the
received data are displayed in the top section labeled
PACKET ERROR CODE and both bytes should match.
The oval located at the top of the color-coded status
panel for the one board will turn green if the PEC bytes
match. Data transmission errors will produce red
warning indications if the PEC bytes do not match.
There is also a display of the PEC that was sent with
the most recent command to the LTC6803, which had
to match an internally calculated value to be accepted
as a valid command.
2: WRITE CONFIGURATION
1B
Click the command button labeled READ CONFIG. If all
is properly connected and operating the start-up default configuration of the LTC6803-3 will be read from
the board. The Hex codes for the six bytes of configuration setting will appear in the CONFIGURATION
REGISTERS section in the boxes labeled
CONFIGURATION READ FROM LTC6803. The initial
configuration bytes should be 0xE0 for register 0 and
0x00 for the other five bytes. This default configuration is the standby mode for the LTC6803. To enable
the device and begin taking cell voltage measurements, a CDC (Comparator Duty Cycle) setting other
than Standby must be selected from the SET I/O
MODE set CDC selection box at the bottom of the
GUI screen. Once chosen, a WRITE CONFIG command must be executed.
In addition the LTC6803 calculates a Packet Error
Code, PEC, and appends it to the data stream each
time it sends out data. For the six bytes sent by this
Nothing is changed within the LTC6803 until the Write
Configuration command is executed. Clicking the
WRITE CONFIG command button does this. When the
command is sent, the six Hex bytes shown in the
CONFIGURATION REGISTERS section in the boxes
labeled CONFIGURATION WRITTEN TO LTC6803 will
become bold type. Software developers can note the
exact hex values required by the LTC6803 for specific
conditions in these boxes to facilitate their control program development.
Clicking the READ CONFIG button can see confirmation that the configuration change was actually made.
The six bytes read back should match the six bytes
sent and the PEC/CRC check bytes should be a match
(green PEC oval on stack display).
When any configuration information is changed on the
screen the WRITE CONFIG command button will be
back-lit illuminated. This serves as a reminder that this
command still needs to be executed.
IMPORTANT NOTE
12B
No configuration changes take effect until the
WRITE CONFIG button is clicked. The GUI provides
a periodic background command so that watchdog
does not trigger a CDC reset back to 0.
32B
5
DC1653A
3: PROGRAM THE CELL MONITORING VOLTAGE
THRESHOLDS
5: READ FLAGS
15B
13B
In the section labeled SET VOLTAGE LIMITS click on
the boxes and enter voltage values for the over-voltage
and under-voltage thresholds required for the cells being monitored. The voltage value entered will be
rounded to the actual value used by the LTC6803 and
displayed in the box. The voltage ranges for these thresholds is -0.74V to 5.35V and the program will not allow the under-voltage to be greater than the overvoltage threshold.
When any cell in a stack exceeds the programmed over
or under voltage threshold limit, one of two flag bits is
set in an internal register for that cell to serve as a
warning. This is important feedback for battery charging algorithms to know when to start or stop charging.
To read the state of these warning flags at any time is a
simple click of the READ FLAG command button. The
Hex code for the three flag bytes appears in the FLAG
REGISTERS section of the control panel.
One of the configuration options is to mask these flags
from appearing in the register bytes that are read from
the LTC6803. This feature can be used to prevent or
allow these flags to affect a control algorithm. A check
box is provided for each cell in a stack to select the
mask interrupt option for that cell. To implement the
masking requires checking the box and then writing
the new configuration with a WRITE CONFIG button
push.
These monitor thresholds can be applied globally to
each and every cell in the system or customized for the
cells connected to an individual board by clicking the
desired option button. Individual boards are selected
for programming by the left hand tabs in multiple
board systems.
4: READ CELL VOLTAGES
14B
The essential function of the LTC6803 is to measure
and report the voltage on each battery cell when commanded. Once again this is accomplished from the
control screen with two command button clicks. First
click on the START CELL VOLTAGE button. This commands an A/D conversion of all 12-cell voltages in the
time configured from the selected Set CDC option in
the SET I/O MODE box. The actual cell voltage measurements are not displayed until the READ CELL
VOLTAGE command button is clicked.
6
If the measured voltage of a cell is within the monitoring thresholds all indications for the cell appear green.
DC1653A
6: READ AN INDIVIDUAL CELL OR TEMPERATURE
5: READ TEMPERATURE
17B
16B
The LTC6803 has three ADC channels dedicated to
measuring temperature. The temperature indications
are for the internal die temperature of the LTC6803 and
two externally connected thermistors. The display returns a voltage measurement.
The internal die temperature sensor produces a voltage
that changes at a rate of 8mV/°C relative to absolute
zero. To convert the voltage reading to degrees Celsius, divide the voltage by 8mV then subtract 273°C.
For example, 25°C is a reading of 2.384V.
Each cell and each temperature channel has a check
box to allow individual measurements. Checking
these “Only” boxes sends the command (STARTCELL
VOLT then READCELL VOLT, START TEMP then READ
TEMP) to read only that channel and display its
status. Cell 8 and Internal Temp are shown in the
example screen above. Older or stale readings for all
other cells and temperatures are faded out.
18B
For external temperature measurements connect thermistors across cells connector terminals J1-3 to J1-1
and J1-2 to J1-1. A thermistor with a 25°C value of
10KΩ will produce a voltage reading of ~VREF/2 at
25°C. Other thermistor values may be used but scaling
the voltage measurement may require changing the
values of resistors R31 and R32 on the DC1653A circuit board.
To take a temperature reading simple click the START
TEMP command button to make the LTC6803 ADC
conversion followed by clicking the READ TEMP
command button to download the data from the board
and display the voltage readings.
7
DC1653A
OTHER CONTROL FEATURES
8: DISCHARGE CELLS
20B
19B
Another major feature of the LTC6803 is the ability to
remove charge from individual cells. This can help to
distribute the cell charge evenly over a stack of batteries. DC1653A contains a P channel Mosfet in series
with a 33Ω resistor across each cell connection. When
enabled, a cell is loaded and charge is pulled from the
cell with energy dissipated in the switch and resistor.
Three additional command buttons are provided on the
control screen. The POLL ADC and POLL INTERRUPT
command buttons are used to test if the ADC is busy
making conversion and to test if any of the LTC6803
devices in a system have an interrupt condition respectively. The result of these commands can be observed
by monitoring the serial data output line of the SPI interface to the Bottom Port, J2. There is no indication
provided on the control screen.
The START OPENWIRE command button connects the
built in open wire detection circuitry to all cells. This
command must be followed by READCELL VOLT
command button click to see the result. An open wire
connection to any cell will be indicated by an abnormally high voltage measurement for the cell above the
open wire and a near 0V measurement for the cell with
the open wire.
CONTINUOUS OPERATION
21B
A check box is provided for each cell to be discharged.
Checking this box (Cell 3 in the above example screen
shot) and then writing the new configuration with a
WRITE CONFIG button push will load the cell.
IMPORTANT NOTE: The discharge transistors are automatically turned off momentarily while the A/D converter is measuring the cell voltage using the normal
STARTCELL VOLT command. This prevents any voltage drop errors caused by the discharge current flowing through the cell inter-connection wiring. An accurate indication of the true state of charge of the cells is
then obtained.
The LTC6803 offers the option of keeping the discharge transistors on while measuring the cell voltages. This is done using the STARTCELL hold DCC
command button. A blue indicator is illuminated when
this command has been executed. This lower voltage
reading also includes I*R errors introduced by cabling
and connectors.
8
For convenience, the control panel allows for continuous operation of the DC1653A board. The command
button labeled START CONTINUOUS READ CELLS can
be clicked and the board control is placed in a continuous loop executing the following commands automatically in the following sequence:
Start cell voltage
Read cell voltage
Start temp
Read temp
Read flags
All values are updated continually (~800ms update
rate). While running, the configuration can be changed
on the fly. Simply changing a configuration item (Discharge cells for example) and clicking the WRITE
CONFIG button will implement the new configuration
and return to continuous operation.
A green box in the lower right hand corner indicates
that the system is running continuously. A red box
means that the system is stopped and waiting for a
new command to be sent.
DC1653A
DISPLAYING VALID DATA TRANSFERS ONLY
2B
Each time data is transferred from the LTC6803 by the
four READ commands (Cell Voltage, Configuration,
Flag Status and Temperature), a Packet Error Code,
PEC, is appended based on the data stream sent. The
control program also calculates a PEC value based on
the data it receives. If the calculated PEC matches the
transmitted value the data transfer is assumed to be
error free and therefore the data is valid.
If the two PEC values do not match, the transmitted
data stream has been somehow corrupted. This type of
data error becomes more of a concern when boards
are stacked and the transmit data stream is lengthened. The transmitted and calculated PEC values are
displayed on the GUI and turn red when a mismatch
occurs.
LOW CURRENT STANDBY
23B
An important system consideration is the ability to put
the monitoring circuitry into a low current drain condition. This is done by setting the LTC6803 into its
standby configuration. A command button in the lower
right corner of the screen is provided to facilitate this
function. Once pushed all data and configuration settings are reset and the screen goes white on all indicators.
SELF TEST & DIAGNOSTIC FUNCTIONS
24B
The LTC6803 has built in self test and diagnostic functions. These commands apply a test signal to the ADC
to check that the internal cell voltage and temperature
connections are functioning. The cell voltage and open
wire test signals can be applied with or without the
discharge transistors active. Checking the functionality
of each bit in the internal data registers for cell voltages
and temperatures can also be seen by choosing which
test code (0x555, 0xAAA, or 0xFFF) to expect to be
returned from the device when a self test command is
issued.
OTHER CONFIGURATION OPTIONS
25B
The SET I/O MODE group of checkboxes can be used
to adjust other features of the LTC6803. Configuring
the general purpose I/O pins and setting the type of
activity polling scheme can be selected then configured
with a WRITE CONFIG button push.
EXTERNAL POWERING OPTION
The DC1653A includes circuitry that can power the
LTC6803 separately from the monitored cells. A lowpower isolated DC-DC conversion function accepts a
5.0V input and provides about 60V between V+ and V-.
To enable this mode, the +POWER jumper JP1 must
be set to the EXTernal setting. This disconnects V+
from the battery stack and allows the LTC6803 to
completely power-down with removal of the external
energy source, dropping battery drain to mere nA leakage levels for best long-term storage conditions. The
external 5V supply will have to provide about 50mA in
normal operation.
When using the external power option, there is also a
choice of configuration for the biasing point of V-. The
–POWER jumper JP2 will tie the bottom cell potential
(cell 0) to either V- (the STACK position) or to 5V
above V- (the EXTernal position). The latter provides
the needed common-mode headroom the ADC requires to support negative cell-voltage readings by
forcing V- to be 5V below cell 0.
9
DC1653A
EXTERNAL CALIBRATION OPTION
The DC1653A provides a solder-pad footprint to accept
the LTC6655 high-accuracy reference. The reference is
powered from the external DC-DC function through the
local 5V regulator provided (which also creates the
biasing for the –POWER EXT option). The reference
voltage is digitized by the VTEMP1 ADC channel (instead of a thermistor signal) and may be used to provide corrective information on the battery readings. A
3.300V or 4.096V model is recommended. The reference is enabled by setting GPIO1 to “0” using a configuration command, or placing the GPIO1 jumper JP5
to the GND position.
4. A ribbon cable must connect the Top Port (J3) of a
lower board to the Bottom Port (J2) of the next
board up on the stack. The daisy chain linking
with ribbon cables from the Top port of a lower
board on the stack to the Bottom port of the next
board above it establishes the serial data link for
the entire stack.
CAUTION! CAUTION! CAUTION!
28B
STACKING BOARDS TO ADD MORE BATTERY CELLS
As battery cells are stacked on top of each other, great
care must be taken to prevent damage and personal
injury from the very high voltage potentials that may be
present. Do not allow short circuit connections, whether electrical or human, between a high voltage point
and the system or chassis ground at the bottom of the
stack. Be very careful and respect the potential danger
of high voltage!
A unique characteristic of the LTC6803-3 is the ability
to communicate serial data up and down a stack of
devices connected to any number of battery cell
stacks. Likewise any number of DC1653A boards,
monitoring up to 12 cells each, can be stacked in daisy
chain fashion. The control GUI however is limited to
only 10 boards (120 cells maximum). To stack and
control more than one board requires the following
hardware and software modifications:
MULTI-BOARD HARDWARE ADJUSTMENTS
27B
1. The bottom board on the stack, which connects to
a system controller or to a DC590 Quick Eval link
to a PC, must have its Bottom Port set to voltage
mode. Jumper JP3 (VMOD) must be connected to
the ACTIVE position. If not using DC590, a 5KΩ
pull-up resistor must be connected from the SDO
output line (connector J2, pin 5) to the 3V/5V logic power rail of the circuit driving the bottom SPI
port.
2. Every board connected above the bottom board
must have its serial ports set to Current Mode.
Connect VMODE Jumper JP3 to the GND position
on each board to set this.
3. The final board on the top of the stack must have
JP6 (TOS) set to ACTIVE. Connect JP6 (TOS) on
all other boards to the GND position.
10
IMPORTANT NOTE FOR DEMONSTRATION OR
EVALUATION WHEN NOT USING BATTERY CELLS IN
A STACK
29B
When using DC1653A boards in a stacked application
where a resistor string is used to simulate cell voltages
an extra wire must be added to connect the V+ potential of a lower board to the V- potential of the next
board up on the stack. Connector J1, pin 16 of a the
lower board must be connected to the connector J1,
pin 4 of the next board above it on the stack. The wire
making this connection should be kept as short as
possible (less then 2 inches or 5 cm). This supply
connection is not provided by the ribbon connector
and is required to enable data communication up and
down the stack.
DC1653A
SOFTWARE ADJUSTMENTS
COLOR CODED STATUS PANEL
31B
30B
The GUI program can control up to ten boards on a
stack.
1. Select the number of boards on the stack from the
pop up window located near the command buttons
at the bottom of the screen.
2. Select whether the Operating Configuration (CDC
Comparator) and Over/Under voltage thresholds
for each board are to be the same (GLOBAL) or different for each board (CUSTOM) and set the duty
cycle and voltages accordingly.
3. A tab will appear on the left edge of the control
panel for each board on the stack. Clicking on any
of these tabs will transfer control commands and
data to and from the display screen to that selected
board.
The color-coded status panel will expand to include all
boards connected in a stack. Each small square in this
array represents an individual battery in the stack of
boards. The intent of this display is to provide a way to
see the status of all cells at a glance. The significance
of the colors used is explained in the legend on the
screen.
Any grayed box indicates that the cell’s interrupt flag
has been masked so the LTC6803 is no longer reporting this status. The cell voltage value measured for this
cell however is still accurate.
The next page shows the schematic for DC1653A.
Consult the data sheet for detailed information concerning the operation of the LTC6803-3.
11
A
B
C
D
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CELL VOLTAGES
72V MAX
J1
GND2
MOSI
GND3
CELL12
CELL11
CELL10
CELL9
CELL8
CELL7
CELL6
CELL5
CELL4
CELL3
CELL2
CELL1
CELL0
VTEMP2
VTEMP1
TMPRTN
3
-POWER
14
12
10
8
6
4
2
STACK EXT
1
JP2
NC
EESCL EEGND
EESDA EEVCC
CS
SCK
MISO
GND1
60VLOCAL
13
11
9
7
5
3
2
D3
D2
D1
L5
L6
R59
33
2512
5
74476410
L22
L25 74476410
R57
33
L14
74476410 2512
74476410
R58
33
L13 2512
74476410
L12
74476410
R60
33
L11 2512
74476410
R61
33
L10 2512
74476410
R62
33
L9 2512
74476410
R63
33
L8 2512
74476410
R64
33
L7 2512
74476410
R65
33
2512
74476410
R66
33
2512
74476410
L4
R67
33
2512
74476410
RS07J
RS07J
RS07J
2
+5V
1
2
R6
2
2
2
2
2
2
R19
1%
R45
475
1%
R46
475
1%
R47
475
1%
R48
475
2
2
2
3
LED1
2
100 1%
R25
R69 100 1%
R28 3.3k
100 1%
R27
R26 3.3k
Q1
RQJ0303PGDQALT-E
LED2
3
100 1%
R23
R24 3.3k
Q2
RQJ0303PGDQALT-E
LED3
3
100 1%
R22 3.3k
Q3
RQJ0303PGDQALT-E
LED4
3
Q4
RQJ0303PGDQALT-E R21
R20 3.3k
100 1%
LED5
2
1%
3
R17
100 1%
R18 3.3k
Q5
RQJ0303PGDQALT-E
LED6
3
R15
100 1%
R16 3.3k
Q6
RQJ0303PGDQALT-E
LED7
3
R13
100 1%
R14 3.3k
Q7
RQJ0303PGDQALT-E
LED8
3
R11
100 1%
R12 3.3k
Q8
RQJ0303PGDQALT-E
LED9
3
100 1%
R10 3.3k
Q9
RQJ0303PGDQALT-E
LED10
3
R9
3.3k
100 1%
R7
3.3k
D4
R4
100nF
1206
C19
100nF
1206
C1
100nF
1206
C2
100nF
1206
C3
100nF
1206
C4
100nF
1206
C5
100nF
1206
C6
100nF
1206
C7
100nF
1206
C8
100nF
1206
C9
100nF
1206
C10
100nF
1206
C11
100nF
1206
C12
BAT46W
100 1%
R8
Q10
RQJ0303PGDQALT-E
LED11
3
Q11
RQJ0303PGDQALT-E
LED12
3
R5
BAT46W
75V
Q12
RQJ0303PGDQALT-E
STACK
JP1
D5
D6
R49
475
1%
R50
475
1%
R51
475
1%
R52
475
1%
R53
475
1%
R54
475
1%
R55
475
1%
R56
475
EXT
3
+POWER
R68
33
L3 2512
74476410
74476410
L2
L1
630V 1206
C33 1000pF
74476410
L17
74476410
L16
C12
C11
C8
C7
C6
C4
C3
C1
PDZ7.5B
D20
C0
S1
PDZ7.5B
D19
S2
PDZ7.5B
D18
C2
S3
PDZ7.5B
D17
S4
PDZ7.5B
D16
S5
PDZ7.5B
D15
C5
S6
PDZ7.5B
D14
S7
PDZ7.5B
D13
S8
PDZ7.5B
D12
S9
PDZ7.5B
D11
C9
PD27.5B
D10
C10
PDZ7.5B
D9
PDZ7.5B
D8
100nF
1206
C13
100
S10
S11
S12
4
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
U1
TOS
C10
S4
C4
S5
C5
S6
C6
S7
C7
S8
C8
S9
C9
C3
S3
C2
S2
C1
S1
C0
V-
NC
VTEMP1
VTEMP2
VREF
VREG
WDTB
S11
S10
GPI01
GPI02
VMODE
SCKI
SDI
SD0
C11
S12
C12
V+
SCKO
SDIO
CSBI
LTC6803IG-3
CSBO
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
TP1
V1
V2
VREF
VREG
TOS
3
D0
C17
DI
CK VREF
C16
C15
1uF
100nF 100nF
1206 1206
GPI01/WDTB
GPI02
VMODE
CK
DI
DO
CS
GND CS
1
VCC
2
VIN
3
3
4
1
4
5
L15
74476410
6
5
1
1
1
VREG
6
5
2
3
-
+
7
1
JP3
1
1M
R36
1M
3
OPT
1206
10K 1%
R40
VTEMP2
OPT
1206
10K 1%
R35
1
JP6
EXT RTN
E6
E5
D7
BAT46W
VREG
VREG
VREG
VREG
EXT +5V
1%
JP5
R37
1
GND ACTIVE
3
1%
1 JP4
GND ACTIVE
3
GND ACTIVE
3
GND ACTIVE
VMODE
VTEMP1
R30 100 1%
U2B
LT6004CMS8
R32
VREG
-
+
1%
R29 100 1%
1M
R39
TOS
GPI01
GPI02
1%
U2A
LT6004CMS8
R31
VREG
1uF
C14
1M
R41
C21
C32
10uF
1206
1
2
3
7
6
1%
L24
74476410
10uF
1206
R43
1M
A0
A1
A2
WP
SCL
R34
4.99K
R44
1M
VREG
1
4
5
74476410
L21
2
GND
VIN
GND
VOUT
6
NC
EEGND
EESDA
EEVCC
EESCL
SCK
MOSI
MISO
CS
VCC
VIN
VREG
4
3
2
1
4
3
2
1
GND
VOUT_F
GND
GND2
IN2
GND1
IN1
OUT2
VCC2
OUT1
VCC1
U3
LT1693-2IS8
GND
GND VOUT_S
VIN
SHDN
5
6
7
8
5
6
7
8
U6
LTC6655BHMS8-3.3 OPT
14
12
9
10
11
4
7
5
6
2
1
J2
E4
E3
E1
E2
C34
10uF
1206
1
T1
9:
:
99<
:
1uF
>
2
REV
BAV99
D21
BAV99
D22
BAV99
D23
BAV99
D24
N/A
1
REVISION HISTORY
TECHNOLOGY
C30
1uF
C29
1uF
C28
1uF
C27
1uF
DATE
1206
100V
C31
1uF
60VLOCAL
06/24/10
JON M.
APPROVED
/0"1
2&*3$45
"#$%#&'(
) *+,-./) ???$#,-21+8
!
+,6#5-,&#$+2
7'&+8-29'-,$3
L23
74476410
SECOND PROTOTYPE
DESCRIPTION
LTC6803IG-3
1
/
DEMO CIRCUIT 1653A
/
2
12-CELL BATTERY STACK MONITOR
"
C24
1uF
C25
1uF
C26
1uF
ECO
C23
:"
9"
9"9
;
<("
9"=:
:
9
"99
9:9":
:
9
"
:
:
1. CAPACITORS AND RESISTORS ARE 0603.
9"
2
3
5
4
PA0264NL
1206
6
C22 100nF
V-
VREG
GPI01
GPI02
SPI BOTTOM
NOTES: UNLESS OTHERWISE SPECIFIED,
1%
R1
33.2K
C35
1uF
10K 1%
R70
220pF
C20
2
+5V
U5
24LC025-I/ST
1%
U4
LT1790BCS6-5
SDA
74476410
L20
100nF
1206
74476410
L19
R33
4.99K
74476410
L18
R42
1M
2
GND1
3
2
2
2
2
GND2
8
8
VCC
GND
4
GND3
13
SPI TOP J3
8
4
8
4
1
1
1
1
1
1
1
1
1
&
A
B
C
D