HCTS283MS TM Radiation Hardened 4 Bit Binary Full Adder with Fast Carry September 1995 Features Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW • 3 Micron Radiation Hardened CMOS SOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs S1 1 16 VCC B1 2 15 B2 A1 3 14 A2 S0 4 13 S2 A0 5 12 A3 B0 6 11 B3 CIN 7 10 S3 GND 8 9 COUT • DC Operating Voltage Range: 4.5V to 5.5V • LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2V Min 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW • Input Current Levels Ii ≤ 5µA at VOL, VOH Description The Intersil HCTS283MS is a Radiation Hardened 4 bit binary full adder with fast carry that adds two 4 bit binary numbers and generates a carry-out bit if the sum exceeds 15. This device can be used in positive or negative logic. When using positive logic the carry-in input must be tied low, if there is no carry-in. S1 1 16 VCC B1 2 15 B2 A1 3 14 A2 S0 4 13 S2 A0 5 12 A3 B0 6 11 B3 CIN 7 10 S3 GND 8 9 COUT The HCTS283MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family . The HCTS283MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE HCTS283DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP HCTS283KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack HCTS283D/Sample +25oC Sample 16 Lead SBDIP HCTS283K/Sample +25oC Sample 16 Lead Ceramic Flatpack HCTS283HMSR +25oC Die Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved 1 518641 FN3381.1 Spec Number HCTS283MS Functional Diagram 7 CIN 5 A0 6 B0 3 A1 2 B1 14 A2 15 B2 12 A3 11 B3 8 GND 16 VCC S0 4 S1 1 S2 13 S3 10 COUT 9 Spec Number 2 518641 Specifications HCTS283MS Absolute Maximum Ratings Reliability Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Thermal Resistance θJA θJC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation. Operating Conditions Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 10ns/V Max TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Quiescent Current Delta ICC Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Noise Immunity Functional Test TEMPERATURE MIN MAX UNITS 1 +25oC - 40 µA 2, 3 +125oC, -55oC - 750 µA 1 +25oC - 1.6 mA 2, 3 +125oC, -55oC - 3.2 mA 1 +25oC 4.8 - mA 2, 3 +125oC, -55oC 4.0 - mA 1 +25oC -4.8 - mA 2, 3 +125oC, -55oC -4.0 - mA VCC = 4.5V, VIH = 2.25V, IOL = 50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 5.5V, VIH = 2.75V, IOL = 50µA, VIL = 0.80V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 4.5V, VIH = 2.25V, IOH = -50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIH = 2.75V, IOH = -50µA, VIL = 0.80V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIN = VCC or GND 1 +25oC - ±0.5 µA 2, 3 +125oC, -55oC - ±5.0 µA 7, 8A, 8B +25oC, +125oC, -55oC - - - SYMBOL ICC DICC IOL IOH VOL VOH IIN FN LIMITS GROUP A SUBGROUPS (NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 5.5V, VIN = VCC or GND, 1 Input at 2.4V VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V (Note 2) VCC = VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V (Note 2) VCC = 4.5V, VIH = 2.25V, VIL = 0.80V (Note 3) NOTES: 1. All voltages referenced to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Spec Number 3 518641 Specifications HCTS283MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay CIN to S0 SYMBOL TPLH TPHL Propagation Delay CIN to S1 TPLH TPHL Propagation Delay CIN to S2 CIN to COUT TPLH TPHL Propagation Delay CIN to S3 TPLH TPHL Propagation Delay An, Bn to COUT TPLH TPHL Propagation Delay An, Bn to Sn (NOTES 1, 2) CONDITIONS TPLH TPHL GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 9 +25oC 2 23 ns 10, 11 +125oC, -55oC 2 27 ns 9 +25oC 2 26 ns 10, 11 +125oC, -55oC 2 30 ns 9 +25oC 2 27 ns 10, 11 +125oC, -55oC 2 31 ns 9 +25oC 2 30 ns 10, 11 +125oC, -55oC 2 35 ns 9 +25oC 2 31 ns 10, 11 +125oC, -55oC 2 37 ns 9 +25oC 2 34 ns 10, 11 +125oC, -55oC 2 40 ns 9 +25oC 2 38 ns 10, 11 +125oC, -55oC 2 47 ns 9 +25oC 2 40 ns 10, 11 +125oC, -55oC 2 48 ns 9 +25oC 2 53 ns 10, 11 +125oC, -55oC 2 67 ns 9 +25oC 2 54 ns 10, 11 +125oC, -55oC 2 63 ns 9 +25oC 2 50 ns 10, 11 +125oC, -55oC 2 63 ns 9 +25oC 2 60 ns 10, 11 +125oC, -55oC 2 73 ns VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V LIMITS NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Input Capacitance Output Transition Time Capacitance Power Dissipation SYMBOL CIN TTHL, TTLH CPD CONDITIONS NOTES TEMPERATURE MIN MAX UNITS 1 +25oC - 10 pF 1 +125oC, -55oC - 10 pF VCC = 4.5V, VIH = 4.5V, VIL = 0V 1 +25oC - 15 ns 1 +125oC, -55oC - 22 ns VCC = 5.5V, f = 1MHz 1 +25oC - 250 pF 1 +125oC, -55oC - 315 pF VCC = 5V, VIH = 5V, VIL = 0V, f = 1MHz NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Spec Number 4 518641 Specifications HCTS283MS TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Quiescent Current Delta ICC (NOTES 1) CONDITIONS SYMBOL TEMPERATURE MIN MAX UNITS - 0.75 mA ICC VCC = 5.5V, VIN = VCC or GND +25oC DICC VCC = 5.5V, VIN = VCC or GND, 1 Input at 2.4V +25oC - 3.2 mA Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5, VOUT = 0.4V, VIL = 0V +25oC 4.0 - mA Output Current (Source) IOH VCC = 4.5V, VIH = 4.5, VOUT = VCC -0.4V VIL = 0V +25oC -4.0 - mA Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, IOL = 50µA +25oC - 0.1 V VCC = 5.5V, VIH = 2.75V, VIL = 0.80V, IOL = 50µA +25oC - 0.1 V VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, IOL = 50µA +25oC VCC -0.1 - V VCC = 5.5V, VIH = 2.75V, VIL = 0.80V, IOL = 50µA +25oC VCC -0.1 - V VCC = 5.5V, VIN = VCC or GND +25oC - ±5 µA Output Voltage High Input Leakage Current Noise Immunity Functional Test Propgation Delay CIN to S0 Propagation Delay CIN to S1 Propagation Delay CIN to S2, CIN to COUT Propagation Delay CIN to S3 Propagation Delay An, Bn to COUT Propagation Delay An, Bn to Sn VOH IIN FN o VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, (Note 2) +25 C - - - TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 27 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 30 ns TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 31 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 35 ns TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 37 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 40 ns TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 47 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 48 ns TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 67 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 63 ns TPLH VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 63 ns TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V +25oC 2 73 ns NOTES: 1. All voltages referenced to device GND. 2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP DELTA LIMIT ICC 5 12µA IOL/IOH 5 -15% of 0 Hour PARAMETER Spec Number 5 518641 Specifications HCTS283MS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS METHOD GROUP A SUBGROUPS Initial Test (Preburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test I (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test II (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H PDA 100%/5004 1, 7, 9, Deltas Interim Test III (Postburn-In) 100%/5004 1, 7, 9 PDA 100%/5004 1, 7, 9, Deltas Final Test 100%/5004 2, 3, 8A, 8B, 10, 11 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample/5005 1, 7, 9 Sample/5005 1, 7, 9 Group A (Note 1) Group B Group D READ AND RECORD ICC, IOL/H Subgroups 1, 2, 3, 9, 10, 11, (Note 2) NOTES: 1. Alternate Group A, in accordance with Method 5005 of MIL-STD-883, may be exercised. 2. Table 5 parameters only. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS TEST READ AND RECORD METHOD PRE RAD POST RAD PRE RAD POST RAD 5005 1, 7, 9 Table 4 1, 9 Table 4 (Note 1) Group E Subgroup 2 NOTE: 1. Except FN Test which will be performed 100% Go/No-Go. TABLE 8. STATIC BURN-IN AND DYNAMIC OSCILLATOR OPEN 1/2 VCC = 3V ± 0.5V GROUND VCC = 6V ± 0.5V 50kHz 25kHz - 16 - - - 2, 3, 5, 6, 7, 11, 12, 14, 15, 16 - - 1, 4, 9, 10, 13 16 2, 6, 7, 11, 15 3, 5, 12, 14 STATIC BURN-IN I TEST CONNECTIONS (Note 1) 1, 4, 9, 10, 13 2, 3, 5, 6, 7, 8, 11, 12, 14, 15 STATIC BURN-IN II TEST CONNECTIONS (Note 1) 1, 4, 9, 10, 13 8 DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) - 8 NOTES: 1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in TABLE 9. IRRADIATION TEST CONNECTIONS OPEN GROUND VCC = 5V ± 0.5V 1, 4, 9, 10, 13 8 2, 3, 5, 6, 7, 11, 12, 14, 15, 16 NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Spec Number 6 518641 HCTS283MS Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) 100% Interim Electrical Test 1 (T1) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Nondestructive Bond Pull, Method 2023 100% Interim Electrical Test 2 (T2) Sample - Wire Bond Pull Monitor, Method 2011 100% Delta Calculation (T0-T2) Sample - Die Shear Monitor, Method 2019 or 2027 100% PDA 1, Method 5004 (Notes 1and 2) 100% Internal Visual Inspection, Method 2010, Condition A 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Delta Calculation (T0-T1) 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Interim Electrical Test 3 (T3) 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% PIND, Method 2020, Condition A 100% Final Electrical Test 100% External Visual 100% Fine/Gross Leak, Method 1014 100% Serialization 100% Radiographic, Method 2012 (Note 3) 100% Initial Electrical Test (T0) 100% External Visual, Method 2009 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5) NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: • Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). • Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. • GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. • X-Ray report and film. Includes penetrometer measurements. • Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). • Lot Serial Number Sheet (Good units serial number and lot number). • Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. Spec Number 7 518641 HCTS283MS Propagation Delay Timing Diagram and Load Circuit DUT VIH INPUT VS TEST POINT CL RL CL = 50pF VSS RL = 500Ω TPLH TPHL VOH VS OUTPUT VOL Transition Timing Diagram AC VOLTAGE LEVELS VOH TTLH TTHL 80% VOL 20% PARAMETER 80% OUTPUT 20% HCS UNITS VCC 4.50 V VIH 3.00 V VIL 0.0 V VS 1.30 V GND 0.0 V Spec Number 8 518641 HCTS283MS Die Characteristics DIE DIMENSIONS: 78 x 86 mils 2.21mm x 2.19mm METALLIZATION: Type: SiAl Metal Thickness: 11kÅ ± 1kÅ GLASSIVATION: Type: SiO2 Thickness: 13kÅ ± 2.6kÅ WORST CASE CURRENT DENSITY: <2.0 x 10 5A/cm2 BOND PAD SIZE: 100µm x 100µm 4 x 4 mils Metallization Mask Layout HCTS283MS S1 (1) VCC (16) B2 (15) A2 (14) B1 (2) (13) S2 A1 (3) (12) A3 S0 (4) (11) B3 A0 (5) B0 (6) (7) CIN (8) GND (9) COUT (10) S3 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Spec Number 9 518641