ISL84516, ISL84517 ® Data Sheet May 19, 2005 Low-Voltage, Dual Supply, SPST, Analog Switches The Intersil ISL84516 and ISL84517 devices are precision, analog switches designed to operate from ±1.5V to ±6V supplies. Targeted applications include battery powered equipment that benefit from the devices’ low power consumption (350mW), low leakage currents, and fast switching speeds. Additionally, excellent RON flatness maintains signal fidelity over the whole input range, while micro packaging alleviates board space limitations. The ISL8451X are single-pole/single-throw (SPST) switches, with the ISL84516 being normally open (NO), and the ISL84517 being normally closed (NC). Table 1 summarizes the performance of this family. For higher performance, pin compatible versions, see the ISL43112, ISL43113 data sheet. For single supply versions, see the ISL84514, ISL84515 data sheet. TABLE 1. FEATURES AT A GLANCE ISL84517 1 1 Configuration NO NC ±5V RON 13Ω 13Ω 40ns / 30ns 40ns / 30ns ±5V tON/tOFF Packages Features • Drop-in Replacements for MAX4516 and MAX4517 at VS = ±5V • Available in SOT-23 Packaging • Dual Supply Operation . . . . . . . . . . . . . . . . . . . ±1.5V to ±6V • ON Resistance (RON Max). . . . . . . . . . . . . . . . . . . . . 20Ω • RON Flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Ω • Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . 20pC (Max) • Low Leakage Current (Max at 85oC) . 20nA (Off Leakage) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40nA (On Leakage) • Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75ns • Minimum 2000V ESD Protection per Method 3015.7 • CMOS Logic Compatible • Pb-Free Available (RoHS Compliant) ISL84516 Number of Switches FN6030.4 Applications 8 Ld SOIC, 5 Ld SOT-23 • Battery Powered, Handheld, and Portable Equipment • Communications Systems - Radios - Telecom Infrustructure • Medical Equipment - Ultrasound, MRI, CAT/PET SCAN - Electrocardiograph, Blood Analyzer Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Application Note AN557 “Recommended Test Procedures for Analog Switches” • Test Equipment - Logic and Spectrum Analyzers - Portable Meters, DVM, DMM • Audio and Video Switching • General Purpose Circuits - Low Voltage DACs and ADCs - Sample and Hold Circuits - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved ISL84516, ISL84517 Pinouts (Note 1) ISL84516 (SOIC) TOP VIEW ISL84516 (SOT-23) TOP VIEW COM 1 8 NO COM 1 N.C. 2 7 V- NO 2 N.C. 3 6 IN V- 3 V+ 4 5 N.C. ISL84517 (SOIC) TOP VIEW 4 IN ISL84517 (SOT-23) TOP VIEW 8 NC COM 1 5 V+ COM 1 N.C. 2 7 V- NC 2 N.C. 3 6 IN V- 3 V+ 4 5 N.C. 5 V+ 4 IN NOTE: 1. Switches Shown for Logic “0” Input. Truth Table LOGIC NOTE: Ordering Information (Continued) ISL84516 ISL84517 0 OFF ON 1 ON OFF Logic “0” ≤ 1.5V; Logic “1” ≥ 3.5V at VS = ±5V Pin Descriptions PART NO. (BRAND) FUNCTION PACKAGE PKG. DWG. # ISL84516IH-T (516I) 5 Ld SOT-23, Tape and Reel P5.064 ISL84516IHZ-T (516I) (Note) 5 Ld SOT-23, Tape and Reel (Pb-free) P5.064 ISL84517IB PIN TEMP. RANGE (oC) ISL84517IB-T -40 to 85 8 Ld SOIC 8 Ld SOIC, Tape and Reel M8.15 M8.15 V+ System Positive Power Supply Input (+1.5V to +6V) ISL84517IBZ (Note) V- System Negative Power Supply Input (-1.5V to -6V) CMOS Compatible Digital Control Input ISL84517IBZ-T (Note) 8 Ld SOIC, Tape and Reel (Pb-free) M8.15 IN ISL84517IH-T (517I) 5 Ld SOT-23, Tape and Reel P5.064 ISL84517IHZ-T (517I) (Note) 5 Ld SOT-23, Tape and Reel (Pb-free) P5.064 COM Analog Switch Common Pin NO Analog Switch Normally Open Pin NC Analog Switch Normally Closed Pin N.C. No Internal Connection Ordering Information PART NO. (BRAND) ISL84516IB ISL84516IB-T ISL84516IBZ (Note) ISL84516IBZ-T (Note) TEMP. RANGE (oC) -40 to 85 PACKAGE 8 Ld SOIC 8 Ld SOIC Tape and Reel -40 to 85 M8.15 M8.15 8 Ld SOIC (Pb-free) M8.15 8 Ld SOIC Tape and Reel (Pb-free 2 PKG. DWG. # M8.15 -40 to 85 8 Ld SOIC (Pb-free) M8.15 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. ISL84516, ISL84517 Absolute Maximum Ratings Thermal Information V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V Input Voltages IN (Note 2). . . . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) NO, NC (Note 2) . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Output Voltages COM (Note 2) . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 30mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . >2kV Thermal Resistance (Typical, Note 3) θJA (oC/W) 5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 225 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range . . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range ISL8451XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 2. Signals on NO, NC, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications - ±5V Supply PARAMETER Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 5) MIN Full V- - V+ V 25 - 13 20 Ω TYP (NOTE 5) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON VS = ±5V, ICOM = 1.0mA, VCOM = 3V (See Figure 4) Full - - 25 Ω RON Flatness, RFLAT(ON) VS = ±5V, ICOM = 1.0mA, VCOM = -3V, 0V, 3V 25 - 3 4 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V (Note 6) COM OFF Leakage Current, ICOM(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V (Note 6) COM ON Leakage Current, ICOM(ON) VS = ±5.5V, VCOM = VNO or VNC = ±4.5V (Note 6) Full - 4 6 Ω 25 -1 0.01 1 nA Full -20 - 20 nA 25 -1 0.01 1 nA Full -20 - 20 nA 25 -2 0.01 2 nA Full -40 - 40 nA Input Voltage High, VINH Full (V+) - 1.5 - V+ V Input Voltage Low, VINL Full V- - (V+) - 3.5 V VS = ±5.5V, VIN = 0V or V+ Full -0.5 - 0.5 µA VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to V+ (See Figure 1) 25 - 40 100 ns Full - - 150 ns VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to V+ (See Figure 1) 25 - 30 75 ns Full - - 125 ns DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) 25 - 10 20 pC OFF Isolation RL = 50Ω, CL = 15pF, f = 100kHz (See Figure 3) 25 - >86 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5) 25 - 9 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5) 25 - 9 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5) 25 - 22 - pF 3 ISL84516, ISL84517 Electrical Specifications - ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP (oC) (NOTE 5) MIN Full ±1.5 - ±6 V 25 - 40 125 µA TYP (NOTE 5) MAX UNITS POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ VS = ±5.5V, VIN = 0V or V+, Switch On or Off Negative Supply Current, I- VS = ±5.5V, VIN = 0V or V+, Switch On or Off Full - - 200 µA 25 -125 30 - µA Full -200 - - µA NOTES: 4. VIN = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. Test Circuits and Waveforms V+ tr < 20ns tf < 20ns V+ LOGIC INPUT 50% 0V tOFF SWITCH INPUT SWITCH INPUT VOUT VOUT NO or NC COM IN 90% SWITCH OUTPUT C 90% 0V CL 35pF RL 300Ω LOGIC INPUT tON C FIGURE 1A. MEASUREMENT POINTS V- FIGURE 1B. TEST CIRCUIT Logic input waveform is inverted for switches that have the opposite logic sense. CL includes fixture and stray capacitance. V OUT = V RL -----------------------------(NO or NC) R + R L ( ON ) FIGURE 1. SWITCHING TIMES V+ SWITCH OUTPUT VOUT LOGIC INPUT RG ∆VOUT ON ON NO or NC VG C IN OFF LOGIC INPUT C Q = ∆VOUT x CL V- FIGURE 2B. TEST CIRCUIT FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION 4 VOUT COM CL ISL84516, ISL84517 Test Circuits and Waveforms (Continued) V+ V+ C C RON = V1/1mA SIGNAL GENERATOR NO or NC COM VCOM IN V- or V+ 1mA IN V1 VINL or VINH COM ANALYZER NO or NC RL C C V- V- FIGURE 3. OFF ISOLATION TEST CIRCUIT FIGURE 4. RON TEST CIRCUIT V+ NO or NC IN V- or V+ IMPEDANCE ANALYZER COM V- FIGURE 5. CAPACITANCE TEST CIRCUIT Detailed Description The ISL84516 and ISL84517 analog switches offer precise switching capability from ±1.5V to ±6V supplies with low onresistance (13Ω) and high speed operation (tON = 40ns, tOFF = 30ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (±1.5V), low power consumption (350µW), low leakage currents (2nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation. Supply Sequencing And Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 6). To prevent forward biasing these diodes, V+ and 5 V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 6). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 6). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is ISL84516, ISL84517 unaffected by this approach, but the switch resistance may increase, especially at low supply voltage. OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR IN Logic-Level Thresholds Due to the lack of a GND pin, the switching point of the digital input is referenced predominantly to V+. The digital input is CMOS compatible at ±5V supplies, and is TTL compatible for ±3.3V supplies. For other supply combinations refer to Figure 11. The switching point has a very low temperature sensitivity, and changes by only 100mV from 85oC to -40oC, regardless of supply voltage. VNO or NC VCOM High-Frequency Performance VOPTIONAL PROTECTION DIODE FIGURE 6. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL8451X construction is typical of most CMOS analog switches, except that there are only two supply pins: V+ and V-. The power supplies need not be symmetrical for useful operation. As long as the total supply voltage (V+ to V-, including supply tolerances, overshoot, and noise spikes) is less than the15V maximum supply rating, and the digital input switching point remains reasonable (see “Logic-Level Thresholds” section), the ISL84516, ISL84517 function well. The 15V maximum supply rating provides the designer of 12V systems much greater flexibility than switches with a 13V maximum supply voltage. The minimum recommended supply voltage is ±1.5V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages, and the digital input VIL becomes negative at VS ≤ ±2V. Refer to the “Typical Performance” curves for details. V+ and V- power the internal CMOS switches and set their analog voltage limits. These supplies also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and V- signals to drive the analog switch gate terminals. This family of switches is not recommended for single supply applications. For single supply, similar performance, pin compatible, TTL compatible versions of these switches, see the ISL84514, ISL84515 data sheet. 6 In 50Ω systems, signal response is reasonably flat to 30MHz, with a -3dB bandwidth of nearly 400MHz (see Figure 13). Figure 13 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch’s input to its output. OFF Isolation is the resistance to this feedthrough. Figure 14 details the high OFF Isolation provided by this family. At 10MHz, OFF Isolation is about 50dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease OFF Isolation due to the voltage divider action of the switch OFF Impedance and the load impedance. Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog-signal paths and V+ or V-. ISL84516, ISL84517 Typical Performance Curves TA = 25oC, VIH = V+, VIL = 0V, Unless Otherwise Specified 150 VCOM = (V+) -1V -40oC ICOM = 1mA 125 75 50 RON (Ω) RON (Ω) 100 25oC 85oC 25 -40oC 0 1 2 3 4 5 6 VS (±V) FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE 50 I = 1mA 45 COM 40 35 30 25 20 30 85oC 25 25oC 20 -40oC 15 10 30 25 85oC 20 15 -40oC 10 5 -5 -4 -3 VS = ±1.5V 85oC 25oC -40oC VS = ±3.3V VS = ±5V 25oC -2 -1 0 1 VCOM (V) 2 3 4 5 FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE 80 120 VCOM = (V+) -1V VCOM = (V+) -1V 100 VIN = 0 to V+ RL = 300Ω 85oC 100 VIN = 0 to V+ RL = 300Ω 70 85oC 60 tOFF (ns) tON (ns) 90 80 25oC 70 60 50 25oC 40 30 -40oC -40oC 50 20 40 10 30 1 2 3 4 5 1 6 2 3 4 5 FIGURE 10. TURN - OFF TIME vs SUPPLY VOLTAGE FIGURE 9. TURN - ON TIME vs SUPPLY VOLTAGE 3.5 40 3 30 2.5 20 2 10 1.5 Q (pC) VINH AND VINL (V) -40oC to 85oC VINH 1 0.5 VS = ±5V 0 VS = ±1.5V -10 VS = ±3.3V -20 0 -0.5 6 VS (±V) VS (±V) -30 VINL 1 -40 2 3 4 5 6 VS (±V) FIGURE 11. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE 7 -5 -4 -3 -2 -1 0 1 2 3 4 VCOM (V) FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE 5 ISL84516, ISL84517 10 VS = ±1.5V to ±5.5V 0 VS = ±1.5V to ±5.5V 20 RL = 50Ω GAIN 30 -6 40 OFF ISOLATION (dB) -3 PHASE 0 45 90 RL = 50Ω VIN = 0.2VP-P to 2VP-P (VS = ±1.5V) VIN = 0.2VP-P to 4VP-P (VS = ±3.3V) VIN = 0.2VP-P to 5VP-P (VS = ±5.5V) 1 135 PHASE (DEGREES) NORMALIZED GAIN (dB) Typical Performance Curves TA = 25oC, VIH = V+, VIL = 0V, Unless Otherwise Specified (Continued) 100 60 70 80 90 100 180 10 50 110 1k 600 10k 100k FREQUENCY (MHz) FIGURE 13. FREQUENCY RESPONSE 20 -40oC ICC (µA) 15 25oC 10 85oC 5 0 2 3 4 5 VS (±V) FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: ISL84516: 55 ISL84517: 55 PROCESS: Si Gate CMOS 8 10M FIGURE 14. OFF ISOLATION 25 1 1M FREQUENCY (Hz) 6 100M 500M ISL84516, ISL84517 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N INDEX AREA 0.25(0.010) M H 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- e µα A1 B 0.25(0.010) M C C A M B S 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 9 MILLIMETERS MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8o 0o N NOTES: MAX A1 e 0.10(0.004) MIN α 8 0o 8 7 8o Rev. 0 12/93 ISL84516, ISL84517 Small Outline Transistor Plastic Packages (SOT23-5) P5.064 D VIEW C e1 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES 5 SYMBOL 4 E CL 1 2 CL 3 e E1 b CL α 0.20 (0.008) M C C CL A A2 SEATING PLANE A1 -C- WITH b PLATING b1 c c1 MILLIMETERS MAX MIN MAX NOTES A 0.036 0.057 0.90 1.45 - A1 0.000 0.0059 0.00 0.15 - A2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 D 0.111 0.118 2.80 3.00 3 E 0.103 0.118 2.60 3.00 - E1 0.060 0.067 1.50 1.70 3 e 0.0374 Ref 0.95 Ref - e1 0.0748 Ref 1.90 Ref - L 0.10 (0.004) C MIN 0.014 0.022 0.35 0.55 L1 0.024 Ref. 0.60 Ref. L2 0.010 Ref. 0.25 Ref. N 5 5 4 5 R 0.004 - 0.10 - R1 0.004 0.010 0.10 0.25 α 0o 8o 0o 8o Rev. 2 9/03 NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 4X θ1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. R1 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 α L2 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. 4X θ1 VIEW C All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10