[AKD4612-A] AKD4612-A AK4612 Evaluation Board Rev.0 GENERAL DESCRIPTION AKD4612-A is an evaluation board for AK4612: 24bits, one-chip CODEC that includes 6 channels of ADC and 8 channels of DAC. AKD4612-A, it has the interface with the evaluation board of ADC and DAC of AKM’s, so it is easy to evaluate A/D and D/A. And also, AKD4612-A, it has the digital audio interface, so it is available to achieve the interface with the equipments of digital audio systems, via RCA connectors. Ordering guide AKD4612-A -- AK4612 Evaluation Board (I/F board for connecting with USB port of IBM-AT compatible PC control software are packed with this.) FUNCTION Clock generate circuits (x2, use AK4114) 2 types of digital audio interface - RCA/Opt (S/PDIF) input/Output - 10pin headers (x2) for the interface with external equipments RCA connectors for the external clock inputs 10pin header for serial control (register control) -12V +12V DVDD TVDD1 TVDD2 AVDD1 AVDD2 LDO (T2) +12V→+3.3V to Op-Amp LDO (T4) +12V→+3.3V SDTI 1～4 PORT2 PORT3 LDO (T3) +3.3V→+1.8V LIN1 Opt In RIN1 LIN2 AK4114 (DIR) Op-Amp RIN2 COAX In LIN3 RIN3 PORT1 from ±12V AK4612 LOUT1 EXT-MCLK EXT-BICK EXT-LRCK ROUT1 LOUT2 ROUT2 MCLK BICK LRCK Opt Out Op-Amp AK4114 (DIT) LOUT3 ROUT3 COAX Out LOUT4 ROUT4 PORT4 PORT5 (uP-I/F) SDTO 1～3 Figure 1. AKD4612-A Block Diagram (Note 1) Note 1. Circuit diagram and PCB layout are attached at the end of this manual. <KM105603> 2015/04 -1- [AKD4612-A] Evaluation Board Manual Operation sequence [1] The settings of the power supply lines [2] The settings of the jumper pins [3] The settings of the DIP switches [4] The settings of the toggle switches [5] The indications of the LEDs [6] The register control (The serial control) [7] The evaluation modes Refer to the following pages on the details. <KM105603> 2015/04 -2- [AKD4612-A] [1] The settings of the power supply lines Jack Names VOP PLUS Jack Colors Red Voltage Ranges +9+12V Typ Voltages +12V VOP MINUS Red -9-12V -12V AVDD1 Red +3.0+3.6V +3.3V Used for The power supply of the regulator, The plus terminal of the power supply of the OPAmp The minus terminal of the power supply of the OPAmp AVDD1 of AK4612 AVDD2 Red +3.0+3.6V +3.3V AVDD2 of AK4612 TVDD1 Red +3.3V TVDD1 of AK4612, The power supply of the level shifter TVDD2 Red +1.6+3.6V or +3.0+3.6V (Note 2) +1.6+3.6V +3.3V DVDD Red +1.6+2.0V +1.8V AK4612: TVDD2, The power supply of the level shifter DVDD of AK4612 VDD Red +3.0+3.6V +3.3V AGND DGND Black Black 0V 0V 0V 0V VDD of AK4114, The power supply of the level shifter, The power supply of the logic IC. Analog ground Digital ground Comments and attentions Should be always connected. Default Settings +12V Should be always connected. -12V When the regulator of 3.3V is used (JP99=REG side), this jack should be open. When the regulator of 3.3V is used (JP101=REG side), this jack should be open. When the regulator of 3.3V is used (JP97=REG side), this jack should be open. Open When the regulator of 3.3V is used (JP98=REG side), this jack should be open. When the regulator of 1.8V is used (JP96=REG side), this jack should be open. When the regulator of 3.3V is used (JP102=REG side), this jack should be open. Open Should be always connected. Should be always connected. 0V 0V Open Open Open Open Table 1. The settings of the power supply lines Note 2. The voltage range of TVDD1 is +1.6+3.6V on the Stereo Mode and the Normal Speed Mode, and +3.0+3.6V on the other modes. Note 3. The each supply lines should be distributed from the power supply units. <KM105603> 2015/04 -3- [AKD4612-A] [2] The settings of the jumper pins No 99 AVDD1 Names 101 AVDD2 97 TVDD1 98 TVDD2 96 DVDD 102 VDD 100 GND 92 AK4612-4-wire / I2C 93 CDTO / SDA (ACK) Functions The selection of the power supply to “AVDD1”. REG: Regulator “T2”. (Default) (When regulator “T2” is selected, power supply jack “AVDD1” should be open.) JACK: Power supply jack “AVDD1”. The selection of the power supply to “AVDD2”. REG: Regulator “T2”. (Default) (When regulator “T2” is selected, power supply jack “AVDD2” should be open.) JACK: Power supply jack “AVDD2”. The selection of the power supply to “TVDD1”. REG: Regulator “T4”. (Default) (When regulator “T4” is selected, power supply jack “TVDD1” should be open.) JACK: Power supply jack “TVDD1”. The selection of the power supply to “TVDD2”. REG: Regulator “T4”. (Default) (When regulator “T4” is selected, power supply jack “TVDD2” should be open.) JACK: Power supply jack “TVDD2”. The selection of the power supply to “DVDD”. REG: Regulator “T3”. (Default) (When regulator “T3” is selected, power supply jack “DVDD” should be open.) JACK: Power supply jack “DVDD”. The selection of the power supply to “VDD”. REG: Regulator “T4”. (Default) (When regulator “T4” is selected, power supply jack “VDD” should be open.) JACK: Power supply jack “VDD”. The selection of the connection / separation between analog ground and digital ground. Open: Separate analog ground from digital ground. (Default) Short: Connect analog ground to digital ground. The selection of “4-wire Serial Mode” / “I2C Bus Mode” of AK4612 (U1). 4-wire: “4-wire Serial Mode”. (Default) I2C: “I2C Bus Mode”. When “4-wire Serial Mode” is selected, “CDTO” should be selected at JP93 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “L” (“4-wire Serial Mode”). When “I2C Bus Mode” is selected, “SDA (ACK) ” should be selected at JP93 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “H” (“I2C Bus Mode”). The selection of “CDTO” (“4-wire Serial Mode”) / “SDA (ACK) ” (“I2C Bus Mode”). CDTO: “CDTO” (“4-wire Serial Mode”). (Default) SDA (ACK): “SDA (ACK)” (“I2C Bus Mode”). When “CDTO” (“4-wire Serial Mode”) is selected, “4-wire Serial Mode” should be selected at JP92 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “L” (“4-wire Serial Mode”). When “SDA (ACK) ” (“I2C Bus Mode”) is selected, “I2C Bus Mode” should be selected at JP92 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “H” (“I2C Bus Mode”). <KM105603> 2015/04 -4- [AKD4612-A] 65 AK4612-Master / Slave 94 RX 95 TX 1 XTI / MCKI 63 AK4612-XTI / MCKI 64 AK4612-BICK 66 AK4612-LRCK 67 DIR-AK4114-XTI 70 DIR-AK4114-BICK The selection of the direction of signal flow adapted to “Master Mode” / “Slave Mode” of AK4612 (U1) at level shifter (U16). Master: Direction of the signal flow adapted to “Master Mode” of AK4612 (U1). Slave: Direction of the signal flow adapted to “Slave Mode” of AK4612 (U1). (Default) When “Master Mode” is selected, Set No.4 pin (“M/S”) of DIP switch SW2 to “H” (“Master Mode”). When “Slave Mode” is selected, Set No.4 pin (“M/S”) of DIP switch SW2 to “L” (“Slave Mode”). The selection of the input to RX0 of DIR: AK4114 (U23). OPT: Optical connector. (Default). COAX: RCA connector (COAX). The selection of the output to TX1of DIT: AK4114 (U26). OPT: Optical connector. (Default). COAX: RCA connector (COAX). The selection of the input to XTI / MCKI of AK4612 (U1). Open: No input. Short: MCLK-Buffer. (Default) When the setting of JP63 is except “open”, and setting of JP1 is “short”, remove X’tal: X1. The selection of the input to buffer which outputs to XTI / MCKI of AK4612 (U1). BNC: EXT-MCLK. 10-pin: 10pin-MCLK. DIR: DIR-AK4114-MCKO1. DIT: DIT-AK4114-MCKO1. (Default) Open: No input. When the setting of JP63 is except “open”, and setting of JP1 is “short”, remove X’tal: X1. The selection of the input to buffer which outputs to BICK of AK4612 (U1). BNC: EXT-BICK. 10-pin: 10pin-BICK. DIR: DIR-AK4114-BICK. DIT: DIT-AK4114-BICK. (Default) Open: No input. The selection of the input to buffer which outputs to LRCK of AK4612 (U1). BNC: EXT-LRCK. 10-pin: 10pin-LRCK. DIR: DIR-AK4114-LRCK. DIT: DIT-AK4114-LRCK. (Default) Open: No input. The selection of the input to buffer which outputs to XTI of DIR: AK4114 (U23). BNC: EXT-MCLK. 10-pin: 10pin-MCLK. CODEC: AK4612-MCKO-Buffer. DIT: DIT-AK4114-MCKO1. Open: No input. (Default) When the setting of JP67 is except “open”, remove X’tal: X2. The selection of the input to buffer which outputs to BICK of DIR: AK4114 (U23). BNC: EXT-BICK. 10-pin: 10pin-BICK. CODEC: AK4612-BICK-Buffer. DIT: DIT-AK4114-BICK. (Default) Open: No input. <KM105603> 2015/04 -5- [AKD4612-A] 71 DIR-AK4114-LRCK 73 DIT-AK4114-XTI 75 DIT-AK4114-BICK 76 DIT-AK4114-LRCK 68 GND 72 GND 74 GND 69 BICK-THR / INV 201 SDTI1 202 SDTI2 203 SDTI3 The selection of the input to buffer which outputs to LRCK of DIR: AK4114 (U23). BNC: EXT-LRCK. 10-pin: 10pin-LRCK. CODEC: AK4612-LRCK-Buffer. DIT: DIT-AK4114-LRCK. (Default) Open: No input. The selection of the input to buffer which outputs to XTI of DIT: AK4114 (U26). BNC: EXT-MCLK. 10-pin: 10pin-MCLK. CODEC: AK4612-MCKO-Buffer. DIR: DIR-AK4114-MCKO1. Open: No input. (Default) When the setting of JP73 is except “open”, remove X’tal: X3. The selection of the input to buffer which outputs to BICK of DIT: AK4114 (U26). BNC: EXT-BICK. 10-pin: 10pin-BICK. CODEC: AK4612-BICK-Buffer. DIR: DIR-AK4114-BICK. Open: No input. (Default) The selection of the input to buffer which outputs to LRCK of DIT: AK4114 (U26). BNC: EXT-LRCK. 10-pin: 10pin-LRCK. CODEC: AK4612-LRCK-Buffer. DIR: DIR-AK4114-LRCK. Open: No input. (Default) The selection of the termination of the input to EXT-MCLK. Open: No termination. Short: 51Ω to GND. (Default) The selection of the termination of the input to EXT-BICK. Open: No termination. Short: 51Ω to GND. (Default) The selection of the termination of the input to EXT-LRCK. Open: No termination. Short: 51Ω to GND. (Default) The selection of the polarity (non-inverted output / inverted output) of 10pin-BICK outputs. THR: Non-inverted output. (Default) INV: Inverted output. The selection of the input to SDTI1 of AK4612 (U1). DIR: DIR-AK4114-SDTO. (Default) 10pin: 10pin-SDTI1. GND: Digital ground. The selection of the input to SDTI2 of AK4612 (U1). DIR: DIR-AK4114-SDTO. (Default) 10pin: 10pin-SDTI2. GND: Digital ground. The selection of the input to SDTI3 of AK4612 (U1). DIR: DIR-AK4114-SDTO. (Default) 10pin: 10pin-SDTI3. GND: Digital ground. <KM105603> 2015/04 -6- [AKD4612-A] 204 SDTI4 207 SDTO 2 LIN1 (LIN1+ / LIN1-) 3 LIN1+ / LIN1 4 LIN1- 5 GND 6 RIN1 (RIN1+ / RIN1-) 7 RIN1+ / RIN1 8 RIN1- 9 GND 10 LIN2 (LIN2+ / LIN2-) 11 LIN2+ / LIN2 12 LIN2- 13 GND 14 RIN2 (RIN2+ / RIN2-) 15 RIN2+ / RIN2 The selection of the input to SDTI4 of AK4612 (U1). DIR: DIR-AK4114-SDTO. (Default) 10pin: 10pin-SDTI4. GND: Digital ground. The selection of the input to DAUX of DIT: AK4114 (U26). SDTO1: AK4612-SDTO1 / 10pin-SDTO1. (Default) SDTO2: AK4612-SDTO2 / 10pin-SDTO2. SDTO3: AK4612-SDTO3 / 10pin-SDTO3. Open: Connect a pin of DIT-AK4114-DAUX input side of JP207 to digital ground with the clip. Connect no signal. The selection of the input to LIN1 (LIN1+ / LIN1-). SINGLE: LIN1 (Single-End). DIFF: LIN1 (Differential). (Default) The selection of the input to LIN1+ / LIN1. SINGLE: LIN1 (Single-End). DIFF: LIN1+ (Differential). (Default) The selection of the input to LIN1-. Open: None (Single-End). Short: LIN1- (Differential). (Default) The selection of the termination of the input to LIN1-. Open: None. (Default) Fix to “Open” setting. The selection of the input to RIN1 (RIN1+ / RIN1-). SINGLE: RIN1 (Single-End). DIFF: RIN1 (Differential). (Default) The selection of the input to RIN1+ / RIN1. SINGLE: RIN1 (Single-End). DIFF: RIN1+ (Differential). (Default) The selection of the input to RIN1-. Open: None (Single-End). Short: RIN1- (Differential). (Default) The selection of the termination of the input to RIN1-. Open: None. (Default) Fix to “Open” setting. The selection of the input to LIN2 (LIN2+ / LIN2-). SINGLE: LIN2 (Single-End). DIFF: LIN2 (Differential). (Default) The selection of the input to LIN2+ / LIN2. SINGLE: LIN2 (Single-End). DIFF: LIN2+ (Differential). (Default) The selection of the input to LIN2-. Open: None (Single-End). Short: LIN2- (Differential). (Default) The selection of the termination of the input to LIN2-. Open: None. (Default) Fix to “Open” setting. The selection of the input to RIN2 (RIN2+ / RIN2-). SINGLE: RIN2 (Single-End). DIFF: RIN2 (Differential). (Default) The selection of the input to RIN2+ / RIN2. SINGLE: RIN2 (Single-End). DIFF: RIN2+ (Differential). (Default) <KM105603> 2015/04 -7- [AKD4612-A] 16 RIN2- 17 GND 18 LIN3 (LIN3+ / LIN3-) 19 LIN3+ / LIN3 20 LIN3- 21 GND 22 RIN3 (RIN3+ / RIN3-) 23 RIN3+ / RIN3 24 RIN3- 25 GND 26 VA 27 LOUT1+ / LOUT1 28 LOUT1- 29 LOUT1 30 ROUT1+ / ROUT1 31 ROUT1- 32 ROUT1 The selection of the input to RIN2-. Open: None (Single-End). Short: RIN2- (Differential). (Default) The selection of the termination of the input to RIN2-. Open: None. (Default) Fix to “Open” setting. The selection of the input to LIN3 (LIN3+ / LIN3-). SINGLE: LIN3 (Single-End). DIFF: LIN3 (Differential). (Default) The selection of the input to LIN3+ / LIN3. SINGLE: LIN3 (Single-End). DIFF: LIN3+ (Differential). (Default) The selection of the input to LIN3-. Open: None (Single-End). Short: LIN3- (Differential). (Default) The selection of the termination of the input to LIN3-. Open: None. (Default) Fix to “Open” setting. The selection of the input to RIN3 (RIN3+ / RIN3-). SINGLE: RIN3 (Single-End). DIFF: RIN3 (Differential). (Default) The selection of the input to RIN3+ / RIN3. SINGLE: RIN3 (Single-End). DIFF: RIN3+ (Differential). (Default) The selection of the input to RIN3-. Open: None (Single-End). Short: RIN3- (Differential). (Default) The selection of the termination of the input to RIN3-. Open: None. (Default) Fix to “Open” setting. The selection of AIN-bias. Open: AIN-bias = 0V. Short: AIN-bias = 1/2 x AVDD1 = 1/2 x AVDD2. (Default) The selection of the output from LOUT1+ / LOUT1. SINGLE: LOUT1 (Single-End). DIFF: LOUT1+ (Differential). (Default) The selection of the output from LOUT1-. Open: None (Single-End). Short: LOUT1- (Differential). (Default) The selection of the output from LOUT1. SINGLE: LOUT1 (Single-End). DIFF: LOUT1 (Differential). (Default) The selection of the output from ROUT1+ / ROUT1. SINGLE: ROUT1 (Single-End). DIFF: ROUT1+ (Differential). (Default) The selection of the output from ROUT1-. Open: None (Single-End). Short: ROUT1- (Differential). (Default) The selection of the output from ROUT1. SINGLE: ROUT1 (Single-End). DIFF: ROUT1 (Differential). (Default) <KM105603> 2015/04 -8- [AKD4612-A] 33 LOUT2+ / LOUT2 34 LOUT2- 35 LOUT2 36 ROUT2+ / ROUT2 37 ROUT2- 38 ROUT2 39 LOUT3+ / LOUT3 40 LOUT3- 41 LOUT3 42 ROUT3+ / ROUT3 43 ROUT3- 44 ROUT3 45 LOUT4+ / LOUT4 46 LOUT4- 47 LOUT4 The selection of the output from LOUT2+ / LOUT2. SINGLE: LOUT2 (Single-End). DIFF: LOUT2+ (Differential). (Default) The selection of the output from LOUT2-. Open: None (Single-End). Short: LOUT2- (Differential). (Default) The selection of the output from LOUT2. SINGLE: LOUT2 (Single-End). DIFF: LOUT2 (Differential). (Default) The selection of the output from ROUT2+ / ROUT2. SINGLE: ROUT2 (Single-End). DIFF: ROUT2+ (Differential). (Default) The selection of the output from ROUT2-. Open: None (Single-End). Short: ROUT2- (Differential). (Default) The selection of the output from ROUT2. SINGLE: ROUT2 (Single-End). DIFF: ROUT2 (Differential). (Default) The selection of the output from LOUT3+ / LOUT3. SINGLE: LOUT3 (Single-End). DIFF: LOUT3+ (Differential). (Default) The selection of the output from LOUT3-. Open: None (Single-End). Short: LOUT3- (Differential). (Default) The selection of the output from LOUT3. SINGLE: LOUT3 (Single-End). DIFF: LOUT3 (Differential). (Default) The selection of the output from ROUT3+ / ROUT3. SINGLE: ROUT3 (Single-End). DIFF: ROUT3+ (Differential). (Default) The selection of the output from ROUT3-. Open: None (Single-End). Short: ROUT3- (Differential). (Default) The selection of the output from ROUT3. SINGLE: ROUT3 (Single-End). DIFF: ROUT3 (Differential). (Default) The selection of the output from LOUT4+ / LOUT4. SINGLE: LOUT4 (Single-End). DIFF: LOUT4+ (Differential). (Default) The selection of the output from LOUT4-. Open: None (Single-End). Short: LOUT4- (Differential). (Default) The selection of the output from LOUT4. SINGLE: LOUT4 (Single-End). DIFF: LOUT4 (Differential). (Default) <KM105603> 2015/04 -9- [AKD4612-A] 48 ROUT4+ / ROUT4 49 ROUT4- 50 ROUT4 The selection of the output from ROUT4+ / ROUT4. SINGLE: ROUT4 (Single-End). DIFF: ROUT4+ (Differential). (Default) The selection of the output from ROUT4-. Open: None (Single-End). Short: ROUT4- (Differential). (Default) The selection of the output from ROUT4. SINGLE: ROUT4 (Single-End). DIFF: ROUT4 (Differential). (Default) Table 2. The settings of the jumper pins <KM105603> 2015/04 - 10 - [AKD4612-A] [3] The settings of the DIP switches (1). The settings of SW2 (Settings of AK4612 (U1)) Set up the Chip Address Select (CAD1, CAD0), Serial Control Mode Select (4-wire Serial / I2C Bus), Master /Slave Mode Select and DAC output control (VCOM / Hi-z) of AK4612 (U1) by SW2. About the setting of default, please refer to Table 4. SW2 No. 1 2 Names CAD0 CAD1 3 I2C 4 M/S 5 DVMPD 6 7 8 NC NC NC ON (“H”) OFF (“L”) Chip Address Select Serial Control Mode Select L: 4-wire Serial (Default) H: I2C Bus Master /Slave Mode Select L: Slave Mode (Default) H: Master Mode DAC output control L: VCOM voltage (Default) H: Hi-z Default L L L L L L L L N/A Table 3. The settings of SW2 <KM105603> 2015/04 - 11 - [AKD4612-A] (2). The settings of SW4 (Settings of DIR: AK4114 (U23)) ON is “H”, OFF is “L”. The setting of default (Slave mode, 24bit I2S Compatible) is as follows. (Please refer to Table 5.) SW4 No. 1 2 3 4 Mode 0 1 2 3 4 5 6 7 Names DIF2 DIF1 DIF0 CM1 5 CM0 6 7 8 OCKS1 OCKS0 NC DIF2 pin L L L L H H H H ON (“H”) OFF (“L”) Default H H H L AK4114 Output Audio Interface Format Setting Please refer to Table 6. AK4114 Clock Mode Setting CM1=L, CM0=H: X’tal Mode CM1=L, CM0=L: PLL Mode (Default) AK4114 Master Clock Frequency Setting Please refer to Table 7. N/A Table 4. The settings of SW4 LRCK BICK DIF1 DIF0 SDTO Formats pin pin I/O L L 16bit, Right justified H/L O 64fs L H 18bit, Right justified H/L O 64fs H L 20bit, Right justified H/L O 64fs H H 24bit, Right justified H/L O 64fs L L 24bit, Left justified H/L O 64fs L H 24bit, I2S Compatible L/H O 64fs H L 24bit, Left justified H/L I 64-128fs H H 24bit, I2S Compatible L/H I 64-128fs Table 5. The settings of AK4114 Output Audio Interface Formats L H L L I/O O O O O O O I I (Default) OCKS1 OCKS0 MCKO1 fs (max) pin pin 0 L L 256fs 96 kHz 1 L H 256fs 96 kHz 2 H L 512fs 48 kHz (Default) 3 H H 128fs 192 kHz Table 6. The settings of AK4114 Master Clock Frequencies Mode <KM105603> 2015/04 - 12 - [AKD4612-A] (3). The settings of SW6 (Settings of DIT: AK4114 (U26)) ON is “H”, OFF is “L”. The setting of default (Master mode, 24bit I2S Compatible) is as follows. (Please refer to Table 8.) SW5 No. 1 2 3 4 DIF2 DIF1 DIF0 CM1 5 CM0 6 7 8 OCKS1 OCKS0 NC Mode 0 1 2 3 4 5 6 7 Names ON (“H”) OFF (“L”) Default H L H L AK4114 Input Audio Interface Format Setting Please refer to Table 9. AK4114 Clock Mode Setting CM1=L, CM0=H: X’tal Mode (Default) CM1=L, CM0=L: PLL Mode AK4114 Master Clock Frequency Setting Please refer to Table 10. N/A Table 7. The settings of SW6 LRCK BICK DIF2 DIF1 DIF0 DAUX Formats pin pin pin I/O L L L 24bit, Left justified H/L O 64fs L L H 24bit, Left justified H/L O 64fs L H L 24bit, Left justified H/L O 64fs L H H 24bit, Left justified H/L O 64fs H L L 24bit, Left justified H/L O 64fs H L H 24bit, I2S Compatible L/H O 64fs H H L 24bit, Left justified H/L I 64-128fs H H H 24bit, I2S Compatible L/H I 64-128fs Table 8. The settings of AK4114 Input Audio Interface Formats H H L L I/O O O O O O O I I (Default) OCKS1 OCKS0 MCKO1 fs (max) pin pin 0 L L 256fs 96 kHz 1 L H 256fs 96 kHz 2 H L 512fs 48 kHz (Default) 3 H H 128fs 192 kHz Table 9. The settings of AK4114 Master Clock Frequencies Mode <KM105603> 2015/04 - 13 - [AKD4612-A] [4] The settings of the toggle switches The settings of SW3, SW5, SW7 The power down switch of AK4612 (U1). AK4612 (U1) should be reset once bringing this “L” upon power-up. SW3 PDN-AK4612 Keep “H” during normal operation. The power down switch of DIR: AK4114 (U23). SW5 PDN-DIR-AK4114 DIR: AK4114 (U23) should be reset once bringing this “L” upon power-up. Keep “H” during normal operation. Keep “L” when DIR: AK4114 (U23) is not used. The power down switch of DIT: AK4114 (U26). SW7 PDN-DIT-AK4114 DIT: AK4114 (U26) should be reset once bringing this “L” upon power-up. Keep “H” during normal operation. Keep “L” when DIT: AK4114 (U26) is not used. Table 10. The settings of SW3, SW5, SW7 [5] The indications of the LEDs The indication of LED1 LED1 INT0 The output of INT0 pin of the DIR: AK4114 (U23). Turns on when DIR: AK4114 (U23) is unlocked. Table 11. The indication of LED1 <KM105603> 2015/04 - 14 - [AKD4612-A] [6] The register control (The serial control) The AKDUSBIF-B is connected to a PC with a USB cable and to an evaluation board with the 10pin flat cable installed in the AKDUSBIF-B (Note 4, Note 5). Note 4. Only one AKDUSBIF-B can be connected to a PC. It cannot operate when connecting more than two AKDUSBIF-B’s. Note 5. The red line of the 10pin flat cable should be connected with the 1pin of the 10pin Header of an evaluation board. Evaluation Board AKDXXXX-YY 10pin Flat Cable AKDUSBIF-B PC Device AKXXXX USB Cable USB Connector Set Red line to No.1 pin side. 10pin Connector Figure 2. Connection via the AKDUSBIF-B PC Evaluation Board AKDUSBIF-B Figure 3. AKDUSBIF-B <KM105603> 2015/04 - 15 - [AKD4612-A] [7] The evaluation modes (1) The evaluation mode of ADCDAC (Analog Analog) by the internal loop back (1)-1. Master mode (2) The evaluation mode of ADCDAC (Analog Analog) by the external loop back with the jumper pins or 10 pin header (10 pin port, 10 pin connector) and the clips (2)-1. Master mode (3) The evaluation mode of ADCDAC (Analog Analog) by the external loop back with the external DIT: AK4114 (U26) and the external DIR: AK4114 (U23) (3)-1. Master mode (3)-2. Slave mode (Default) (4) The evaluation mode of ADC (Analog Digital) with the external DIT: AK4114 (U26) (4)-1. Master mode (4)-2. Slave mode (5) The evaluation mode of DAC (Digital Analog) with the external DIR: AK4114 (U23) (5)-1. Master mode (5)-2. Slave mode (6) The evaluation mode of ADC (Analog Digital) with the external clocks (6)-1. Slave mode (7) The evaluation mode of DAC (Digital Analog) with the external clocks (7)-1. Slave mode <KM105603> 2015/04 - 16 - [AKD4612-A] (1) The evaluation mode of ADCDAC (Analog Analog) by the internal loop back (1)-1. Master mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ - Not use ○ ○ - Removed - ○ ○ ○ ○ Clock sources External clock - X’tal ○ - PLL - Modes Master ○ - Slave - Table 12. Use / Not use of the devices (parts) and the modes of using Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX - Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector Use Not use - ○ ○ ○ - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - Table 13. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master ○ Slave - Short Open - ○ CODEC DIR DIT BNC 10-pin Open - - - - - ○ ○ ○ ○ ○ ○ ○ ○ ○ Table 14. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 17 - [AKD4612-A] JP207 (SDTO) should be open. Jumper pins JP207 (SDTO) Always JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) Always Always Always Always SDTO1 - SDTO2 - SDTO3 Open ○ (Note 6) DIR 10-pin GND Open - - ○ ○ ○ ○ - Table 15. The settings of the jumper pins (digital inputs / digital outputs) Note 6. Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values H H H H L H H H H L H Functions Master Mode Slave Mode, 24bit I2S Compatible X’tal Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 16. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L L Functions Power downPower up Power down Power down Table 17. The settings of the toggle switches <KM105603> 2015/04 - 18 - [AKD4612-A] Start up the control software, click “Write default” button, write the default value, and write the settings as follows. (The values except the settings as follows are default.) Register addresses 08H 08H Bits D7 D6 Signal name LOOP1 LOOP0 Values 0 01 Functions Normal OperationLoop Back Mode Table 18. The settings of the registers The combinations of the settings of the registers and analog inputs / analog outputs paths are as follows. Combinations 1 Settings of the registers LOOP1, LOOP0=0,1 Analog inputs / analog outputs paths LIN1LOUT1, LOUT2 RIN1ROUT1, ROUT2 LIN2LOUT3, LOUT4 RIN2ROUT3, ROUT4 Table 19. The combinations of the settings of the registers and analog inputs / analog outputs paths <KM105603> 2015/04 - 19 - [AKD4612-A] (2) The evaluation mode of ADCDAC (Analog Analog) by the external loop back with the jumper pins or 10 pin header (10 pin port, 10 pin connector) and the clips (2)-1. Master mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ - Not use ○ ○ - Removed - ○ ○ Clock sources External clock - X’tal ○ - Modes Master ○ - PLL - Slave - ○ ○ Table 20. Use / Not use of the devices (parts) and the modes of using Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connrctor PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX - Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector Use Not use - ○ ○ ○ - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - Table 21. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master ○ Slave - Short Open - ○ CODEC DIR DIT BNC 10-pin Open - - - - - ○ ○ ○ ○ ○ ○ ○ ○ ○ Table 22. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 20 - [AKD4612-A] Connect the jumper pins of digital outputs (3pins) and the jumper pins of digital inputs (6pins) by the clips. Jumper pins of digital outputs (3pins) (1) SDTO1 pin (U20 side pin of JP207 (SDTO)) (2) SDTO2 pin (U20 side pin of JP207 (SDTO)) (3) SDTO3 pin (U20 side pin of JP207 (SDTO)) Jumper pins of digital inputs (6pins) (1) SDTI1 pin (U19 side pin of JP201 (SDTI1)) (2) SDTI2 pin (U19 side pin of JP202 (SDTI2)) (3) SDTI3 pin (U19 side pin of JP203 (SDTI3)) (4) SDTI4 pin (U19 side pin of JP204 (SDTI4)) Table 23. The connections of the jumper pins by the clips (digital inputs / digital outputs) JP207 (SDTO) should be open. JP201 (SDTI1), JP202 (SDTI2), JP203 (SDTI3), JP204 (SDTI4) should be open on signal input. Jumper pins JP207 (SDTO) Always JP201 (SDTI1) SDTO1 - SDTO2 - SDTO3 - Open ○ (Note 7) DIR 10-pin GND Open SDTI1 input - - - JP202 (SDTI2) No input SDTI2 input - - ○ - ○ (Note 8) - JP203 (SDTI3) No input SDTI3 input - - ○ - JP204 (SDTI4) No input SDTI4 input - - ○ - No input - - ○ ○ (Note 8) ○ (Note 8) ○ (Note 8) - Table 24. The settings of the jumper pins (digital inputs / digital outputs) Note 7. Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Note 8. Connect the jumper pins of digital outputs (3pins) and the jumper pins of digital inputs (6pins) by the clips. (Please refer to Table 24. The connections of the jumper pins by the clips (digital inputs / digital outputs)) <KM105603> 2015/04 - 21 - [AKD4612-A] Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values H H H H L H H H H L H Functions Master Mode Slave Mode, 24bit I2S Compatible X’tal Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 25. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L L Functions Power downPower up Power down Power down Table 26. The settings of the toggle switches <KM105603> 2015/04 - 22 - [AKD4612-A] Starts up the control software, click “Write default” button, write the default value. The combinations of the connections of the jumper pins by the clips and analog inputs / analog outputs paths are as follows. Combinations 1 2 Connections of the jumper pins by the clips SDTO1SDTI1 SDTO2SDTI2 SDTO3SDTI3 SDTO1SDTI1, SDTI2, SDTI3, SDTI4, Analog input / analog output paths LIN1LOUT1 RIN1ROUT1 LIN2LOUT2 RIN2ROUT2 LIN3LOUT3 RIN3ROUT3 LIN1LOUT1, LOUT2, LOUT3, LOUT4 RIN1ROUT1, ROUT2, ROUT3, ROUT4 Table 27. The combinations of the connections of the jumper pins by the clips and analog inputs / analog outputs paths <KM105603> 2015/04 - 23 - [AKD4612-A] (3) The evaluation mode of ADCDAC (Analog Analog) by the external loop back with the external DIT: AK4114 (U26) and the external DIR: AK4114 (U23) (3)-1. Master mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ ○ ○ - Not use - Removed - ○ ○ Clock sources External clock ○ X’tal ○ - PLL ○ - Modes Master ○ - Slave ○ ○ ○ ○ Table 28. Use / Not use of the devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ ○ COAX - Use Not use PORT6 (RX: OPT) Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector External BNC connector ○ - ○ ○ ○ - - ○ - - - - ○ - ○ - - - - - - ○ - - - - - - - ○ - - - - - - - Table 29. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 24 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ ○ Use Not use Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - ○ - - - - ○ - - ○ - - - ○ - - - - Table 30. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master ○ Slave - Short Open - ○ CODEC DIR DIT BNC 10-pin Open - - - - - ○ ○ ○ ○ - ○ ○ ○ ○ ○ Table 31. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 25 - [AKD4612-A] Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 output SDTO2 output SDTO3 output SDTI1 input No input SDTI2 input No input SDTI3 input No input SDTI4 input No input SDTO1 ○ - SDTO2 ○ - SDTO3 ○ Open - DIR 10-pin ○ - - ○ ○ ○ - GND Open - - ○ ○ ○ ○ Table 32. The settings of the jumper pins (digital inputs / digital outputs) Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values H H H H L L H H H L H Functions Master Mode Slave Mode, 24bit I2S Compatible PLL Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 33. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH LH LH Functions Power downPower up Power downPower up Power downPower up Table 34. The settings of the toggle switches <KM105603> 2015/04 - 26 - [AKD4612-A] Start up the control software, click “Write default” button, write the default value, and write the settings as follows. (The values except the settings as follows are default.) Register addresses 04H Bits D6 Signal names MCKO Values 01 Functions MCKO: no signal MCLK output Table 35. The settings of the registers The combinations of the settings of the jumper pins and analog inputs / analog outputs paths are as follows. Combinations 1 Settings of the jumper pins JP207 (SDTO)=SDTO1 JP201 (SDTI1)=DIR JP202 (SDTI2)=DIR JP203 (SDTI3)= DIR JP204 (SDTI4)= DIR Analog inputs / analog outputs paths LIN1LOUT1, LOUT2, LOUT3, LOUT4 RIN1ROUT1, ROUT2, ROUT3, ROUT4 Table 36. The combinations of the settings of the jumper pins and analog inputs / analog outputs paths <KM105603> 2015/04 - 27 - [AKD4612-A] (3)-2. Slave mode (Default) Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ ○ ○ Not use ○ ○ - Removed ○ ○ - Clock sources External clock ○ - X’tal ○ PLL ○ - Modes Master ○ Slave ○ ○ - Table 37. Use / Not use of devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ ○ COAX - Use Not use PORT6 (RX: OPT) Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector External BNC connector ○ - ○ ○ ○ - - ○ - - - - ○ - ○ - - - - - - ○ - - - - - - - ○ - - - - - - - Table 38. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 28 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ ○ Use Not use Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - ○ - - - - ○ - - ○ - - - ○ - - - - Table 39. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - ○ ○ ○ - - - - ○ ○ - ○ ○ ○ ○ Table 40. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 29 - [AKD4612-A] Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 output SDTO2 output SDTO3 output SDTI1 input No input SDTI2 input No input SDTI3 input No input SDTI4 input No input SDTO1 ○ - SDTO2 ○ - SDTO3 ○ Open - DIR 10-pin ○ - - ○ ○ ○ - GND Open - - ○ ○ ○ ○ Table 41. The settings of the jumper pins (digital inputs / digital outputs) Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values L H H H L L H L H L H Functions Slave Mode Slave Mode, 24bit I2S Compatible PLL Mode Master Mode, 24bit I2S Compatible X’tal Mode Table 42. The settings of the DIP switches Switch on the power supply unit, and do the setting of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH LH LH Functions Power downPower up Power downPower up Power downPower up Table 43. The settings of the toggle switches <KM105603> 2015/04 - 30 - [AKD4612-A] Starts up the control software, click “Write default” button, write the default value. The combinations of the settings of the jumper pins and analog inputs / analog outputs paths are as follows. Combinations 1 Settings of the jumper pins JP207 (SDTO)=SDTO1 JP201 (SDTI1)=DIR JP202 (SDTI2)=DIR JP203 (SDTI3)= DIR JP204 (SDTI4)= DIR Analog inputs / analog outputs paths LIN1LOUT1, LOUT2, LOUT3, LOUT4 RIN1ROUT1, ROUT2, ROUT3, ROUT4 Table 44. The combinations of the settings of the jumper pins and analog inputs / analog outputs paths <KM105603> 2015/04 - 31 - [AKD4612-A] (4) The evaluation mode of ADC (Analog Digital) with the external DIT: AK4114 (U26) (4)-1. Master mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ ○ - Not use ○ - Removed - ○ ○ Clock sources External clock ○ X’tal ○ - PLL - Modes Master ○ - Slave ○ ○ ○ Table 45. Use / Not use of the devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ COAX - PORT6 (RX: OPT) Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector External BNC connector Use Not use ○ - ○ ○ - ○ - - - - - - ○ - - - - - ○ - - ○ - - - - - - - ○ - - - - - - - Table 46. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 32 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ Use Not use PORT6 (RX: OPT) PORT7 (TX: OPT) Destinations of the connections J22 J23 External (RX: (TX: optical COAX) COAX) connector External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - ○ - - - - - - ○ - Table 47. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master ○ Slave - Short Open - ○ CODEC DIR DIT BNC 10-pin Open - - - - - ○ ○ ○ ○ ○ ○ - ○ ○ ○ Table 48. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 33 - [AKD4612-A] Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 output SDTO2 output SDTO3 output Always Always Always Always SDTO1 ○ - SDTO2 ○ - SDTO3 ○ Open - DIR 10-pin GND Open - - ○ ○ ○ ○ - Table 49. The settings of the jumper pins (digital inputs / digital outputs) Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values H H H H L H H H H L H Functions Master Mode Slave Mode, 24bit I2S Compatible X’tal Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 50. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L LH Functions Power downPower up Power down Power downPower up Table 51. The settings of the toggle switches <KM105603> 2015/04 - 34 - [AKD4612-A] Start up the control software, click “Write default” button, write the default value, and write the settings as follows. (The values except the settings as follows are default.) Register addresses 04H Bits D6 Signal names MCKO Values 01 Functions MCKO: no signal MCLK output Table 52. The settings of the registers The combinations of the settings of the jumper pins and analog inputs / digital outputs paths are as follows. Combinations 1 Settings of the jumper pins JP207 (SDTO)=SDTO1 2 JP207 (SDTO)=SDTO2 3 JP207 (SDTO)=SDTO3 Analog inputs / digital outputs paths LIN1SDTO1-Lch RIN1SDTO1-Rch LIN2SDTO2-Lch RIN2SDTO2-Rch LIN3SDTO3-Lch RIN3SDTO3-Rch Table 53. The combinations of the settings of the jumper pins and analog inputs / digital outputs paths <KM105603> 2015/04 - 35 - [AKD4612-A] (4)-2. Slave mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ ○ Not use ○ ○ ○ - Removed ○ ○ - Clock sources External clock ○ - X’tal ○ PLL - Modes Master ○ Slave ○ - Table 54. Use / Not use of the devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ COAX - PORT6 (RX: OPT) Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector External BNC connector Use Not use ○ - ○ ○ - ○ - - - - - - ○ - - - - - ○ - - ○ - - - - - - - ○ - - - - - - - Table 55. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 36 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ Use Not use PORT6 (RX: OPT) PORT7 (TX: OPT) Destinations of the connections J22 J23 External (RX: (TX: optical COAX) COAX) connector External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - ○ - - - - - - ○ - Table 56. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - ○ ○ ○ - - - ○ ○ ○ ○ ○ ○ Table 57. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 37 - [AKD4612-A] Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 output SDTO2 output SDTO3 output Always Always Always Always SDTO1 ○ - SDTO2 ○ - SDTO3 ○ Open - DIR 10-pin GND Open - - ○ ○ ○ ○ - Table 58. The settings of the jumper pins (digital inputs / digital outputs) Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values L H H H L H H L H L H Functions Slave Mode Slave Mode, 24bit I2S Compatible X’tal Mode Master Mode, 24bit I2S Compatible X’tal Mode Table 59. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L LH Functions Power downPower up Power down Power downPower up Table 60. The settings of the toggle switches <KM105603> 2015/04 - 38 - [AKD4612-A] Starts up the control software, click “Write default” button, write the default value. The combinations of the settings of the jumper pins and analog inputs / digital outputs paths are as follows. Combinations 1 Settings of the jumper pins JP207 (SDTO)=SDTO1 2 JP207 (SDTO)=SDTO2 3 JP207 (SDTO)=SDTO3 Analog inputs / digital outputs paths LIN1SDTO1-Lch RIN1SDTO1-Rch LIN2SDTO2-Lch RIN2SDTO2-Rch LIN3SDTO3-Lch RIN3SDTO3-Rch Table 61. The combinations of the settings of the jumper pins and analog inputs / digital outputs paths <KM105603> 2015/04 - 39 - [AKD4612-A] (5) The evaluation mode of DAC (Digital Analog) with the external DIR: AK4114 (U23) (5)-1. Master mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ - Not use ○ ○ ○ ○ Removed ○ ○ ○ Clock sources External clock ○ - X’tal - PLL ○ - Modes Master ○ - Slave ○ - Table 62. Use / Not use of the devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ - COAX - PORT6 (RX: OPT) Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector External BNC connector Use Not use ○ - ○ ○ ○ - - - - - ○ - - - - - - - - - - ○ - - - - - - - ○ - - - - - - - Table 63. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 40 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ - Use Not use Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - ○ - - - - - - ○ - ○ - - - - - - - Table 64. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master ○ Slave - Short Open ○ - CODEC DIR DIT BNC 10-pin - ○ - - - - ○ ○ - Open ○ ○ ○ ○ ○ ○ Table 65. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 41 - [AKD4612-A] JP207 (SDTO) should be open. Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 - Always SDTO2 - SDTO3 - Open ○ (Note 9) SDTI1 input No input SDTI2 input No input SDTI3 input No input SDTI4 input No input DIR 10-pin GND Open ○ - - - - ○ ○ ○ - ○ ○ ○ ○ Table 66. The settings of the jumper pins (digital inputs / digital outputs) Note 9.Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values H H H H L L H H H L H Functions Master Mode Slave Mode, 24bit I2S Compatible PLL Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 67. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH LH L Functions Power downPower up Power downPower up Power down Table 68. The settings of the toggle switches <KM105603> 2015/04 - 42 - [AKD4612-A] Starts up the control software, click “Write default” button, write the default value. The combinations of settings of jumper pins and digital inputs / analog outputs paths are as follows. Combinations 1 Settings of the jumper pins JP201 (SDTI1)=DIR JP202 (SDTI2)=DIR JP203 (SDTI3)= DIR JP204 (SDTI4)= DIR Digital inputs / analog outputs paths SDTI1-LchLOUT1 SDTI1-RchROUT1 SDTI2-LchLOUT2 SDTI2-RchROUT2 SDTI3-LchLOUT3 SDTI3-RchROUT3 SDTI4-LchLOUT4 SDTI4-RchROUT4 Table 69. The combinations of settings of the jumper pins and digital inputs / analog outputs paths <KM105603> 2015/04 - 43 - [AKD4612-A] (5)-2. Slave mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ ○ - Not use ○ ○ ○ ○ Removed ○ ○ ○ Clock sources External clock ○ - X’tal - PLL ○ - Modes Master ○ - Slave ○ - Table 70. Use / Not use of the devices (parts) and the modes of using (a). In case of using optical cable and optical connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT ○ - COAX - PORT6 (RX: OPT) PORT7 (TX: OPT) Destinations of the connections J22 J23 External (RX: (TX: optical COAX) COAX) connector External BNC connector Use Not use ○ - ○ ○ ○ - - - - - ○ - - ○ - - - - - - - ○ - - - - - - - ○ - - - - - - - Table 71. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections <KM105603> 2015/04 - 44 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector Jumper pins Cables Connectors JP94 (RX) JP95 (TX) Optical cable BNC cable BNC-RCA conversion connector PORT6 (RX: OPT) PORT7 (TX: OPT) J22 (RX: COAX) J23 (TX: COAX) OPT - COAX ○ - Use Not use Destinations of the connections PORT7 J22 J23 External (TX: (RX: (TX: optical OPT) COAX) COAX) connector PORT6 (RX: OPT) External BNC connector ○ ○ ○ - - ○ - - - - - - - ○ - - - - - - ○ - - - - - - ○ - ○ - - - - - - - Table 72. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections (c). Other common setting Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - ○ ○ ○ - - - - ○ ○ ○ ○ ○ ○ Table 73. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 45 - [AKD4612-A] JP207 (SDTO) should be open. Jumper pins JP207 (SDTO) SDTO1 - Always SDTO2 - SDTO3 - Open ○ DIR 10-pin ○ - - GND Open - - (Note 10) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTI1 input No input SDTI2 input No input SDTI3 input No input SDTI4 input No input ○ ○ ○ - ○ ○ ○ ○ Table 74. The settings of the jumper pins (digital inputs / digital outputs) Note 10. Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values L H L H L L H H H L H Functions Slave Mode Master Mode, 24bit I2S Compatible PLL Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 75. The settings of the DIP switches Switch on the power supply units, and do the settings of the toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH LH L Functions Power downPower up Power downPower up Power down Table 76. The settings of the toggle switches <KM105603> 2015/04 - 46 - [AKD4612-A] Starts up the control software, click “Write default” button, write the default value. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths are as follows. Combinations 1 Settings of the jumper pins JP201 (SDTI1)=DIR JP202 (SDTI2)=DIR JP203 (SDTI3)= DIR JP204 (SDTI4)= DIR Digital inputs / analog outputs paths SDTI1-LchLOUT1 SDTI1-RchROUT1 SDTI2-LchLOUT2 SDTI2-RchROUT2 SDTI3-LchLOUT3 SDTI3-RchROUT3 SDTI4-LchLOUT4 SDTI4-RchROUT4 Table 77. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths <KM105603> 2015/04 - 47 - [AKD4612-A] (6) The evaluation mode of ADC (Analog Digital) with the external clocks (6)-1. Slave mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ - Not use ○ ○ ○ ○ ○ Clock sources External clock ○ - Removed ○ ○ ○ X’tal - Modes Master - PLL - Slave ○ - Table 78. Use / Not use of the devices (parts) and the modes of using (a). In case of using 10-line flat cable and 10-pin connector for the external clock (Using 10-line flat cable and 10-pin connector for the data) Cables Connectors 10-line flat cable BNC cable BNC-RCA conversion connector PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) PORT4 (SDTO1 SDTO2 SDTO3) J19 (EXTMCLK) J20 (EXTBICK) J21 (EXTLRCK) PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) Destinations of the connections PORT4 J19 J20 J21 (SDTO1 (EXT(EXT(EXTSDTO2 MCLK) BICK) LRCK) SDTO3) External 10-pin connector External BNC connector Use ○ Not use - - ○ ○ ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - - ○ - - - - - - - - - - ○ - - - - - - - - - - ○ - - - - - - - - - Table 79. Use / Not use of the cables, connectors and the destinations of the connections <KM105603> 2015/04 - 48 - [AKD4612-A] Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - - - ○ ○ ○ - ○ ○ ○ ○ ○ ○ Table 80. The settings of the jumper pins (modes and clocks) (i) In case of not using UPD. / In case of using UPD and not inverting BICK. Jumper pins JP69 (BICK-THR / INV) THR ○ INV - Open - Table 81. The settings of the jumper pins (clocks) (ii) In case of using UPD and inverting BICK. Jumper pins JP69 (BICK-THR / INV) THR - INV ○ Open - Table 82. The settings of the jumper pins (clocks) <KM105603> 2015/04 - 49 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector for the external clock (Using 10-line flat cable and 10-pin connector for the data) Cabless Connectors 10-line flat cable BNC cable BNC-RCA conversion connector PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) PORT4 (SDTO1 SDTO2 SDTO3) J19 (EXTMCLK) J20 (EXTBICK) J21 (EXTLRCK) Destinations of the connections PORT4 J19 J20 J21 (SDTO1 (EXT(EXT(EXTSDTO2 MCLK) BICK) LRCK) SDTO3) PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) - - - - - - ○ - - - - - ○ - - - - ○ - - - Use ○ Not use - ○ ○ - - ○ External 10-pin connector External BNC connector - - - - - ○ - - - - ○ - - - - - ○ - ○ - - - - - - - - - ○ ○ - - - - - - - - - ○ ○ - - - - - - - - - ○ Table 83. Use / Not use of the cables, connectors and the destinations of the connections Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - - ○ ○ ○ - - ○ ○ ○ ○ ○ ○ Table 84. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 50 - [AKD4612-A] (i) In case of not using UPD. Jumper pins JP69 (BICK-THR / INV) THR ○ INV - Open - Table 85. The settings of the jumper pins (clocks) (c). Other common setting JP207 (SDTO) should be open. Jumper pins JP207 (SDTO) Always JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) Always Always Always Always SDTO1 - SDTO2 - SDTO3 - Open ○ DIR 10-pin GND Open - - ○ ○ ○ ○ - (Note 11) Table 86. The settings of the jumper pins (digital inputs / digital outputs) Note 11. Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values L H H H L H H H H L H Functions Slave Mode Slave Mode, 24bit I2S Compatible X’tal Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 87. The settings of the DIP switches <KM105603> 2015/04 - 51 - [AKD4612-A] Switch on the power supply units, and do the settings of toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L L Functions Power downPower up Power down Power down Table 88. The settings of the toggle switches Starts up the control software, click “Write default” button, write the default value. Analog inputs / digital outputs paths are as follows. Analog inputs / digital outputs paths LIN1SDTO1-Lch RIN1SDTO1-Rch LIN2SDTO2-Lch RIN2SDTO2-Rch LIN3SDTO3-Lch RIN3SDTO3-Rch Table 89. Analog inputs / digital outputs paths <KM105603> 2015/04 - 52 - [AKD4612-A] (7) The evaluation mode of DAC (Digital Analog) with the external clocks (7)-1. Slave mode Devices (Parts) AK4612 (U1) DIR: AK4114 (U23) DIT: AK4114 (U26) X’tal: X1 X’tal: X2 X’tal: X3 Use ○ - Not use ○ ○ ○ ○ ○ Removed ○ ○ ○ Clock sources External clock ○ - X’tal - PLL - Modes Master - Slave ○ - Table 90. Use / Not use of the devices (parts) and the modes of using (a). In case of using 10-line flat cable and 10-pin connector for the external clock (Using 10-line flat cable and 10-pin connector for the data) Cables Connectors 10-line flat cable BNC cable BNC-RCA conversion connector PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) PORT4 (SDTO1 SDTO2 SDTO3) J19 (EXTMCLK) J20 (EXTBICK) J21 (EXTLRCK) PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) Destinations of the connections PORT4 J19 J20 J21 (SDTO1 (EXT(EXT(EXTSDTO2 MCLK) BICK) LRCK) SDTO3) External 10-pin connector External BNC connector Use ○ Not use - - ○ ○ ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - ○ - - - - - - - - ○ - - ○ - - - - - - - - - - ○ - - - - - - - - - - ○ - - - - - - - - - Table 91. Use / Not use of the cables, connectors and the destinations of the connections <KM105603> 2015/04 - 53 - [AKD4612-A] Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - - - ○ ○ ○ - ○ ○ ○ ○ ○ ○ Table 92. The settings of the jumper pins (modes and clocks) (i) In case of not using UPD. / In case of using UPD and not inverting BICK. Jumper pins JP69 (BICK-THR / INV) THR ○ INV - Open - Table 93. The settings of the jumper pins (clocks) (ii) In case of using UPD and inverting BICK. Jumper pins JP69 (BICK-THR / INV) THR - INV ○ Open - Table 94. The settings of the jumper pins (clocks) <KM105603> 2015/04 - 54 - [AKD4612-A] (b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector for the external clock (Using 10-line flat cable and 10-pin connector for the data) Cables Connectors 10-line flat cable BNC cable BNC-RCA conversion connector PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) PORT4 (SDTO1 SDTO2 SDTO3) J19 (EXTMCLK) J20 (EXTBICK) J21 (EXTLRCK) Destinations of the connections PORT4 J19 J20 J21 (SDTO1 (EXT(EXT(EXTSDTO2 MCLK) BICK) LRCK) SDTO3) PORT1 (MCLK BICK LRCK) PORT2 (SDTI1 SDTI2 SDTI3) PORT3 (SDTI4) - - - - - - ○ - - - - - ○ - - - - ○ - - - Use ○ Not use - ○ ○ - - ○ External 10-pin connector External BNC connector - - - - - ○ - - - - ○ - - - - - ○ - ○ - - - - - - - - - ○ ○ - - - - - - - - - ○ ○ - - - - - - - - - ○ Table 95. Use / Not use of the cables, connectors and the destinations of the connections Jumper pins JP65 (AK4612-Master/Slave) JP1 (XTI/MCKI) JP63 (AK4612-XTI/MCKI) JP64 (AK4612-BICK) JP66 (AK4612-LRCK) JP67 (DIR-AK4114-XTI) JP70 (DIR-AK4114-BICK) JP71 (DIR-AK4114-LRCK) JP73 (DIT-AK4114-XTI) JP75 (DIT-AK4114-BICK) JP76 (DIT-AK4114-LRCK) Master - Slave ○ Short Open ○ - CODEC DIR DIT BNC 10-pin Open - - - ○ ○ ○ - - ○ ○ ○ ○ ○ ○ Table 96. The settings of the jumper pins (modes and clocks) <KM105603> 2015/04 - 55 - [AKD4612-A] (i) In case of not using UPD. Jumper pins JP69 (BICK-THR / INV) THR ○ INV - Open - Table 97. The settings of the jumper pins (clocks) (c). Other common setting JP207 (SDTO) should be open. Jumper pins JP207 (SDTO) JP201 (SDTI1) JP202 (SDTI2) JP203 (SDTI3) JP204 (SDTI4) SDTO1 - Always SDTO2 - SDTO3 - Open ○ (Note 12) SDTI1 input No input SDTI2 input No input SDTI3 input No input SDTI4 input No input DIR 10-pin GND Open - ○ - - - ○ ○ ○ - ○ ○ ○ ○ Table 98. The settings of jumper pins (digital inputs / digital outputs) Note 12.Connect DAUX side of DIT: AK4114 (U26) to GND by the clips. Switch names SW2 (MODE-AK4612) SW4 (DIR-AK4114-MODE) SW6 (DIT-AK4114-MODE) Pin No. 4 1 2 3 4 5 1 2 3 4 5 Signal names M/S DIF2 DIF1 DIF0 CM1 CM0 DIF2 DIF1 DIF0 CM1 CM0 Values L H H H L H H H H L H Functions Slave Mode Slave Mode, 24bit I2S Compatible X’tal Mode Slave Mode, 24bit I2S Compatible X’tal Mode Table 99. The settings of the DIP switches <KM105603> 2015/04 - 56 - [AKD4612-A] Switch on the power supply units, and do the settings of toggle switches as follws. Switch names SW3 (PDN-AK4612) SW5 (PDN-DIR-AK4114) SW7 (PDN-DIT-AK4114) Values LH L L Functions Power downPower up Power down Power down Table 100. The settings of the toggle switches Starts up the control software, click “Write default” button, write the default value. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths are as follows. Combinations 1 Settings of the jumper pins JP201 (SDTI1)= 10-pin JP202 (SDTI2)= 10-pin JP203 (SDTI3)= 10-pin JP204 (SDTI4)= 10-pin Digital inputs / analog outputs paths SDTI1-LchLOUT1 SDTI1-RchROUT1 SDTI2-LchLOUT2 SDTI2-RchROUT2 SDTI3-LchLOUT3 SDTI3-RchROUT3 SDTI4-LchLOUT4 SDTI4-RchROUT4 Table 101. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths <KM105603> 2015/04 - 57 - [AKD4612-A] Control Soft Manual ■ Evaluation Board and Control Soft Settings 1. Set an evaluation board properly. 2. Connect a USB control box (AKUSBIF-B) and an evaluation board. Pay attention about direction of the 10pin header when connecting to an AKUSBIF-B. 3. Connect a PC (IBM-AT compatible) and the USB control box (AKUSBIF-B). The USB control box is recognized as HID (Human Interface Device) on the PC. It is not necessary to install a new driver. 4. Start up the control program. When the screen does not display “AKUSBIF-B” at bottom left, reconnect the PC and the USB control box, and push the [Port Reset] button. 5. Proceed evaluation by following the process below. [Support OS] Windows XP / Vista / 7 (32bit) (XP compatible mode is recommended for Vista / 7) 64bit OS’s are not supported. Figure 4. Window of Control Soft <KM105603> 2015/04 - 58 - [AKD4612-A] ■ Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting. 1.[ Port Reset ] : For when connecting to USB I/F board (AKDUSBIF-B) Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-B). 2.[ Write Default ] : Register Initializing When the device is reset by a hardware reset, use this button to initialize the registers. 3.[ All Write ] : Executing write commands for all registers displayed. 4.[ All Read ] : Executing read commands for all registers displayed. 5.[ Save ] : Saving current register settings to a file. 6.[ Load ] : Executing data write from a saved file. 7.[ All Req Write ] : “All Req Write” dialog box is popped up. 8.[ Data R/W ] : “Data R/W” dialog box is popped up. 9.[ Sequence ] : “Sequence” dialog box is popped up. 10.[ Sequence(File) ] : “Sequence(File)” dialog box is popped up. 11.[ Read ] : Reading current register settings and display on to the Register area (on the right of the main window). This is different from [All Read] button, it does not reflect to a register map, only displaying hexadecimal. <KM105603> 2015/04 - 59 - [AKD4612-A] ■ Tab Functions 1. [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) Grayout registers are Read Only registers. They can not be controlled. The registers which is not defined in the datasheet are indicated as “---”. Figure 5. Window of [ REG] <KM105603> 2015/04 - 60 - [AKD4612-A] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”. Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting. Figure 6. Window of [ Register Set ] [Read]: Data Read Click [Read] button located on the right of the each corresponded address to execute register reading. After register reading, the display will be updated regarding to the register status. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) Please be aware that button statuses will be changed by Read command. <KM105603> 2015/04 - 61 - [AKD4612-A] ■ Dialog Boxes 1. [All Req Write]: All Req Write dialog box Click [All Reg Write] button in the main window to open register setting files. Register setting files saved by [SAVE] button can be applied. Figure 7. Window of [ All Reg Write ] [Open (left)] [Write] [Write All] : Selecting a register setting file (*.akr). : Executing register writing. : Executing all register writings. Writings are executed in descending order. [Help] [Save] [Open (right)] [Close] : Help window is popped up. : Saving the register setting file assignment. The file name is “*.mar”. : Opening a saved register setting file assignment “*. mar”. : Closing the dialog box and finish the process. ～ Operating Suggestions ～ (1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be stored in the same folder. (2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new register settings. <KM105603> 2015/04 - 62 - [AKD4612-A] 2. [Data R/W]: Data R/W Dialog Box Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Figure 8. Window of [ Data R/W ] [ Address ] Box [ Data ] Box [ Mask ] Box [ Write ] [ Read ] [ Close ] : Input data address in hexadecimal numbers for data writing. : Input data in hexadecimal numbers. : Input mask data in hexadecimal numbers. This is “AND” processed input data. : Writing to the address specified by “Address” box.(Note 13) : Reading from the address specified by “Address” box.(Note 13) The result will be shown in the Read Data Box in hexadecimal numbers. : Closing the dialog box and finish the process. Data writing can be cancelled by this button instead of [Write] button. Note 13. The register map will be updated after executing [Write] or [Read] commands. <KM105603> 2015/04 - 63 - [AKD4612-A] 3. [Sequence]: Sequence Dialog Box Click [Sequence] button to open register sequence setting dialog box. Register sequence can be set in this dialog box. Figure 9. Window of [Sequence ] ～ Sequence Setting ～ Set register sequence by following process bellow. (1)Select a command Use [Select] pull-down box to choose commands. Corresponding boxes will be valid. < Select Pull-down menu > · No_use : Not using this address · Register : Register writing · Reg(Mask) : Register writing (Masked) · Interval : Taking an interval · Stop : Pausing the sequence · End : Finishing the sequence <KM105603> 2015/04 - 64 - [AKD4612-A] (2)Input sequence [ Address ] : Data address [ Data ] : Writing data [ Mask ] : Mask [Data] box data is ANDed with [Mask] box data. This is the actual writing data. When Mask = 0x00, current setting is hold. When Mask = 0xFF, the 8bit data which is set in the [Data] box is written. When Mask =0x0F, lower 4bit data which is set in the [Data] box is written. Upper 4bit is hold to current setting. [ Interval ] : Interval time Valid boxes for each process command are shown bellow. · No_use · Register · Reg(Mask) · Interval · Stop · End : None : [Address], [Data], [Interval] : [Address], [Data], [Mask], [Interval] : [Interval] : None : None ～ Control Buttons ～ The function of Control Button is shown bellow. [Start] [Help] [Save] [Open] [Close] : Executing the sequence : Opening a help window : Saving sequence settings as a file. The file name is “*.aks”. : Opening a sequence setting file “*.aks”. : Closing the dialog box and finish the process. Stop of the sequence When “Stop” is selected in the sequence, processing is paused and it starts again when [Start] button is clicked. Restarting step number is shown in the “Start Step” box. When finishing the process until the end of sequence, “Start Step” will return to “1”. The sequence can be started from any step by writing the step number to the “Start Step” box. Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning. <KM105603> 2015/04 - 65 - [AKD4612-A] 4. [Sequence(File)]: Sequence Setting File Dialog Box Click [Sequence(File)] button to open sequence setting file dialog box. Those files saved in the “Sequence setting dialog” can be applied in this dialog. Figure 10. Window of [ Sequence(File) ] [Open (left)] [Start] [Start All] : Opening a sequence setting file (*.aks). : Executing the sequence setting. : Executing all sequence settings. Sequences are executed in descending order. [Help] [Save] [Open(right)] [Close] : Pop up the help window. : Saving sequence setting file assignment. The file name is “*.mas”. : Opening a saved sequence setting file assignment “*. mas”. : Closing the dialog box and finish the process. ～ Operating Suggestions ～ (1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be stored in the same folder. (2) When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click “OK” to continue the process. Figure 11. Window of [ Sequence Pause ] <KM105603> 2015/04 - 66 - [AKD4612-A] MEASUREMENT RESULTS [Measurement condition] Measurement unit MCLK BICK fs Bit Power Supply Interface Temperature : Audio Precision, SYS-2722 : 512fs (fs=48KHz), 256fs (fs=96KHz), 128fs (fs=192KHz) : 64fs : 48kHz, 96kHz, 192KHz : 24bit : AVDD1 = AVDD2 = TVDD1 = TVDD2 = 3.3V, DVDD = 1.8V : Internal DIT/DIR (AK4114) : Room [Measurement Results] 1. ADC Input Signal Measurement Filter : S/(N+D) = -1dBFS, DR = -60dBFS, S/N = No Signal : S/(N+D) = 20kHz LPF(fs = 48kHz), 40kHz LPF(fs = 96kHz and 192kHz) DR = S/N = A-Weighted fs=48kHz Parameter IN1 IN2 IN3 Output Select Single-ended Differential Single-ended Differential Single-ended Differential S/(N+D) Lch Rch 93.6 dB 93.5 dB 97.6 dB 97.7 dB 93.4 dB 93.1 dB 98.3 dB 98.1 dB 93.3 dB 93.2 dB 98.2 dB 98.4 dB Lch 103.8 dB 103.8 dB 103.9 dB 103.9 dB 103.8 dB 103.5 dB DR S/(N+D) Lch Rch 92.0 dB 92.0 dB 95.6 dB 95.8 dB 92.1 dB 92.2 dB 95.9 dB 95.8 dB 92.4 dB 92.5 dB 95.9 dB 95.9 dB Lch 103.6 dB 103.5 dB 103.6 dB 103.5 dB 103.6 dB 103.5 dB S/(N+D) Lch Rch 92.0 dB 92.0 dB 95.6 dB 95.6 dB 92.0 dB 92.1 dB 95.7 dB 95.6 dB 92.3 dB 92.4 dB 95.6 dB 95.7 dB Lch 103.4 dB 103.3 dB 103.4 dB 103. dB 103.5 dB 103.2 dB S/N Rch 103.8 dB 103.8 dB 103.8 dB 103.9 dB 103.8 dB 103.6 dB Lch 103.9 dB 103.8 dB 103.8 dB 103.9 dB 103.9 dB 103.7 dB Rch 103.7 dB 103.5 dB 103.5 dB 103.5 dB 103.6 dB 103.5 dB Lch 103.7 dB 103.5 dB 103.6 dB 103.5 dB 103.6 dB 103.5 dB Rch 103.4 dB 103.3 dB 103.5 dB 103.3 dB 103.5 dB 103.2 dB Lch 103.4 dB 103.2 dB 103.4 dB 103.2 dB 103.4 dB 103.2 dB Rch 103.8 dB 103.8 dB 103.8 dB 103.9 dB 103.9 dB 103.7 dB fs=96kHz Parameter IN1 IN2 IN3 Output Select Single-ended Differential Single-ended Differential Single-ended Differential DR S/N Rch 103.7 dB 103.5 dB 103.6 dB 103.5 dB 103.5 dB 103.5 dB fs=192kHz Parameter IN1 IN2 IN3 Output Select Single-ended Differential Single-ended Differential Single-ended Differential <KM105603> DR S/N Rch 103.4 dB 103.2 dB 103.5 dB 103.2 dB 103.4 dB 103.2 dB 2015/04 - 67 - [AKD4612-A] 2. DAC Input Signal Measurement Filter : S/(N+D) = 0dBFS, DR = -60dBFS, S/N = “0”data : S/(N+D) = 20kHz LPF(fs = 48kHz), 40kHz LPF(fs = 96kHz and 192kHz) DR = S/N = A-Weighted fs=48kHz Parameter OUT1 OUT2 OUT3 OUT4 Output Select Single-ended Differential Single-ended Differential Single-ended Differential Single-ended Differential S/(N+D) Lch Rch 94.6 dB 94.5 dB 100.5 dB 99.2 dB 93.9 dB 94.5 dB 98.1 dB 100.1 dB 94.9 dB 94.9 dB 100.2 dB 100.6 dB 94.8 dB 94.5 dB 100.1 dB 100.2 dB Lch 104.4 dB 108.2 dB 104.4 dB 107.4 dB 104.4 dB 108.6 dB 104.4 dB 108.7 dB DR S/(N+D) Lch Rch 94.9 dB 94.8 dB 97.0 dB 98.5 dB 95.4 dB 95.1 dB 98.1 dB 99.1 dB 96.1 dB 95.9 dB 98.3 dB 98.7 dB 97.5 dB 97.2 dB 98.2 dB 98.3 dB Lch 103.9 dB 110.0 dB 103.9 dB 108.5 dB 104.9 dB 108.7 dB 104.9 dB 108.4 dB S/(N+D) Lch Rch 95.8 dB 95.7 dB 97.0 dB 98.4 dB 95.8 dB 95.5 dB 97.4 dB 98.0 dB 96.1 dB 95.8 dB 98.7 dB 99.1 dB 96.0 dB 95.8 dB 98.7 dB 98.8 dB Lch 104.9 dB 109.6 dB 104.9 dB 106.6 dB 104.9 dB 109.4 dB 104.9 dB 110.1 dB S/N Rch 104.4 dB 108.7 dB 104.4 dB 108.7 dB 104.4 dB 108.7 dB 104.4 dB 108.6 dB Lch 104.9 dB 108.5 dB 104.4 dB 107.7 dB 104.9 dB 108.8 dB 104.9 dB 108.8 dB Rch 104.9 dB 110.4 dB 104.9 dB 110.3 dB 104.9 dB 110.0 dB 104.9 dB 110.5 dB Lch 104.9 dB 109.9 dB 104.9 dB 109.1 dB 104.9 dB 110.2 dB 104.9 dB 110.4 dB Rch 104.9 dB 110.4 dB 104.9 dB 110.2 dB 104.9 dB 108.9 dB 104.9 dB 110.3 dB Lch 104.9 dB 109.9 dB 104.9 dB 107.9 dB 104.9 dB 110.1 dB 104.9 dB 110.5 dB Rch 104.4 dB 109.0 dB 104.4 dB 108.8 dB 104.9 dB 108.8 dB 104.9 dB 108.8 dB Fs=96kHz Parameter OUT1 OUT2 OUT3 OUT4 Output Select Single-ended Differential Single-ended Differential Single-ended Differential Single-ended Differential DR S/N Rch 104.9 dB 110.5 dB 104.9 dB 110.4 dB 104.9 dB 110.1 dB 104.9 dB 110.4 dB Fs=192kHz Parameter OUT1 OUT2 OUT3 OUT4 Output Select Single-ended Differential Single-ended Differential Single-ended Differential Single-ended Differential <KM105603> DR S/N Rch 104.9 dB 110.5 dB 104.9 dB 110.3 dB 106.0 dB 109.7 dB 104.9 dB 110.4 dB 2015/04 - 68 - [AKD4612-A] [Plots] 1. ADC Plots fs=48kHz THD+N vs. Input Level AKM S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -80 -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 dBr Figure 12. Single-ended Figure 13. Differential THD+N vs. Input Frequency AKM S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -80 -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 500 Hz 1k 2k 5k 10k 20k Hz Figure 14. Single-ended Figure 15. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 d B F S Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -50 d B F S -60 -70 -80 -60 -70 -80 -90 -90 -100 -100 -110 -120 -120 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 dBr -60 -50 -40 -30 -20 -10 +0 dBr Figure 16. Single-ended Figure 17. Differential Frequency Response AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM -0.5 -0.6 -0.6 -0.7 -0.7 -0.8 -0.8 -0.9 d B F S Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -0.5 -0.9 d B F S -1 -1 -1.1 -1.1 -1.2 -1.2 -1.3 -1.3 -1.4 -1.5 -1.4 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz -1.5 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz Figure 18. Single-ended Figure 19. Differential <KM105603> 2015/04 - 69 - [AKD4612-A] fs=48kHz Crosstalk AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -70 AKM -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -70 T T T -100 d B -105 -110 -105 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k -140 20 20k 50 100 200 500 Hz 1k 2k 5k 10k 20k 10k 20k 10k 20k 10k 20k Hz Figure 20. Single-ended Figure 21. Differential FFT (0dBFS Input) AKM FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -10 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k -180 20 20k 50 100 200 500 Hz 1k 2k 5k Hz Figure 22. Single-ended Figure 23. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k -180 20 20k 50 100 200 500 Hz 1k 2k 5k Hz Figure 24. Single-ended Figure 25. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k Hz -180 20 50 100 200 500 1k 2k 5k Hz Figure 26. Single-ended Figure 27. Differential <KM105603> 2015/04 - 70 - [AKD4612-A] fs=96kHz THD+N vs. Input Level AKM S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -80 T -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 dBr Figure 28. Single-ended Figure 29. Differential THD+N vs. Input Frequency AKM S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -80 -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k -120 20 40k 50 100 200 500 1k Hz 2k 5k 10k 20k 40k Hz Figure 30. Single-ended Figure 31. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -50 d B F S -60 -70 -80 -60 -70 -80 -90 -90 -100 -100 -110 -120 -120 T -40 -50 d B F S Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 +0 dBr Figure 32. Single-ended Figure 33. Differential Frequency Response AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -0.5 -0.5 -0.6 -0.6 -0.6 -0.7 -0.7 -0.7 -0.8 -0.8 -0.8 -0.9 -0.9 -0.9 d B F S Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -0.5 d B F S -1 -1 -1 -1.1 -1.1 -1.1 -1.2 -1.2 -1.2 -1.3 -1.3 -1.3 -1.4 -1.4 -1.5 2.5k 5k 7.5k 10k 12.5k 15k 17.5k 20k 22.5k 25k 27.5k 30k 32.5k 35k 37.5k 40k Hz d B F S -1.4 5k 10k 15k 20k 25k 30k 35k 40k Hz Figure 34. Single-ended Figure 35. Differential <KM105603> 2015/04 - 71 - [AKD4612-A] fs=96kHz Crosstalk AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -70 -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -70 -100 d B -105 -110 -105 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k 20k -140 20 40k 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k 20k 40k 20k 40k 20k 40k Hz Figure 36. Single-ended Figure 37. Differential FFT (0dBFS Input) AKM FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -10 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 38. Single-ended Figure 39. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 40. Single-ended Figure 41. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k 40k Hz -180 20 50 100 200 500 1k 2k 5k 10k Hz Figure 42. Single-ended Figure 43. Differential <KM105603> 2015/04 - 72 - [AKD4612-A] fs=192kHz THD+N vs. Input Level AKM S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -80 -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 dBr Figure 44. Single-ended Figure 45. Differential THD+N vs. Input Frequency AKM S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM -80 -85 -85 -90 -90 -95 d B F S S/(N+D) vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -80 -95 d B F S -100 -100 -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k -120 20 40k 50 100 200 500 1k Hz 2k 5k 10k 20k 40k Hz Figure 46. Single-ended Figure 47. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 d B F S Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -50 d B F S -60 -70 -80 -60 -70 -80 -90 -90 -100 -100 -110 -120 -120 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 +0 dBr Figure 48. Single-ended Figure 49. Differential Frequency Response AKM d B F S Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -0.5 -0.5 -0.5 -0.5 -0.6 -0.6 -0.6 -0.6 -0.7 -0.7 -0.7 -0.7 -0.8 -0.8 -0.8 -0.8 -0.9 -0.9 -0.9 -0.9 -1 -1 d B F S d B F S -1 -1 -1.1 -1.1 -1.1 -1.1 -1.2 -1.2 -1.2 -1.2 -1.3 -1.3 -1.3 -1.3 -1.4 -1.4 -1.4 -1.5 5k 10k 15k 20k 25k 30k 35k 40k -1.5 -1.4 5k Hz d B F S 10k 15k 20k 25k 30k 35k 40k Hz Figure 50. Single-ended Figure 51. Differential <KM105603> 2015/04 - 73 - [AKD4612-A] fs=192kHz Crosstalk AKM AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -70 T -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -70 T -100 d B -105 -110 -105 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k 20k -140 20 40k 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k 20k 40k 20k 40k 20k 40k Hz Figure 52. Single-ended Figure 53. Differential FFT (0dBFS Input) AKM FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-1dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -10 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 54. Single-ended Figure 55. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 56. Single-ended Figure 57. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B F S FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -70 -80 d B F S -90 -100 -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k 40k Hz -180 20 50 100 200 500 1k 2k 5k 10k Hz Figure 58. Single-ended Figure 59. Differential <KM105603> 2015/04 - 74 - [AKD4612-A] 2. DAC Plots fs=48kHz THD+N vs. Input Level AKM THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 60. Single-ended Figure 61. Differential THD+N vs. Input Frequency AKM THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k -120 20 20k 50 100 200 500 1k Hz 2k 5k 10k 20k Hz Figure 62. Single-ended Figure 63. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 +0 -10 -10 -20 -20 -30 -30 -40 d B r -50 A -40 -50 -60 d B r -70 A -70 -80 -60 -80 -90 -90 -100 -100 -110 -120 -120 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 64. Single-ended Figure 65. Differential Frequency Response AKM d B r A Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0.5 +0.5 +0.5 +0.5 +0.4 +0.4 +0.4 +0.4 +0.3 +0.3 +0.3 +0.3 +0.2 +0.2 +0.2 +0.2 +0.1 +0.1 +0.1 +0.1 +0 +0 -0.1 -0.1 -0.2 -0.2 -0.3 -0.4 -0.5 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k d B r d B r B A +0 +0 -0.1 -0.1 -0.2 -0.2 -0.3 -0.3 -0.3 -0.4 -0.4 -0.5 -0.5 Hz d B r B -0.4 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k -0.5 Hz Figure 66. Single-ended Figure 67. Differential <KM105603> 2015/04 - 75 - [AKD4612-A] fs=48kHz Crosstalk AKM d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 -105 -105 d B -110 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k -140 20 20k 50 100 200 500 Hz 1k 2k 5k 10k 20k 10k 20k 10k 20k 10k 20k Hz Figure 68. Single-ended Figure 69. Differential FFT (0dBFS Input) AKM FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -10 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k -180 20 20k 50 100 200 500 Hz 1k 2k 5k Hz Figure 70. Single-ended Figure 71. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k -180 20 20k 50 100 200 500 Hz 1k 2k 5k Hz Figure 72. Single-ended Figure 73. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=512fs, fs=48kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k Hz -180 20 50 100 200 500 1k 2k 5k Hz Figure 74. Single-ended Figure 75. Differential <KM105603> 2015/04 - 76 - [AKD4612-A] fs=96kHz THD+N vs. Input Level AKM THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 76. Single-ended Figure 77. Differential THD+N vs. Input Frequency AKM THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k -120 20 40k 50 100 200 500 1k Hz 2k 5k 10k 20k 40k Hz Figure 78. Single-ended Figure 79. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 +0 -10 -10 -20 -20 -30 -30 -40 d B r -50 A -40 -50 -60 d B r -70 A -70 -80 -60 -80 -90 -90 -100 -100 -110 -120 -120 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 80. Single-ended Figure 81. Differential Frequency Response AKM d B r A Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0.5 +0.5 +0.5 +0.5 +0.4 +0.4 +0.4 +0.4 +0.3 +0.3 +0.3 +0.3 +0.2 +0.2 +0.2 +0.2 +0.1 +0.1 +0.1 +0.1 +0 +0 d B r d B r B A +0 +0 -0.1 -0.1 -0.1 -0.1 -0.2 -0.2 -0.2 -0.2 -0.3 -0.3 -0.3 -0.3 -0.4 -0.4 -0.4 -0.5 -0.5 -0.5 5k 10k 15k 20k 25k 30k 35k 40k Hz d B r B -0.4 5k 10k 15k 20k 25k 30k 35k 40k -0.5 Hz Figure 82. Single-ended Figure 83. Differential <KM105603> 2015/04 - 77 - [AKD4612-A] fs=96kHz Crosstalk AKM d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 -105 -105 d B -110 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k 20k -140 20 40k 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k 20k 40k 20k 40k 20k 40k Hz Figure 84. Single-ended Figure 85. Differential FFT (0dBFS Input) AKM FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -10 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 86. Single-ended Figure 87. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 88. Single-ended Figure 89. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=256fs, fs=96kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k 40k Hz -180 20 50 100 200 500 1k 2k 5k 10k Hz Figure 90. Single-ended Figure 91. Differential <KM105603> 2015/04 - 78 - [AKD4612-A] fs=192kHz THD+N vs. Input Level AKM THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Level AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 -120 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 92. Single-ended Figure 93. Differential THD+N vs. Input Frequency AKM THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM -80 -85 -85 -90 -90 -95 d B r THD+N vs. Input Frequency AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -80 -95 d B r -100 A -100 A -105 -105 -110 -110 -115 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k -120 20 40k 50 100 200 500 1k Hz 2k 5k 10k 20k 40k Hz Figure 94. Single-ended Figure 95. Differential Linearity AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM Linearity AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 +0 -10 -10 -20 -20 -30 -30 -40 d B r -50 A -40 -50 -60 d B r -70 A -70 -80 -60 -80 -90 -90 -100 -100 -110 -120 -120 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 -120 +0 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 dBFS Figure 96. Single-ended Figure 97. Differential Frequency Response AKM d B r A Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM Frequency Response AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0.5 +0.5 +0.5 +0.5 +0.4 +0.4 +0.4 +0.4 +0.3 +0.3 +0.3 +0.3 +0.2 +0.2 +0.2 +0.2 +0.1 +0.1 +0.1 +0.1 +0 +0 d B r d B r B A +0 +0 -0.1 -0.1 -0.1 -0.1 -0.2 -0.2 -0.2 -0.2 -0.3 -0.3 -0.3 -0.3 -0.4 -0.4 -0.4 -0.5 -0.5 -0.5 5k 10k 15k 20k 25k 30k 35k 40k Hz d B r B -0.4 5k 10k 15k 20k 25k 30k 35k 40k -0.5 Hz Figure 98. Single-ended Figure 99. Differential <KM105603> 2015/04 - 79 - [AKD4612-A] fs=192kHz Crosstalk AKM d B Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM Crosstalk AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 -105 -105 d B -110 -110 -115 -115 -120 -120 -125 -125 -130 -130 -135 -140 20 -135 50 100 200 500 1k 2k 5k 10k 20k -140 20 40k 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k 20k 40k 20k 40k 20k 40k Hz Figure 100. Single-ended Figure 101. Differential FFT (0dBFS Input) AKM FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (0dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -10 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 102. Single-ended Figure 103. Differential FFT (-60dBFS Input) AKM FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (-60dBFS Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k -180 20 40k 50 100 200 500 Hz 1k 2k 5k 10k Hz Figure 104. Single-ended Figure 105. Differential FFT (No Signal Input) AKM FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz AKM +0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 d B r A FFT (No Signal Input) AVDD1,2=TVDD1,2=3.3V, DVDD=1.8V, MCLK=128fs, fs=192kHz +0 -70 d B r -80 -90 -100 A -80 -90 -100 -110 -110 -120 -120 -130 -130 -140 -140 -150 -150 -160 -160 -170 -180 20 -170 50 100 200 500 1k 2k 5k 10k 20k 40k Hz -180 20 50 100 200 500 1k 2k 5k 10k Hz Figure 106. Single-ended Figure 107. Differential <KM105603> 2015/04 - 80 - [AKD4612-A] Revision History Date Manual Board Reason (yy/mm/dd) Revision Revision 10/11/26 KM105600 0 First Edition Page Contents 66-79 Table data and Plots were added. 13/10/11 KM105601 0 Added 13/11/22 KM105602 0 Delete 11 Remove the description of SW1. Change 84 Change 7-8 Circuit diagram was changed. SW1: Mount -> No Mount Description of JP5, JP9, JP13, JP17, JP21 and JP25 were changed. 15/04/03 KM105603 0 <KM105603> 2015/04 - 81 - [AKD4612-A] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products. 1. All information included in this document are provided only to illustrate the operation and application examples of AKM Products. AKM neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of AKM or any third party with respect to the information in this document. You are fully responsible for use of such information contained in this document in your product design or applications. AKM ASSUMES NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS. 2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact, including but not limited to, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for the above use unless specifically agreed by AKM in writing. 3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for complying with safety standards and for providing adequate designs and safeguards for your hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of the Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. 4. Do not use or otherwise make available the Product or related technology or any information contained in this document for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). When exporting the Products or related technology or any information contained in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. The Products and related technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 5. Please contact AKM sales representative for details as to environmental matters such as the RoHS compatibility of the Product. Please use the Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. AKM assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 6. Resale of the Product with provisions different from the statement and/or technical features set forth in this document shall immediately void any warranty granted by AKM for the Product and shall not create or extend in any manner whatsoever, any liability of AKM. 7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of AKM. <KM105603> 2015/04 - 82 - 1 61 62 63 64 65 66 67 68 69 2 70 71 72 73 74 75 76 80 CN1 80pin_4 77 3 78 4 79 5 D D + C2 10u + C1 2.2u VSS1 61 CN3 80pin_3 TST15 TST16 62 63 DZF1 / OVF1 65 64 DZF2 / OVF2 LIN1- LIN1+ / LIN1 66 67 69 68 RIN1- RIN1+ / RIN1 LIN2- LIN2+ / LIN2 70 71 73 72 RIN2- RIN2+ / RIN2 LIN3- LIN3+/LIN3 74 75 VSS1 76 77 VREFH1 AVDD1 78 VSS1 C4 0.1u VCOM RIN3+/RIN3 80 RIN3- CN2 80pin_1 C 79 C3 0.1u 1 1 TST1 TST14 60 60 2 2 TST3 TST13 59 59 3 3 TST4 TST12 58 58 4 4 TST5 TST11 57 57 5 5 CAD0 TST10 56 56 6 6 CAD1 TST9 55 55 7 7 I2C ROUT4- 54 54 8 8 CCLK / SCL ROUT4+ / ROUT4 53 53 9 9 CSN LOUT4- 52 52 10 10 CDTI / SDA LOUT4+ / LOUT4 51 51 11 11 CDTO VREFH2 50 50 12 12 TVDD2 AVDD2 49 13 VSS3 VSS2 48 ROUT3- 47 47 ROUT3+ / ROUT3 46 46 LOUT3- 45 45 LOUT3+ / LOUT3 44 44 ROUT2- 43 43 ROUT2+ / ROUT2 42 42 41 41 C5 10u + AK4612 C6 0.1u 13 + C9 VSS3 10u U1 49 C7 0.1u C10 0.1u C + C8 10u 48 VSS2 14 14 DVDD 15 15 NC VSS4 16 16 TST2 17 17 M/S 18 18 MCKO 19 19 PDN 20 20 XTO C14 10p ROUT1- LOUT2+ / LOUT2 40 39 LOUT1- ROUT1+ / ROUT1 38 37 DVMPD LOUT1+ / LOUT1 36 35 TST7 TST8 34 33 SDTI3 SDTI4 32 31 SDTI1 SDTI2 30 29 LRCK SDTO3 BICK 28 27 SDTO2 25 26 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 23 22 21 25 VSS4 C15 10u CN4 80pin_2 24 VSS4 TVDD1 C12 0.1u 2 X1 HC-49/U 24 C13 10p LOUT2- + 1 23 22 21 24.576MHz SDTO1 B XTI / MCKI B A A Title - 83- Size A2 Date: 5 4 3 2 AKD4612-A-80LQFP AK4612 Document Number Thursday, November 25, 2010 1 Sheet 1 of 1 Rev 0 ROUT6- ROUT6+ / ROUT6 AK4612-DZF1 / OVF1 LIN1+ / LIN1 AK4612-DZF2 / OVF2 1 LIN1- RIN1+ / RIN1 LIN2+ / LIN2 RIN1- LIN2- RIN2- LIN3- RIN3+ / RIN3 RIN2+ / RIN2 2 LIN3+ / LIN3 3 AK4612-AVDD1 4 RIN3- 5 C413 (open) R1 (short) R2 (short) R3 (short) R4 (short) R5 (short) R6 (short) R7 (short) R8 (short) R9 (short) R10 (short) R11 (short) R12 (short) R13 (short) R14 (short) R15 (open) R16 (open) VSS1 + 61 62 63 64 65 66 67 68 69 70 71 72 73 61 CN3 80pin_3 TST15 TST16 62 63 DZF1 / OVF1 64 DZF2 / OVF2 LIN1- LIN1+ / LIN1 65 66 67 RIN1+ / RIN1 68 RIN1- LIN2- LIN2+ / LIN2 TST1 69 70 71 RIN2- RIN2+ / RIN2 72 73 LIN3- 76 77 78 74 VSS1 LIN3+/LIN3 1 1 AVDD1 47K VSS1 C4 0.1u VCOM RIN3+/RIN3 RIN3- CN2 80pin_1 79 80 C3 0.1u 75 AK4612-TST1 AK4612-TST3 AK4612-TST4 AK4612-TST5 AK4612-TST2 VSS1 VREFH1 9 8 7 6 5 4 3 2 1 74 C2 10u + C1 2.2u RP1 75 76 77 80 78 D CN1 80pin_4 AK4612-TVDD2 79 D TST14 60 60 R17 (open) R18 (open) R19 (open) R20 (open) R21 (open) R22 (open) R23 20 R25 20 R27 20 R29 20 SW2 AK4612-CAD0 AK4612-CAD1 AK4612-I2C AK4612-M/S AK4612-DVMPD 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 AK4612-TVDD2 2 AK4612-TVDD1 9 8 7 6 5 4 3 2 1 C 3 3 4 4 MODE-AK4612 RP2 2 AK4612-CAD0 AK4612-CAD1 AK4612-I2C AK4612-M/S AK4612-DVMPD 5 5 6 6 7 7 TST3 TST13 TST4 TST12 TST5 TST11 CAD0 I2C 47K AK4612-CCLK / SCL AK4612-CSN VDD 2 AK4612-CDTI / SDA / SDA (ACK) 1 D1 HSU119 R24 (short) R26 (short) R28 (short) R31 (short) 8 8 9 9 10 AK4612-CDTO 10 11 11 TST9 ROUT4- CCLK / SCL ROUT4+ / ROUT4 CSN LOUT4- U1 AK4612 CDTI / SDA R30 10k TST10 No Mount Under the Sub-Board CAD1 CDTO LOUT4+ / LOUT4 VREFH2 59 59 58 58 57 57 56 56 55 55 54 54 53 53 52 52 51 51 50 LOUT6- C414 (open) LOUT6+ / LOUT6 ROUT5- C415 (open) ROUT5+ / ROUT5 LOUT5- C C416 (open) LOUT5+ / LOUT5 ROUT4C417 2200p ROUT4+ / ROUT4 LOUT4C418 2200p LOUT4+ / LOUT4 50 AK4612-PDN-SW3 1 H 3 L AK4612-TVDD2 12 12 C5 C6 0.1u SW3 ATE1D-2M3 + 10u 0.1u VSS3 AK4612-DVDD VSS3 C10 10u AVDD2 49 13 VSS3 VSS2 48 C11 + 2 13 PDN-AK4612 TVDD2 C7 0.1u 14 14 15 15 DVDD ROUT3- NC ROUT3+ / ROUT3 47 C8 0.1u + AK4612-AVDD2 49 C9 10u 48 VSS2 VSS2 R32 47 46 46 20 R33 20 R34 20 R35 20 R39 20 R41 20 R42 20 ROUT3C419 2200p ROUT3+ / ROUT3 B B 1 10p LOUT2+ / LOUT2 45 44 44 43 43 42 42 41 41 LOUT3C420 2200p LOUT3+ / LOUT3 ROUT2C421 2200p ROUT2+ / ROUT2 LOUT2- 40 39 ROUT1- ROUT1+ / ROUT1 LOUT1- 38 37 36 DVMPD 35 TST8 34 TST7 SDTI4 33 32 SDTI3 31 SDTI2 30 SDTI1 29 BICK LRCK 28 TVDD1 LOUT2- 45 C12 0.1u 2 X1 HC-49/U C15 + C13 22 21 24.576MHz SDTO3 XTO LOUT1+ / LOUT1 ROUT2+ / ROUT2 27 20 PDN XTI / MCKI 20 19 ROUT2- 26 19 MCKO SDTO2 (short) 18 LOUT3+ / LOUT3 25 R40 18 M/S SDTO1 AK4612-PDN (short) LOUT3- 24 AK4612-MCKO R38 17 TST2 VSS4 17 16 23 VSS4 16 10p VSS4 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 22 23 R46 (short) R47 (short) R48 (short) R49 (short) R50 (short) R51 (short) R52 (short) R53 (open) R56 20 R57 20 R59 20 C422 LOUT1- Title Size A2 Date: 5 4 3 2 2200p C423 2200p ROUT1+ / ROUT1 LOUT1+ / LOUT1 TST8 TST7 AK4612-SDTI4 AK4612-SDTI3 AK4612-SDTI2 AK4612-SDTI1 AK4612-BICK - 84- AK4612-LRCK C424 2200p R58 20 ROUT1- R45 (short) R55 20 VSS4 R54 (open) LOUT2+ / LOUT2 R44 (short) AK4612-SDTO3 XTI / MCKI VSS4 AK4612-SDTO2 AK4612-XTI / MCKI R43 (short) AK4612-SDTO1 JP1 HIF3G-50P-2.54DSA (2x1) A AK4612-TVDD1 CN4 80pin_2 A 21 C17 10u AKD4612-A AK4612 Document Number Thursday, November 21, 2013 1 Sheet 1 of Rev 0 11 5 4 3 2 1 LIN1 R60 10k DIFF C18 22u VOP-ADC-minus R62 10k 6 U3B NJM5532 AIN-bias 2 3 8 8 VOP-ADC-minus R64 LIN1+ (Inverted) 4.7k SINGLE LIN1+ 1 DIFF C19 JP3 10u HIF3G-50P-2.54DSA (3x1) LIN1+ / LIN1 TEST1 D LIN1+ / LIN1 + 5 AIN-bias 7 4 LIN1 4 SINGLE + JP2 HIF3G-50P-2.54DSA (3x1) LIN1 (LIN1+ / LIN1-) R63 47K + 2 3 1 - LIN1 (LIN1+ / LIN1-) + D R61 4.7K - J1 MR-552LS U3A NJM5532 VOP-ADC-plus VOP-ADC-plus JP4 HIF3G-50P-2.54DSA (2x1) LIN1- C20 10u TEST2 LIN1- + LIN1GND JP5 HIF3G-50P-2.54DSA (2x1) RIN1 R65 10k 5 7 VOP-ADC-minus R68 RIN1+ (Inverted)4.7k U4B NJM5532 AIN-bias 2 3 8 8 AIN-bias 6 4 R69 10k 4 C22 22u + DIFF RIN1 - SINGLE SINGLE 1 DIFF C21 JP7 10u HIF3G-50P-2.54DSA (3x1) RIN1+ / RIN1 TEST3 RIN1+ / RIN1 U4A NJM5532 VOP-ADC-plus C RIN1+ + JP6 HIF3G-50P-2.54DSA (3x1) RIN1 (RIN1+ / RIN1-) R67 47K + 2 3 1 + RIN1 (RIN1+ / RIN1-) R66 4.7K VOP-ADC-minus - J2 MR-552LS C VOP-ADC-plus JP8 HIF3G-50P-2.54DSA (2x1) RIN1- C23 10u TEST4 RIN1- + RIN1GND JP9 HIF3G-50P-2.54DSA (2x1) LIN2 R70 10k DIFF VOP-ADC-minus R72 10k 4 C24 22u 6 U5B NJM5532 AIN-bias 2 3 8 8 VOP-ADC-minus R74 LIN2+ (Inverted) 4.7k DIFF C25 JP11 10u HIF3G-50P-2.54DSA (3x1) LIN2+ / LIN2 TEST5 LIN2+ / LIN2 U5A NJM5532 VOP-ADC-plus VOP-ADC-plus JP12 HIF3G-50P-2.54DSA (2x1) LIN2- B SINGLE LIN2+ 1 + 5 AIN-bias 7 4 LIN2 + SINGLE - JP10 HIF3G-50P-2.54DSA (3x1) LIN2 (LIN2+ / LIN2-) R73 47K + 2 3 1 + LIN2 (LIN2+ / LIN2-) R71 4.7K - J3 MR-552LS C26 10u TEST6 GND B LIN2- + LIN2- JP13 HIF3G-50P-2.54DSA (2x1) RIN2 R75 10k 5 7 VOP-ADC-minus R79 RIN2+ (Inverted)4.7k U6B NJM5532 AIN-bias 2 3 8 8 AIN-bias 6 4 R78 10k 4 C27 22u + DIFF RIN2 - SINGLE VOP-ADC-plus SINGLE 1 RIN2+ DIFF C28 JP15 10u HIF3G-50P-2.54DSA (3x1) RIN2+ / RIN2 TEST7 RIN2+ / RIN2 + JP14 HIF3G-50P-2.54DSA (3x1) RIN2 (RIN2+ / RIN2-) R77 47K + 2 3 1 + RIN2 (RIN2+ / RIN2-) R76 4.7K VOP-ADC-minus - J4 MR-552LS U6A NJM5532 VOP-ADC-plus JP16 HIF3G-50P-2.54DSA (2x1) RIN2- C29 10u + RIN2GND TEST8 RIN2- JP17 HIF3G-50P-2.54DSA (2x1) A A - 85- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number Rev ANALOG INPUT RCA-1 / RCA-2 Friday, August 09, 2013 1 Sheet 2 of 0 11 5 4 3 2 1 LIN3 R80 10k 4 5 VOP-ADC-minus R84 LIN3+ (Inverted) 4.7k U7B NJM5532 AIN-bias 2 3 8 8 D 7 LIN3+ 1 C31 JP19 10u HIF3G-50P-2.54DSA (3x1) LIN3+ / LIN3 SINGLE DIFF TEST9 LIN3+ / LIN3 + AIN-bias 6 4 VOP-ADC-minus R83 10k + C30 22u - DIFF LIN3 + SINGLE + JP18 HIF3G-50P-2.54DSA (3x1) LIN3 (LIN3+ / LIN3-) R82 47K 2 3 1 - J5 MR-552LS LIN3 (LIN3+ / LIN3-) R81 4.7K U7A NJM5532 VOP-ADC-plus D VOP-ADC-plus JP20 HIF3G-50P-2.54DSA (2x1) LIN3- GND C32 10u TEST10 LIN3- + LIN3- JP21 HIF3G-50P-2.54DSA (2x1) RIN3 R85 10k VOP-ADC-minus R89 RIN3+ (Inverted)4.7k U8B NJM5532 AIN-bias 2 3 8 8 5 7 VOP-ADC-plus SINGLE 1 RIN3+ DIFF C34 JP23 10u HIF3G-50P-2.54DSA (3x1) RIN3+ / RIN3 TEST11 RIN3+ / RIN3 + AIN-bias 6 4 VOP-ADC-minus R88 10k 4 C33 22u + RIN3 - DIFF + SINGLE + JP22 HIF3G-50P-2.54DSA (3x1) RIN3 (RIN3+ / RIN3-) R87 47K 2 3 1 - J6 MR-552LS RIN3 (RIN3+ / RIN3-) R86 4.7K U8A NJM5532 VOP-ADC-plus JP24 HIF3G-50P-2.54DSA (2x1) RIN3- RIN3GND C35 10u TEST12 + C RIN3- C JP25 HIF3G-50P-2.54DSA (2x1) VA VA JP26 HIF3G-50P-2.54DSA (2x1) R90 10k AIN-bias C36 0.1u C37 10u + R91 10k B B A A - 86- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number Rev ANALOG INPUT RCA-3 Friday, August 09, 2013 1 Sheet 0 3 of 11 5 4 TEST13 LOUT1+ / LOUT1 R92 (open) D JP27 HIF3G-50P-2.54DSA (3x1) LOUT1+ / LOUT1 R94 4.7K TEST101 R95 LOUT1- 4.7K R114 (open) JP30 HIF3G-50P-2.54DSA (3x1) ROUT1+ / ROUT1 LOUT2- LOUT2- JP34 HIF3G-50P-2.54DSA (2x1) LOUT2- C54 22u R119 (open) B TEST19 ROUT2+ / ROUT2 C59 22u R125 (open) ROUT2- JP37 HIF3G-50P-2.54DSA (2x1) ROUT2- C61 22u R130 (open) LOUT1 2 3 1 ROUT1 2 3 1 LOUT2 2 3 1 J7 MR-552LS LOUT1 C43 (open) ROUT1 R105 4.7K TEST102 R106 4.7K ROUT1- C46 470p R107 180 C49 (open) 4 VOP-DAC-minus C48 3900p R110 (open) 2 R111 4.7K R112 180 R113 4.7K NJM5532 U9A 1 8 3 ROUT1+ SINGLE ROUT1 DIFF JP32 HIF3G-50P-2.54DSA (3x1) ROUT1 J8 MR-552LS ROUT1 C C50 (open) VOP-DAC-plus C51 R109 (short) 470p TEST203 JP33 HIF3G-50P-2.54DSA (3x1) LOUT2+ / LOUT2 SINGLE LOUT2 DIFF R115 (open) R116 4.7K TEST103 R117 4.7K LOUT2- C53 470p R118 180 VOP-DAC-minus C55 3900p R120 (open) C56 (open) 6 5 LOUT2+ R122 4.7K R123 180 R124 4.7K NJM5532 U10B 7 SINGLE LOUT2 DIFF JP35 HIF3G-50P-2.54DSA (3x1) LOUT2 J9 MR-552LS LOUT2 B C57 (open) VOP-DAC-plus C58 R121 (short) 470p TEST204 JP36 HIF3G-50P-2.54DSA (3x1) ROUT2+ / ROUT2 SINGLE ROUT2 DIFF R126 (open) R127 4.7K TEST104 R128 4.7K ROUT2- C62 3900p R131 (open) C60 470p R129 180 VOP-DAC-minus + TEST20 ROUT2- R99 (short) DIFF R104 (open) + ROUT2+ / ROUT2 SINGLE + TEST18 JP29 HIF3G-50P-2.54DSA (3x1) LOUT1 TEST202 + C52 22u DIFF 470p 4 LOUT2+ / LOUT2 SINGLE LOUT1 VOP-DAC-plus 8 TEST17 LOUT2+ / LOUT2 7 C44 C63 (open) 4 R108 (open) C R101 180 R102 4.7K 2 3 ROUT2+ R133 4.7K R134 180 R135 4.7K 8 ROUT1- C47 22u R100 4.7K NJM5532 U9B 8 LOUT1+ + ROUT1- JP31 HIF3G-50P-2.54DSA (2x1) 4 + 5 + R103 (open) 6 C65 NJM5532 U10A 1 SINGLE ROUT2 + C45 22u R98 (open) C42 (open) - ROUT1+ / ROUT1 C41 3900p + TEST15 ROUT1- D - R97 (open) TEST16 C39 470p R96 180 VOP-DAC-minus LOUT1- ROUT1+ / ROUT1 R93 (open) + LOUT1- C40 22u LOUT1 DIFF - LOUT1- JP28 HIF3G-50P-2.54DSA (2x1) SINGLE + TEST14 1 TEST201 + C38 22u 2 - LOUT1+ / LOUT1 3 DIFF JP38 HIF3G-50P-2.54DSA (3x1) ROUT2 R132 (short) ROUT2 2 3 1 J10 MR-552LS ROUT2 C64 (open) VOP-DAC-plus 470p A A - 87- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number Rev ANALOG OUTPUT RCA-1 / RCA-2 Friday, August 09, 2013 1 Sheet 4 of 0 11 5 4 TEST21 LOUT3+ / LOUT3 R136 (open) 2 1 TEST205 JP39 HIF3G-50P-2.54DSA (3x1) LOUT3+ / LOUT3 + LOUT3+ / LOUT3 C66 22u 3 SINGLE LOUT3 DIFF R137 (open) R138 4.7K D D JP42 HIF3G-50P-2.54DSA (3x1) ROUT3+ / ROUT3 R158 (open) LOUT4- JP46 HIF3G-50P-2.54DSA (2x1) LOUT4- B C82 22u R163 (open) TEST27 ROUT4+ / ROUT4 C87 22u R169 (open) ROUT3- ROUT4- JP49 HIF3G-50P-2.54DSA (2x1) ROUT4- C89 22u R174 (open) R150 4.7K 8 ROUT3 2 3 1 LOUT4 2 3 1 ROUT4 2 3 1 LOUT3 C71 (open) VOP-DAC-minus C76 3900p R153 (open) C77 (open) 2 ROUT3+ R155 4.7K R156 180 R157 4.7K NJM5532 U11A 1 8 3 SINGLE ROUT3 DIFF JP44 HIF3G-50P-2.54DSA (3x1) ROUT3 J12 MR-552LS C ROUT3 C78 (open) VOP-DAC-plus C79 R154 (short) 470p TEST207 JP45 HIF3G-50P-2.54DSA (3x1) LOUT4+ / LOUT4 SINGLE LOUT4 DIFF R159 (open) R160 4.7K TEST107 LOUT4- R161 4.7K C81 470p R162 180 VOP-DAC-minus C83 3900p R164 (open) C84 (open) 6 5 LOUT4+ R166 4.7K R167 180 R168 4.7K NJM5532 U12B 7 SINGLE LOUT4 DIFF JP47 HIF3G-50P-2.54DSA (3x1) LOUT4 J13 MR-552LS B LOUT4 C85 (open) VOP-DAC-plus C86 R165 (short) 470p TEST208 JP48 HIF3G-50P-2.54DSA (3x1) ROUT4+ / ROUT4 SINGLE ROUT4 DIFF R170 (open) R171 4.7K TEST108 ROUT4- R172 4.7K C88 470p R173 180 VOP-DAC-minus C90 3900p R175 (open) C91 (open) 2 3 ROUT4+ A R177 4.7K R178 180 R179 4.7K C93 NJM5532 U12A 1 SINGLE ROUT4 DIFF VOP-DAC-plus JP50 HIF3G-50P-2.54DSA (3x1) ROUT4 R176 (short) A Title Date: 3 ROUT4 C92 (open) Size A2 4 J14 MR-552LS 470p - 885 J11 MR-552LS C74 470p R151 180 4 TEST106 + TEST28 ROUT4- 2 3 1 R149 4.7K + ROUT4+ / ROUT4 LOUT3 ROUT3 + TEST26 LOUT4- R143 (short) DIFF R148 (open) + C80 22u DIFF JP41 HIF3G-50P-2.54DSA (3x1) LOUT3 VOP-DAC-plus SINGLE 4 LOUT4+ / LOUT4 SINGLE LOUT3 470p 8 TEST25 LOUT4+ / LOUT4 4 + R152 (open) 7 C72 4 ROUT3- C C75 22u R145 180 R146 4.7K 8 ROUT3- JP43 HIF3G-50P-2.54DSA (2x1) R144 4.7K NJM5532 U11B TEST206 + TEST24 ROUT3- 6 5 LOUT3+ + R147 (open) C70 (open) + C73 22u VOP-DAC-minus C69 3900p R142 (open) - ROUT3+ / ROUT3 R140 180 + TEST23 R139 4.7K - R141 (open) ROUT3+ / ROUT3 LOUT3- + LOUT3- C68 22u - JP40 HIF3G-50P-2.54DSA (2x1) + LOUT3- C67 470p - TEST22 LOUT3- TEST105 2 AKD4612-A Document Number ANALOG OUTPUT RCA-3 / RCA-4 Friday, August 09, 2013 1 Sheet 5 of 11 Rev 0 5 4 3 VDD R224 10pin-MCLK DIR-AK4114-MCKO1 D AK4612-XTI/MCKI R225 10k JP63 HIF3G-50P-2.54DSA (4x2) BNC 10-pin DIR DIT 1 AK4612-TVDD1 R36 10k EXT-MCLK 2 R37 10k 10k U15 4 5 AK4612-PDN-SW3 6 AK4612-MCKO-Buffer 7 DIT-AK4114-MCKO1 2 3 15 14 1 VDD C122 8 0.1u 1A1 1B1 1A2 1B2 2A1 2B1 2A2 2B2 13 AK4612-XTI / MCKI 12 AK4612-PDN 11 AK4612-MCKO 10 D 1DIR 2DIR 1OE 2OE VCCAVCCB GND GND 16 AK4612-TVDD1 9 C123 0.1u 74AVC4T245 R226 10k JP64 HIF3G-50P-2.54DSA (4x2) R228 10k DIR-AK4114-BICK 4 5 6 AK4612-BICK DIT-AK4114-BICK JP66 HIF3G-50P-2.54DSA (4x2) 7 AK4612-LRCK-Buffer VDD BNC 10-pin DIR DIT EXT-LRCK 10pin-LRCK DIR-AK4114-LRCK R229 10k U16 BNC 10-pin DIR DIT EXT-BICK 10pin-BICK C R227 10k AK4612-BICK-Buffer Slave Master JP65 HIF3G-50P-2.54DSA (3x1) AK4612-Master/Slave 2 3 15 14 AK4612-LRCK DIT-AK4114-LRCK 1 VDD C124 0.1u 8 1A1 1B1 1A2 1B2 2A1 2B1 2A2 2B2 13 AK4612-BICK 12 AK4612-LRCK 11 10 1DIR 2DIR C 1OE 2OE VCCAVCCB GND GND 16 9 AK4612-TVDD1 C125 0.1u 74AVC4T245 AK4612-MCKO-Buffer J19 MR-552LS DIR-AK4114-XTI EXT-MCLK 2 3 1 EXT-MCLK DIR-AK4114-XTI GND DIT-AK4114-MCKO1 BNC 10-pin CODEC DIT 10pin-BICK AK4612-BICK-Buffer VDD 10pin-BICK U17A 1 JP70 HIF3G-50P-2.54DSA (4x2) EXT-BICK 10pin-MCLK THR JP68 HIF3G-50P-2.54DSA (2x1) R232 51 DIR-AK4114-BICK 74AC14 JP69 HIF3G-50P-2.54DSA (3x1) BICK-THR/INV 2 R230 51 R231 51 MCLK INV BICK 7 BNC 10-pin CODEC DIT 10pin-MCLK 14 JP67 HIF3G-50P-2.54DSA (4x2) EXT-MCLK R233 10pin-LRCK 51 LRCK DIR-AK4114-BICK DIT-AK4114-BICK J20 MR-552LS JP71 HIF3G-50P-2.54DSA (4x2) B BNC 10-pin CODEC DIT EXT-LRCK 10pin-LRCK AK4612-LRCK-Buffer DIR-AK4114-LRCK EXT-BICK R234 R235 220k 2 3 1 220k R236 220k PORT1 A1-10PA-2.54DSA 1 3 5 7 9 2 4 6 8 10 OUTPUT R237 220k B EXT-BICK GND JP72 HIF3G-50P-2.54DSA (2x1) DIR-AK4114-LRCK DIT-AK4114-LRCK R238 51 R239 51 JP75 HIF3G-50P-2.54DSA (4x2) 10pin-BICK 14 6 8 U17E 11 74AC14 10 DIT-AK4114-BICK 14 EXT-BICK AK4612-BICK-Buffer U17D 9 74AC14 U17C 5 74AC14 14 DIT-AK4114-XTI 74AC14 4 7 JP74 HIF3G-50P-2.54DSA (2x1) U17B 3 14 GND DIR-AK4114-MCKO1 BNC 10-pin CODEC DIR VDD 14 EXT-LRCK 7 AK4612-MCKO-Buffer DIT-AK4114-XTI VDD 2 3 1 7 EXT-MCLK 10pin-MCLK EXT-LRCK U17F 13 DIT-AK4114-BICK 74AC14 DIR-AK4114-BICK 12 7 BNC 10-pin CODEC DIR 7 J21 MR-552LS JP73 HIF3G-50P-2.54DSA (4x2) JP76 HIF3G-50P-2.54DSA (4x2) BNC 10-pin CODEC DIR EXT-LRCK A 10pin-LRCK AK4612-LRCK-Buffer DIT-AK4114-LRCK A DIT-AK4114-LRCK DIR-AK4114-LRCK - 89- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number DIGITAL INPUT OUTPUT1 Friday, August 09, 2013 1 Sheet 6 of Rev 0 11 5 4 3 2 1 U18 SDTO DIR-AK4114-SDTO SDTO 2 3 4 5 D 6 7 8 9 1 19 20 VDD C126 10 0.1u A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 A8 Y8 18 SDTO 17 SDTI6 16 SDTI5 15 SDTI4 14 SDTI3 13 SDTI2 12 SDTI1 D 11 /OE1 /OE2 VCC GND 74LVC541 R245 R244 (open) (open) R243 10k R242 R241 10k 10k R240 10k U19 3 TST8 4 TST7 C 5 AK4612-SDTI4 6 AK4612-SDTI3 7 AK4612-SDTI2 8 AK4612-SDTI1 9 10 2 22 1 AK4612-TVDD1 11 C127 0.1u 12 A1 21 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 SDTI6 19 17 SDTI5 16 15 SDTI4 24 VDD 23 DIR 10pin GND SDTI3 C128 (open) PORT3 A1-10PA-2.54DSA 2 4 6 7 8 9 10 SDTI6 1 3 SDTI5 5 SDTI4 C OUTPUT R250 (open) R249 51 GND GND JP203 HIF3G-50P-2.54DSA (3x2) 0.1u 13 GND DIR 10pin GND R251 GND JP204 HIF3G-50P-2.54DSA (3x2) OE GND VCCB JP205 (open) SDTI2 14 VCCAVCCB DIR 10pin GND SDTI1 18 DIR GND JP206 (open) 20 SDTI3 74AVC8T245 DIR 10pin GND SDTI4 R248 51 GND SDTI2 SDTI1 JP202 HIF3G-50P-2.54DSA (3x2) SDTI2 DIR 10pin GND SDTI5 PORT2 A1-10PA-2.54DSA 2 4 6 8 10 SDTI3 1 3 5 7 9 OUTPUT R247 51 R246 51 GND JP201 HIF3G-50P-2.54DSA (3x2) SDTI1 DIR 10pin GND SDTI6 GND B B JP207 HIF3G-50P-2.54DSA (3x2) DIT-AK4114-DAUX SDTO3 SDTO2 SDTO1 SDTO SDTO R254 10k R253 10k R252 10k U20 4 AK4612-SDTO3 5 AK4612-SDTO2 6 AK4612-SDTO1 7 2 3 A 15 14 1 AK4612-TVDD1 C129 0.1u 8 1A1 1B1 1A2 1B2 2A1 2B1 2A2 2B2 PORT4 A1-10PA-2.54DSA 2 4 6 8 10 13 R257 51 SDTO3 1 12 R256 51 SDTO2 11 R255 51 SDTO1 10 3 5 7 9 TEST37 DZF1/OVF1 TEST38 DZF2/OVF2 AK4612-DZF1 / OVF1 OUTPUT AK4612-DZF2 / OVF2 1DIR 2DIR A 1OE 2OE VCCAVCCB GND GND 16 9 VDD C130 0.1u 74AVC4T245 - 90- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number DIGITAL INPUT OUTPUT2 Thursday, November 21, 2013 1 Sheet 7 of Rev 0 11 5 4 3 2 1 D D VDD PORT5 A1-10PA-2.54DSA 10 9 CSN 8 7 CCLK / SCL 6 5 CDTI / SDA 4 3 CDTO / SDA 2 1 AK4612-TVDD2 R258 10k R259 R260 10k R261 10k R262 1k 10k R263 10k U21 (ACK) uP-I/F R264 470 4 R265 470 5 R266 470 6 7 4-wire AK4612-4-wire/I2C 2B1 2B2 AK4612-CSN 12 AK4612-CCLK / SCL 11 AK4612-CDTI / SDA / SDA (ACK) 10 AK4612-CDTO 1OE 2OE 1 C131 2A1 13 2DIR 14 VDD 1B2 1DIR 3 15 JP92 HIF3G-50P-2.54DSA (3x1) 1B1 1A2 2A2 2 I2C 1A1 VCCAVCCB 8 GND 0.1u GND 16 AK4612-TVDD2 9 C132 0.1u 74AVC4T245 AK4612-TVDD2 R267 10k C R268 (open) C U22 4 5 6 7 2 3 15 14 1 VDD C133 0.1u 8 1A1 1B1 1A2 1B2 2A1 2B1 2A2 2B2 13 12 11 10 1DIR 2DIR 1OE 2OE VCCAVCCB GND GND 16 AK4612-TVDD2 9 C134 0.1u 74AVC4T245 JP93 HIF3G-50P-2.54DSA (3x1) CDTO / SDA (ACK) CDTO R269 (short) SDA (ACK) R270 (short) B B A A - 91- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number DIGITAL INPUTSheet OUTPUT3 8 of Friday, August 09, 2013 1 Rev 0 11 5 4 3 2 1 VDD L1 47u PORT6 VCC RX(OPT) GND OUT 3 C135 0.1u 2 1 R271 470 OPT RX D D COAX 0.1u VDD 10u 0.1u 1 DIR-AK4114-MODE 9 8 7 6 5 4 3 2 1 AVSS 39 40 VCOM 41 42 RX0 43 R273 18k IPS0 INT0 U24A 1 36 3 47K 5 C NC OCKS0 DIF0 OCKS1 TEST2 CM1 DIF1 7 U25B 3 74HC14 4 8 0.1u 9 VDD INT0 C 31 DIR-AK4114-XTI DIF2 XTI 30 C140 IPS1 XTO P/SN DAUX XTL0 MCKO2 XTL1 BICK 29 10p HC-49/U 24.576MHz C141 10p 28 2 VDD LED1 SML-210LT 1 32 X2 C142 SW5 ATE1D-2M3 PDN 2 33 2 2 14 VDD NC 1k R274 34 7 U25A 1 74HC14 1 14 1 10k VDD H 3 L R275 7 2 6 D2 HSU119 CM0 U23 AK4114 VDD 2 35 1 2 VDD 14 0.47u 74AC14 4 0.1u 26 DIR-AK4114-BICK DIR-AK4114-SDTO LRCK 25 24 MCKO1 23 DVSS DVDD 22 27 DIR-AK4114-LRCK C146 + 10u DIR-AK4114-MCKO1 B + 10u VDD VDD 14 74AC14 10 7 U24E 11 8 7 U24D 9 74AC14 6 7 U24C 5 74AC14 14 74AC14 4 7 U24B 3 14 VDD 14 VDD C144 0.1u C145 B 21 VOUT UOUT 20 19 COUT 18 17 DVSS 14 13 C143 BOUT SDTO TX1 VIN TVDD 12 16 11 TX0 10 15 PDN-DIR-AK4114 NC 44 RX1 45 46 RX2 47 NC RX3 48 VDD 7 C139 16 15 14 13 12 11 10 9 TEST1 RP3 1 2 3 4 5 6 7 8 + DIF2 DIF1 DIF0 CM1 CM0 OCKS1 OCKS0 37 C138 SW4 INT1 C137 38 75 AVDD C136 R272 + 2 3 1 RX(COAX) JP94 HIF3G-50P-2.54DSA (3x1) R J22 MR-552LS A 14 A 74AC14 12 7 U24F 13 - 92- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number DIR AK4114 Friday, August 09, 2013 1 Sheet 9 Rev 0 of 11 5 4 3 2 1 PORT7 3 2 IN VCC TX(OPT) VDD 1 GND OPT C147 0.1u COAX D T1 DA-02F 2 3 1 TX(COAX) JP95 HIF3G-50P-2.54DSA (3x1) VDD 240 R276 C148 0.1u C149 R277 150 + J23 MR-552LS TX 10u D 0.1u C150 1:1 C151 1 2 DIT-AK4114-MODE 9 8 7 6 5 4 3 2 1 3 4 5 47K 6 7 VDD 37 INT1 AVDD 39 40 R AVSS VCOM 41 42 RX0 43 NC 44 RX1 45 TEST1 46 RX2 NC IPS0 INT0 NC OCKS0 DIF0 OCKS1 TEST2 CM1 DIF1 CM0 U26 AK4114 NC PDN 36 35 34 33 32 31 DIT-AK4114-XTI DIF2 XTI 30 C152 X3 1 6 14 VDD U25D 9 74HC14 VDD P/SN DAUX XTL0 MCKO2 XTL1 BICK 29 9 28 C 24.576MHz 2 XTO 10p HC-49/U C153 10p DIT-AK4114-DAUX 8 10 7 U25C 5 74HC14 27 C154 0.1u 11 26 DIT-AK4114-BICK 2 SW7 ATE1D-2M3 0.1u 0.1u C157 LRCK 25 24 MCKO1 DVSS 22 C156 23 DVDD 21 VOUT UOUT 20 19 COUT 18 17 16 DVSS 14 13 C155 BOUT SDTO TX1 VIN TVDD 12 TX0 PDN-DIT-AK4114 10k VDD H 3 L IPS1 R278 14 1 D3 HSU119 7 2 8 15 C 47 48 VDD 1 RP4 16 15 14 13 12 11 10 9 RX3 1 2 3 4 5 6 7 8 DIF2 DIF1 DIF0 CM1 CM0 OCKS1 OCKS0 38 0.47u + SW6 DIT-AK4114-LRCK C158 10u 10u + + DIT-AK4114-MCKO1 VDD VDD B B 14 VDD 10 14 7 U25E 11 74HC14 U25F 13 74HC14 A 12 7 A - 93- Title Size A2 Date: 5 4 3 2 AKD4612-A Document Number DIT AK4114 Friday, August 09, 2013 1 Sheet 10 Rev 0 of 11 5 4 3 2 1 L2 AGND AGND C172 + +3.3V AVDD2 T-45(R) +3.3V AVDD1 T-45(R) +3.3V TVDD2 +3.3V TVDD1 T-45(R) +1.8V DVDD T-45(R) T-45(R) +3.3V VDD DGND T-45(R) T-45(BK) (Short) L16 AGND T-45(R) 1 47u AVDD2 JACK AVDD2 +12V VOPPLUS AGND VOPminus VOPplus AVDD2 AVDD1 TVDD2 1 0.1u (short) C162 T-45(R) 1 + -12V VOPMINUS T-45(BK) AK4612-AVDD2 1 0.1u AGND AGND D C161 AGND R287 JP101 HIF3G-50P-2.54DSA (3x1) 1 47u C160 REG 1 + L15 3 1 C159 OUT 2 (short) IN 1 1 GND L4 1 VA (short) T2 LT1963AEST-3.3 1 +12V-->+3.3V VOPplus TVDD1 DVDD VDD DGND D (short) 47u JP100 HIF3G-50P-2.54DSA (2x1) AGND L13 REG AK4612-AVDD1 AVDD1 JACK AVDD1 GND R286 JP99 HIF3G-50P-2.54DSA (3x1) (short) AGND (Short) DGND L14 C171 + (short) 47u +12V-->+3.3V AGND 1 C173 + 47u C174 IN OUT L11 3 C175 2 (short) GND T4 LT1963AEST-3.3 L18 0.1u AGND AGND AGND + 0.1u AGND R285 JP98 HIF3G-50P-2.54DSA (3x1) AK4612-TVDD2 TVDD2 JACK TVDD2 47u (Short) L12 AGND C170 C REG (short) C176 + (short) C 47u R281 L8 VOP-ADC-plus (short) AGND (Short) L7 R282 VOP-DAC-plus REG AK4612-TVDD1 TVDD1 JACK TVDD1 R280 JP97 HIF3G-50P-2.54DSA (3x1) (short) (Short) (Short) VOPminus L9 R283 L10 47u (short) C168 (Short) + C169 VOP-ADC-minus + (short) 47u R284 VOP-DAC-minus AGND (Short) AGND +3.3V-->+1.8V (short) C163 + 47u 0.1u AGND B C164 AGND IN OUT L5 3 C165 2 1 GND T3 LT1963AEST-1.8 L3 + 0.1u AGND AGND REG (short) C166 JACK DVDD 47u JP96 HIF3G-50P-2.54DSA (3x1) DVDD R279 AK4612-DVDD (Short) L6 AGND C167 + B (short) 47u for OP275GPZ (U3,4,5,6,7,8) AGND VOP-ADC-plus + + + + + L17 + REG (short) C181 10u C182 0.1u C183 10u C184 0.1u C185 10u C186 0.1u C187 10u C188 0.1u C189 10u C190 0.1u C191 10u C192 0.1u L19 for OP275GPZ (U3,4,5,6,7,8) VOP-ADC-minus C180 + + 10u C196 0.1u C197 10u + + 0.1u C195 C198 0.1u C199 10u + 10u C194 C200 0.1u C201 10u C202 0.1u C203 10u + C204 0.1u JP102 HIF3G-50P-2.54DSA (3x1) VDD R288 VDD (Short) C177 C178 C179 0.1u 0.1u 0.1u (short) for for for DGND 74HC14 74AC14 74AC14 (U25) (U17) (U24) 47u + C193 JACK VDD DGND for OP275GPZ (U9,10,11,12,13,14) VOP-DAC-plus + + + + + + A A C205 10u C206 0.1u C207 10u C208 0.1u C209 10u C210 0.1u C211 10u C212 0.1u C213 10u C214 0.1u C215 10u C216 0.1u for OP275GPZ (U9,10,11,12,13,14) VOP-DAC-minus + C219 10u + + 0.1u C220 0.1u C221 10u + C218 C222 0.1u C223 10u + 10u C224 0.1u C225 10u - 94- + C217 C226 0.1u C227 10u C228 Title 0.1u Size A2 Date: 5 4 3 2 AKD4612-A Document Number Power Supply Friday, August 09, 2013 1 Sheet Rev 0 11 of 11 AKD 4612−A−80LQFP - 95- - 96- - 97- - 98- AKD4612−A Rev.0 Evaluation Board - 99- - 100- - 101- - 102-