MPC5744P Evaluation Board 257BGA Expansion Board User's Guide

Freescale Semiconductor
User’s Guide
Document Number:
MPC5744PEEVB257UG
Rev. 1, 8/2013
Qorivva MPC5744P Evaluation
Board 257BGA Expansion Board
User’s Guide
1
Introduction
This document describes the Qorivva MPC5744P
evaluation board (EVB) expansion board for the
257BGA (part number MPC5744PE257DC). The EVB
is targeted at providing a platform for the evaluation and
development of the MPC5744P automotive MCU,
facilitating hardware and software development as well
as debugging. Settings for switches, jumpers, LEDs, and
push-buttons are shown for basic operation of the
prototype version of the EVB.
2
Features
The expansion board provides the following primary
features listed below:
• Standalone operation or use with the optional
MPC5746MMB main board
• Socketed MPC5744P in 257-pin MAPBGA
package
• Power options
This document is preliminary and is subject to change without notice.
© Freescale Semiconductor, Inc., 2012, 2013. All rights reserved.
Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Modular concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3.1 Methods of operation. . . . . . . . . . . . . . . . . . . . . . . . 3
4
EVB configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4.1 Power source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4.2 VPP_TEST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.4 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.5 I/O connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.6 Main board I/O power . . . . . . . . . . . . . . . . . . . . . . 13
4.7 PwrSBC settings . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Reset switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.1 JTAG connector. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.2 Nexus parallel trace connector . . . . . . . . . . . . . . . 16
6.3 Nexus Aurora trace connector. . . . . . . . . . . . . . . . 16
6.4 SIPI connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.5 Main board interface . . . . . . . . . . . . . . . . . . . . . . . 17
7
LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8
Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9
Port pin to main board mapping . . . . . . . . . . . . . . . . . . 23
10 Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Modular concept
•
•
•
•
•
•
3
— Power supplied via the two interface connectors when using the EVB with the optional
MPC5746MMB main board
— Power supplied via terminal block when using the EVB in standalone configuration
— Power supplied by the multi-output MC33907 PwrSBC power supply when using the EVB in
standalone configuration
Debug and trace
— JTAG connector
— Nexus parallel connector
— Nexus Aurora connector
Clocks
— 40 MHz crystal
— 8 MHz crystal oscillator
— SMA connector for external clock
I/O connectivity
— Access to port pins when using the EVB with the optional MPC5746MMB main board
— Access to SCI, CAN, and LIN physical interfaces when using the EVB with the optional
MPC5746MMB main board
— On-board CAN and LIN interfaces
— SIPI connector
Switches
— Main power on/off
— Power-on reset
— Reset
LEDs for power indication
Test points
Modular concept
The MPC5744PE257DC is part of a modular EVB hardware system that consists of:
• A common main board that provides power and access to common communication interfaces and
the MCU I/O port pins. MPC5744PE257DC is compatible with the MPC5746MMB main board.
• A package-specific expansion board to support available package types of the MPC5744P. The
MPC5744PE257DC supports the 257-pin MAPBGA package.
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EVB configuration
-0#0
,1&0
-0#0
-!0"'!
-0#--"
-AINBOARD
Figure 1. MPC5744P expansion board and main board system
3.1
Methods of operation
Power to the expansion board is supplied via three options:
1. The MPC5746MMB main board generates the 5 V/3.3 V/1.25 V supplies to the expansion board
via the interface connectors.
2. In standalone configuration, external 5 V/3.3 V/1.25 V supplies are provided to the expansion
board via the terminal block.
3. In standalone configuration, a single 12 V supply is input to the expansion board via the 2.1 mm
power connector. The PwrSBC generates the 5 V/3.3 V high-voltage power. The NPN transistor
drives the core supply using internal regulation1.
4
EVB configuration
This section provides information on how to configure the jumper settings on the EVB. Default settings
are marked as such. Figure 5 provides a top view of the EVB and shows the location of each jumper.
4.1
Power source
The default jumper settings are configured for using the EVB with the MPC5746MMB main board as
shown in Figure 2. Power is supplied from the main board to the EVB via the two interface connectors.
1. Not all expansion boards include the PwrSBC device. Check whether the PwrSBC (U2) is installed on the expansion board to
determine whether standalone operation using a single 12 V supply can be used. Refer to Figure 5 for the location of U2.
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
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3
EVB configuration
The EVB can also operate as a standalone device, in which power can be supplied from an external power
source or from the on-board PwrSBC device.
Table 1 summarizes the switch settings for the three power options.
Table 1. Switch settings — power options
Jumper
Setting
Description
J3
Choose one:
2–4 ON
3–4 ON
4–6 ON
High voltage I/O power
VDD_HV_IO — 3.3 V from PwrSBC
VDD_HV_IO — 3.3 V from main board (default)
VDD_HV_IO — 3.3 V from external supply
J2
Choose one:
2–4 ON
3–4 ON
4–6 ON
High voltage flash power
VDD_HV_FLA0 — 3.3 V from PwrSBC
VDD_HV_FLA0 — 3.3 V from main board (default)
VDD_HV_FLA0 — 3.3 V from external supply
J20
Choose one:
2–4 ON
3–4 ON
4–6 ON
High voltage oscillator power
VDD_HV_OSC0 — 3.3 V from PwrSBC
VDD_HV_OSC0 — 3.3 V from main board (default)
VDD_HV_OSC0 — 3.3 V from external supply
J21
Choose one:
2–4 ON
3–4 ON
7–8 ON
6–8 ON
8–10 ON
High voltage ADC0/2 reference
VDD_HV_ADR0 — from PwrSBC, see J24
VDD_HV_ADR0 — 3.3 V from main board (default)
VDD_HV_ADR0 — 5 V from main board
VDD_HV_ADR0 — 3.3 V from external supply
VDD_HV_ADR0 — 5 V from external supply
J22
Choose one:
2–4 ON
3–4 ON
7–8 ON
6–8 ON
8–10 ON
High voltage ADC1/3 reference
VDD_HV_ADR1 — from PwrSBC, see J24
VDD_HV_ADR1 — 3.3 V from main board (default)
VDD_HV_ADR1 — 5 V from main board
VDD_HV_ADR1 — 3.3 V from external supply
VDD_HV_ADR1 — 5 V from external supply
J25
Choose one:
2–4 ON
1–3 ON
5 V/3.3 V select for ADC reference
VDD_HV_ADR0 and VDD_HV_ADR1 — 3.3 V from PwrSBC (default)
VDD_HV_ADR0 and VDD_HV_ADR1 — 5 V from PwrSBC
J23
Choose one:
2–4 ON
3–4 ON
4–6 ON
High voltage ADC power
VDD_HV_ADV0/1 — 3.3 V from PwrSBC
VDD_HV_ADV0/1 — 3.3 V from main board (default)
VDD_HV_ADV0/1 — 3.3 V from external supply
J24
Choose one:
2–4 ON
3–4 ON
4–6 ON
High voltage PMU supply
VDD_HV_PMU — 3.3 V from PwrSBC
VDD_HV_PMU — 3.3 V from main board (default)
VDD_HV_PMU — 3.3 V from external supply
J18
Choose one:
2–4 ON
3–4 ON
4–6 ON
Low voltage supply
VDD_LV_CORE — use NPN transistor, internal regulation
VDD_LV_CORE — 1.25 V from main board, external regulation (default)
VDD_LV_CORE — 1.25 V from external supply, external regulation
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EVB configuration
4.1.1
Option 1: Power from the MPC5746MMB main board
The default configuration for the EVB power source is the main board.
In this configuration, the EVB is connected to the main board. The main board must be supplied with a
12 V input via the 2.1 mm barrel connector (P26) or the terminal block (P33). Voltage regulators on the
main board provide 5 V, 3.3 V, and 1.25 V to the MCU via the high-density expansion connectors. The
MCU core supply can be externally regulated or internally regulated using the NPN transistor.
MPC5746MMB
MPC5744P DC
12V input
P26
P33
Figure 2. Power from the main board
Table 2 shows the switch settings when power is sourced from the main board.
Table 2. Switch settings — power from main board
Jumper
Setting
J3
3–4 ON
VDD_HV_IO — 3.3 V from main board (default)
J2
3–4 ON
VDD_HV_FLA0 — 3.3 V from main board (default)
J20
3–4 ON
VDD_HV_OSC0 — 3.3 V from main board (default)
J21
Choose one:
3–4 ON
7–8 ON
VDD_HV_ADR0 — 3.3 V from main board (default)
VDD_HV_ADR0 — 5 V from main board
Choose one:
3–4 ON
7–8 ON
VDD_HV_ADR1 — 3.3 V from main board (default)
VDD_HV_ADR1 — 5 V from main board
J22
Description
J23
3–4 ON
VDD_HV_ADV0/1 — 3.3 V from main board (default)
J24
3–4 ON
VDD_HV_PMU — 3.3 V from main board (default)
J18
Choose one:
2–4 ON
3–4 ON
VDD_LV_CORE — use NPN transistor, internal regulation
VDD_LV_CORE — 1.25 V from main board, external regulation (default)
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EVB configuration
4.1.2
Option 2: Power from external supply
This configuration allows the EVB to operate in standalone configuration using external power supplies,
as shown in Figure 3. Power to the EVB is supplied via the terminal block J4 as shown in Table 4. The
core supply can be externally regulated or internally regulated using the NPN transistor.
MPC5744P DC
J4
1.25 V/3.3 V/5 V input
Figure 3. Power from external supplies
Table 3 shows the switch settings when power is sourced externally via the terminal block.
Table 3. Switch settings — power from external supply
Jumper
Setting
J3
4–6 ON
VDD_HV_IO — 3.3 V from external supply
J2
4–6 ON
VDD_HV_FLA0 — 3.3 V from external supply
J20
4–6 ON
VDD_HV_OSC0 — 3.3 V from external supply
J21
Choose one:
6–8 ON
8–10 ON
VDD_HV_ADR0 — 3.3 V from external supply
VDD_HV_ADR0 — 5 V from external supply
Choose one:
6–8 ON
8–10 ON
VDD_HV_ADR1 — 3.3 V from external supply
VDD_HV_ADR1 — 5 V from external supply
J22
Description
J23
4–6 ON
VDD_HV_ADV0/1 — 3.3 V from external supply
J24
4–6 ON
VDD_HV_PMU — 3.3 V from external supply
J18
Choose one:
2–4 ON
4–6 ON
VDD_LV_CORE — use NPN transistor, internal regulation
VDD_LV_CORE — 1.25 V from external supply, external regulation
Table 4. External power input
J4
Description
Pin 1
1.25 V
Pin 2
3.3 V
Pin 3
5V
Pin 4
GND
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EVB configuration
4.1.3
Option 3: Power from PwrSBC
This configuration allows the EVB to operate in standalone configuration using the MC33907 PwrSBC
device on the EVB as shown in Figure 4. The PwrSBC is a multi-output power supply with built-in CAN
and LIN transceivers. It generates the 5 V and 3.3 V power to the MCU. In this configuration, the core
supply is regulated internally using the NPN transistor. Power to the EVB is supplied via the 2.1 mm power
connector (P2)
Table 5 shows the switch settings when power is sourced from the PwrSBC.
MPC5744P DC
12 V input
P2
Figure 4. Power from the PwrSBC
Table 5. Switch settings — power from PwrSBC
Jumper
Setting
J3
2–4 ON
VDD_HV_IO — 3.3 V from PwrSBC
J2
2–4 ON
VDD_HV_FLA0 — 3.3 V from PwrSBC
J20
2–4 ON
VDD_HV_OSC0 — 3.3 V from PwrSBC
J21
2–4 ON
VDD_HV_ADR0 — from PwrSBC, see J25
J22
2–4 ON
VDD_HV_ADR1 — from PwrSBC, see J25
J25
Choose one:
2–4 ON
1–3 ON
VDD_HV_ADR0 and VDD_HV_ADR1 — 3.3 V from PwrSBC (default)
VDD_HV_ADR0 and VDD_HV_ADR1 — 5 V from PwrSBC
Choose one:
2–4 ON
VDD_HV_ADV0/1 — 3.3 V from PwrSBC
Choose one:
2–4 ON
VDD_HV_PMU — 3.3 V from PwrSBC
J23
J24
J18
4.2
2–4 ON
Description
VDD_LV_CORE — use NPN transistor, internal regulation
VPP_TEST
The VPP_TEST switch (J6) must be pulled low to allow Debug mode to be entered.
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EVB configuration
Table 6. Switch settings —VPP_TEST
J6
Choose one:
1–2 ON
2–3 ON
4.3
Description
Pull VPP_TEST high
Pull VPP_TEST low (default)
Boot configuration
Table 7 shows the J7 switch settings to configure the boot configuration. When booting from UART or
CAN, connect the expansion board to the main board and use the interface connectors described below.
Table 7. Switch settings — boot configuration
J7
4.4
Description
1–2 ON
3–4 ON
5–6 ON
FAB:ABS2:ABS1 = 000 (default)
Normal boot
1–2 OFF
3–4 ON
5–6 ON
FAB:ABS2:ABS1 =100
Boot from UART
Connect expansion board to main board.
Use main board RS-232 connector J19.
1–2 OFF
3–4 ON
5–6 OFF
FAB:ABS2:ABS1 =10
Boot from CAN
Connect expansion board to main board.
Use main board CAN connector J5.
Clocks
The EVB provides the following options for clock sources:
• Default: 40 MHz crystal (Y201)
• 8 MHz crystal oscillator (Y200)
• External clock input via SMA connector (J12)
The default clock source is the 40 MHz crystal. Changing the clock source to the 8 MHz crystal oscillator
or the external clock input requires configuring jumpers as shown in Table 8.
Table 8. Clock source configuration
Clock Source
40 MHz crystal
Configuration
JP200 1–2 OFF (default)
JP201 1–2 OFF (default)
JP202 1–2 ON (default)
JP203 1–2 OFF (default)
JP204 1–2 OFF (default)
J13 1–2 ON (default)
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EVB configuration
Table 8. Clock source configuration (continued)
Clock Source
Configuration
8 MHz oscillator
JP200 1–2 OFF (default)
JP201 1–2 ON
JP202 1–2 OFF
JP203 1–2 OFF (default)
JP204 1–2 ON
J13 1–2 ON (default)
External clock
JP200 1–2 ON
JP201 1–2 ON
JP202 1–2 OFF
JP203 1–2 ON
JP204 1–2 OFF (default)
J13 1–2 OFF
Table 9 shows the configuration to enable the termination of EXTAL to GND. This jumper should be
connected when using the external clock via the SMA connector.
Table 9. EXTAL termination
JP200
1–2 ON
1–2 OFF
Description
50 ohm termination of EXTAL to GND enabled
50 ohm termination of EXTAL to GND disabled (default)
Table 10 shows the configuration to enable the XTAL connection to GND. This jumper should be
connected when using the 8 MHz oscillator or the external clock via SMA connector.
Table 10. XTAL to GND connection
JP201
1–2 ON
1–2 OFF
Description
XTAL to GND connection enabled
XTAL to GND connection disabled (default)
Table 11 shows the configuration to enable the external clock to connect to EXTAL.
Table 11. 40 MHz crystal output enable/disable
JP202
1–2 ON
1–2 OFF
Description
40 MHz crystal output enabled (default)
40 MHz crystal output disabled
Table 12 shows the configuration to enable the external clock to connect to EXTAL.
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EVB configuration
Table 12. External clock enable/disable
JP203
1–2 ON
1–2 OFF
Description
External clock via SMA connector output enabled
External clock via SMA connector output disabled (default)
Table 13 shows the configuration to enable the 8 MHz oscillator output to connect to EXTAL.
Table 13. 8 MHz oscillator output enable/disable
JP204
1–2 ON
1–2 OFF
Description
8 MHz oscillator output enabled
8 MHz oscillator output disabled (default)
Table 14 shows the configuration to enable the 8 MHz oscillator.
Table 14. 8 MHz oscillator enable/disable
J13
Description
1–2 ON
1–2 OFF
4.5
8 MHz oscillator disabled (default)
8 MHz oscillator enabled
I/O connectivity
Some of the MCU’s I/Os are routed to the main board and the PwrSBC.
4.5.1
DSPI0 connectivity
Jumper J19 allows the DSPI0 signals to be routed to the main board or to the PwrSBC.
When the expansion board is powered by the main board, J19 should be configured to connect the DSPI0
signals to the main board. The DSPI0 signals can be accessed on the main board from the port pin
connectors as shown in Table 32.
When the expansion board is powered by the PwrSBC, J19 should be configured to connect the DSPI0
signals to the PwrSBC to allow communication between the MCU and the PwrSBC via SPI.
Table 15 shows the J19 switch settings.
Table 15. Switch settings — DSPI and ADC0 connectivity
J19
Choose one:
1–2 ON
2–3 ON
Description
DSPI0 SOUT connectivity
Connect DSPI0 SOUT (PC6) to PwrSBC
Connect DSPI0 SOUT (PC6) to main board (default)
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EVB configuration
Table 15. Switch settings — DSPI and ADC0 connectivity (continued)
J19
4.5.2
Description
Choose one:
4–5 ON
5–6 ON
DSPI0 SIN connectivity
Connect DSPI0 SIN (PC7) to PwrSBC
Connect DSPI0 SIN (PC7) to main board (default)
Choose one:
7–8 ON
8–9 ON
DSPI0 SCK connectivity
Connect DSPI0 SCK (PC5) to PwrSBC
Connect DSPI0 SCK (PC5) to main board (default)
Choose one:
10–11 ON
11–12 ON
DSPI0 CS0 connectivity
Connect DSPI0 CS0 (PC4) to PwrSBC
Connect DSPI0 CS0 (PC4) to main board (default)
FlexCAN_0 connectivity
Jumper J17 allows the FlexCAN_0 TXD/RXD (PB0/PB1) signals to be routed to the main board or to the
PwrSBC.
When the EVB is powered by the main board, J17 should be configured to connect to the CAN interface
of the main board. The FlexCAN_0 signals are connected to the main board CAN transceiver that is
accessed via the J5 DB9 connector on the main board. The FlexCAN_0 signals can be accessed on the
main board from the port pin connectors as shown in Table 32.
When the EVB is powered by the PwrSBC, J17 should be configured to connect the FlexCAN_0
TXD/RXD (PB0/PB1) signals to the PwrSBC as shown in Table 16. The PwrSBC’s built-in CAN
transceiver connects to the J8 DB9 interface connector on the expansion board.
Table 16 shows the switch settings for J17.
Table 16. Switch settings — CAN0 and LIN0 connectivity
J17
Description
Choose one:
4–5 ON
FlexCAN0_TXD Connectivity
Connect FlexCAN_0 TXD (PB0) to PwrSBC. Use J8 DB9 connector on the expansion
board.
5–6 ON
Connect FlexCAN_0 TXD (PB0) to main board. Use J5 DB9 connector on main board.
(default)
Choose one:
1–2 ON
FlexCAN0_RXD Connectivity
Connect FlexCAN_0 RXD (PB1) to PwrSBC. Use J8 DB9 connector on the expansion
board.
2–3 ON
Connect FlexCAN_0 RXD (PB1) to main board. Use J5 DB9 connector on main board.
(default)
Choose one:
10–11 ON
11–12 ON
LINFlexD_0 TXD Connectivity
Connect LINFlexD_0 TXD (PB2) to PwrSBC. Use J15 Molex connector on the expansion
board.
Connect LINFlexD_0 TXD (PB2) to main board. Use J19 DB9 connector on the main
board. (default)
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EVB configuration
Table 16. Switch settings — CAN0 and LIN0 connectivity (continued)
J17
Description
Choose one:
7–8 ON
LINFlexD_0 RXD Connectivity
Connect LINFlexD_0 RXD (PB3) to PwrSBC. Use J15 Molex connector on the expansion
board.
8–9 ON
4.5.3
Connect LINFlexD_0 RXD (PB3) to main board. Use J19 DB9 connector on the main
board. (default)
LINFlexD_0 connectivity
Jumper J17 allows the LINFlexD_0 TXD/RXD (PB2/PB3) signals to be routed to the main board or the
PwrSBC.
When the EVB is powered by the main board, J17 should be configured to connect to the LIN interface on
the main board. The LINFlexD_0 signals are connected to the main board eSCI/RS-232 transceiver that is
accessed via the J19 DB9 connector on the main board. The LINFlexD_0 signals can be accessed on the
main board from the port pin connectors as shown in Table 32.
When the EVB is powered by the PwrSBC, J17 should be configured to connect the LINFlexD_0 signals
to the PwrSBC as shown in Table 16. The PwrSBC’s built-in LIN transceiver connects to the J16 Molex
connector on the expansion board.
Table 16 shows the switch settings for J17.
4.5.4
FlexCAN_1 connectivity
The FlexCAN_1 TXD/RXD (PA14/PA15) signals are routed to the main board via the interface
connectors. The FlexCAN_1 signals are connected to the main board CAN transceiver that is accessed via
the J6 DB9 connector on the main board.
4.5.5
LINFlexD_1 connectivity
The LINFlexD_1 TXD/RXD (PF14/PF15) signals are routed to the main board via the interface
connectors. The LINFlexD_1 signals are connected to the main board LIN transceiver that is accessed via
the J4 Molex connector on the main board. The LINFlexD_1 signals can be accessed on the main board
from the port pin connectors as shown in Table 32.
4.5.6
FlexRay_A connectivity
The FlexRay_A TX/RX/TXEN (PD3/PD2/PD4) signals are routed to the main board via the interface
connectors. The FlexRay_A signals are connected to the main board FlexRay transceiver that is accessed
via the J2 DB9 connector on the main board.
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EVB configuration
4.5.7
FlexRay_B connectivity
The FlexRay_B TX/RX/TXEN (PD0/PD1/PC15) signals are routed to the main board via the interface
connectors. The FlexRay_B signals are connected to the main board FlexRay transceiver that is accessed
via the J2 DB9 connector on the main board.
4.5.8
Ethernet Connectivity
The Ethernet signals are routed to the main board via the interface connectors. The Ethernet signals
connect to the 10/100 Mbps PHY transceiver on the main board via the J7 RJ45 connector.
4.6
Main board I/O power
Jumper J14 on the EVB selects between 3.3 V and 5 V for power to the main board transceivers. The main
board transceivers are powered by VDD_HV_IO_MAIN. The default power to VDD_HV_IO_MAIN is
3.3 V.
Table 17. Switch settings — main board VDD_HV_IO_MAIN
J14
Choose one:
1–2 ON
2–3 ON
4.7
Description
VDD_HV_IO_MAIN is 5 V
VDD_HV_IO_MAIN is 3.3 V (default)
PwrSBC settings
This section includes settings related to the PwrSBC. Jumper settings in this section have no effect when
the EVB is powered by the main board or by external supplies. These settings only apply when the EVB
is powered by the PwrSBC.
4.7.1
CAN termination
When the CAN interface on the expansion board is used, jumper J8 provides termination resistors to the
CANH and CANL pins of the PwrSBC transceiver.
Table 18 shows the J8 switch settings to enable or disable the PwrSBC CAN termination resistors.
Table 18. Switch settings — PwrSBC CAN termination resistors
J8
Description
1–3 ON
1–3 OFF
Enable PwrSBC CANL termination resistor (default)
Disable PwrSBC CANL termination resistor
2–4 ON
2–4 OFF
Enable PwrSBC CANH termination resistor (default)
Disable PwrSBC CANH termination resistor
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
13
EVB configuration
4.7.2
LIN master/slave configuration
Table 19 shows the J15 switch settings to configure the PwrSBC LIN interface in master or slave
configuration.
Table 19. Switch settings —PwrSBC LIN master/slave configuration
J15
1–2 ON
1–2 OFF
4.7.3
Description
PwrSBC LIN is in master configuration (default)
PwrSBC LIN is in slave configuration
NMI_B and RESET _B
Jumper J1 allows the MCU’s NMI_B and RESET_B signals to be routed to the PwrSBC. Table 20 shows
the J1 switch settings.
Table 20. Switch settings — NMI_B and RESET_B connectivity
J1
4.7.4
Description
1–2 ON
1–2 OFF
Connect NMI_B to PwrSBC
Do not connect NMI_B to PwrSBC (default)
3–4 ON
3–4 OFF
Connect RESET_B to PwrSBC
Do not connect RESET_B to PwrSBC (default)
PwrSBC IO_0:5
Table 21 shows the J9 jumper which allows access to the PwrSBC IO_x pins. The IO_x pins are inputs to
the PwrSBC for monitoring various signals.
J9 also provides connection between the FCCU_F[0:1] and PwrSBC IO_2:3 pins to allow the PwrSBC to
monitor the status of the MCU’s FCCU error output pins.
Table 21. Switch settings —PwrSBC IO_0:5
J9
Description
2
PwrSBC IO_0
4
PwrSBC IO_1
6
PwrSBC IO_2
8
PwrSBC IO_3
10
PwrSBC IO_4
12
PwrSBC IO_5
5–6 ON
5–6 OFF
Connect FCCU_F0 to PwrSBC IO_2
Do not connect FCCU_F0 to PwrSBC IO_2 (default)
7–8 ON
7–8 OFF
Connect FCCU_F1 to PwrSBC IO_3
Do not connect FCCU_F1 to PwrSBC IO_3 (default)
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Freescale Semiconductor
Reset switches
5
Reset switches
The push-button switches (SW1 and SW2) provide external power-on-reset and reset to the MCU.
Table 22 shows the reset switches.
Table 22. Reset switches
Switches
6
Description
SW1
EXT_POR_B for external power-on reset
SW2
RESET_B for functional reset
Connectors
Table 23 lists the connectors available on the EVB.
Table 23. Connectors
Connector
6.1
Description
P1
38-pin Nexus parallel trace
P2
2.1 mm barrel connector for standalone configuration using PwrSBC
J4
4-pin terminal block for standalone configuration using external power
J5
14-pin JTAG
J10
34-pin Nexus Aurora trace
J11
DB-9 PwrSBC CAN interface
J12
SMA external clock
J16
Molex PwrSBC LIN interface
J26
SIPI Connector
J200
240-pin main board interface
J201
240-pin main board interface
JTAG connector
The JTAG port is accessed via the 14-pin BERG connector (J5).
Table 24. JTAG connector
Pin
Signal
Pin
Signal
1
TDI
2
GND
3
TDO
4
GND
5
TCK
6
GND
7
EVTI
8
EXT_POR_B
9
RESET_B
10
TMS
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
15
Connectors
Table 24. JTAG connector (continued)
Pin
6.2
Signal
Pin
Signal
11
VDD_HV_IO
12
GND
13
RDY_B
14
JCOMP
Nexus parallel trace connector
Nexus parallel trace is supported via the 38-pin MICTOR connector (P1).
Table 25. Nexus parallel trace connector
Pin
6.3
Signal
Pin
Signal
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
7
FAB
8
NC
9
RESET_B
10
EVTI
11
TDO
12
VDD_HV_IO
13
NC
14
RDY_B
15
TCK
16
NC
17
TMS
18
NC
19
TDI
20
NC
21
JCOMP
22
NC
23
NC
24
MDO3
25
NC
26
MDO2
27
NC
28
MDO1
29
NC
30
MDO0
31
12V
32
EVTO_B
33
12V
34
MCKO
35
NC
36
MSEO1_B
37
NC
38
MSEO0_B
Nexus Aurora trace connector
Nexus parallel trace is supported via the 34-pin SAMTEC connector (J10).
Table 26. Nexus Aurora trace connector
Pin
1
Signal
AURORA TX0P
Pin
2
Signal
VDD_HV_IO
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
16
Freescale Semiconductor
Connectors
Table 26. Nexus Aurora trace connector (continued)
Pin
Pin
Signal
3
AURORA TX0N
4
TCK
5
GND
6
TMS
7
AURORA TX1P
8
TDI
9
AURORA TX1N
10
TDO
11
GND
12
JCOMP
13
NC
14
NC
15
NC
16
EVTI
17
GND
18
EVTO
19
NC
20
EXT_POR_B
21
NC
22
RESET_B
23
GND
24
GND
25
NC
26
AURORA CLKP
27
NC
28
AURORA CLKN
29
GND
30
GND
31
AURORA RX0P
32
RDY_B
33
AURORA RX0N
34
NC
SH1
6.4
Signal
GND
SH2
GND
SIPI connector
SIPI communication is supported via the 10-pin SAMTEC connector (J26).
Table 27. SIPI connector
Pin
6.5
Signal
Pin
Signal
1
SIPI TXP
2
GND
3
SIPI TXN
4
GND
5
GND
6
SIPI DRCLK
7
SIPI RXN
8
GND
9
SIPI RXP
10
GND
Main board interface
The two high-density interface connectors on the expansion board (J201and J200) card allow connection
to the main board’s matching connectors (J56 and J43).
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
17
Connectors
Table 28. Main board interface connector J201
J201A connector
J201B
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
1.25 V
2
1.25 V
121
5V
122
5V
3
1.25 V
4
1.25 V
123
5V
124
5V
5
PA0
6
PA1
125
PD7
126
PH8
7
PA2
8
PA3
127
PH5
128
PI1
9
PA4
10
PA5
129
NC
130
PG11
11
PA6
12
PA7
131
NC
132
NC
13
PA8
14
PA9
133
NC
134
NC
15
PA10
16
PA11
135
NC
136
NC
17
PA12
18
PA13
137
NC
138
NC
19
NC
20
PC2
139
NC
140
NC
21
NC
22
NC
141
RESET_B
142
NC
23
NC
24
NC
143
NC
144
NC
25
PC0
26
PC1
145
NC
146
NC
27
PH7
28
PF0
147
NC
148
NC
29
PC4
30
MB_PTC5
149
NC
150
NC
31
PC6
32
MB_PTC7
151
NC
152
NC
33
MB_CAN_RXD
34
MB_CAN_TXD
153
NC
154
NC
35
PD8
36
PH4
155
NC
156
NC
37
PD6
38
PD5
157
NC
158
NC
39
PG5
40
PG9
159
NC
160
NC
41
3.3 V
42
3.3 V
161
1.25 V
162
1.25 V
43
3.3 V
44
3.3 V
163
1.25 V
164
1.25 V
45
PC11
46
NC
165
NC
166
NC
47
PC12
48
NC
167
NC
168
NC
49
NC
50
PA14
169
NC
170
NC
51
PF15
52
PF14
171
NC
172
NC
53
NC
54
NC
173
NC
174
NC
55
NC
56
NC
175
NC
176
NC
57
PG10
58
NC
177
NC
178
NC
59
NC
60
NC
179
NC
180
NC
61
1.25 V
62
1.25 V
181
5V
182
5V
63
1.25 V
64
1.25 V
183
5V
184
5V
65
NC
66
NC
185
NC
186
NC
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
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Freescale Semiconductor
Connectors
Table 28. Main board interface connector J201 (continued)
J201A connector
J201B
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
67
PG2
68
PG3
187
NC
188
NC
69
PG4
70
NC
189
NC
190
NC
71
PG6
72
NC
191
NC
192
NC
73
NC
74
PC10
193
NC
194
NC
75
NC
76
PC13
195
NC
196
NC
77
NC
78
PC14
197
NC
198
NC
79
PA15
80
PE14
199
NC
200
NC
81
NC
82
NC
201
3.3 V
202
3.3 V
83
NC
84
NC
203
3.3 V
204
3.3 V
85
PI0
86
PE15
205
NC
206
NC
87
PI2
88
PI3
207
NC
208
NC
89
PI4
90
NC
209
NC
210
NC
91
NC
92
NC
211
NC
212
NC
93
PI8
94
PI9
213
NC
214
NC
95
PI10
96
PI11
215
NC
216
NC
97
PI12
98
PI13
217
NC
218
NC
99
PI14
100
PI15
219
NC
220
NC
101
NC
102
NC
221
VDD_HV_IO_M
AIN
222
VDD_HV_IO_M
AIN
103
NC
104
NC
223
VDD_HV_IO_M
AIN
224
VDD_HV_IO_M
AIN
105
PE0
106
NC
225
NC
226
NC
107
PE2
108
NC
227
NC
228
NC
109
PE4
110
PE5
229
NC
230
NC
111
PE6
112
PE7
231
NC
232
NC
113
NC
114
PE9
233
NC
234
NC
115
PE10
116
PE11
235
NC
236
NC
117
PE12
118
PE13
237
NC
238
NC
119
PG8
120
PJ9
239
NC
240
NC
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
19
Connectors
Table 29. Main board interface connector J200
J201A connector
J201B
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
120
5V
119
5V
240
1.25 V
239
1.25 V
118
5V
117
5V
238
1.25 V
237
1.25 V
116
NC
115
NC
236
PB7
235
PB8
114
NC
113
NC
234
PB13
233
PB14
112
NC
111
NC
232
PB9
231
PB10
110
NC
109
NC
230
PB5
229
PB4
108
NC
107
NC
228
PB11
227
PB6
106
NC
105
NC
226
PB15
225
PB12
104
NC
103
NC
224
NC
223
NC
102
NC
101
NC
222
NC
221
NC
100
NC
99
NC
220
5V
219
5V
98
NC
97
NC
218
5V
217
5V
96
NC
95
NC
216
NC
215
NC
94
NC
93
NC
214
NC
213
NC
92
NC
91
NC
212
NC
211
NC
90
NC
89
NC
210
NC
209
NC
88
NC
87
NC
208
NC
207
PD9
86
NC
85
NC
206
NC
205
PD11
84
NC
83
NC
204
PD12
203
NC
82
NC
81
NC
202
MB_LIN_TXD
201
MB_LIN_RXD
80
1.25 V
79
1.25 V
200
3.3 V
199
3.3 V
78
1.25 V
77
1.25 V
198
3.3 V
197
3.3 V
76
NC
75
NC
196
PF0
195
NC
74
NC
73
NC
194
NC
193
PF3
72
NC
71
NC
192
PF4
191
PF5
70
NC
69
NC
190
PF6
189
PF7
68
NC
67
NC
188
PF8
187
PF9
66
NC
65
NC
186
PF10
185
PF11
64
NC
63
NC
184
PF12
183
PF13
62
NC
61
NC
182
NC
181
NC
60
NC
59
NC
180
1.25
179
1.25
58
NC
57
NC
178
1.25
177
1.25
56
NC
55
NC
176
PD14
175
NC
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
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Freescale Semiconductor
LEDs
Table 29. Main board interface connector J200 (continued)
J201A connector
7
J201B
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
54
NC
53
NC
174
NC
173
PD3
52
NC
51
NC
172
PD4
171
NC
50
NC
49
NC
170
NC
169
PD0
48
NC
47
NC
168
PC15
167
PD1
46
NC
45
NC
166
PD2
165
NC
44
NC
43
NC
164
NC
163
NC
42
NC
41
NC
162
NC
161
NC
40
3.3 V
39
3.3 V
160
3.3 V
159
3.3 V
38
3.3 V
37
3.3 V
158
3.3 V
157
3.3 V
36
NC
35
NC
156
PJ0
155
PJ1
34
NC
33
NC
154
PJ2
153
PJ3
32
NC
31
NC
152
PJ4
151
PJ5
30
NC
29
NC
150
PJ6
149
PJ7
28
NC
27
NC
148
PJ8
147
NC
26
NC
25
NC
146
NC
145
NC
24
NC
23
NC
144
NC
143
NC
22
NC
21
NC
142
NC
141
NC
20
VDD_HV_IO_M
AIN
19
VDD_HV_IO_M
AIN
140
NC
139
NC
18
VDD_HV_IO_M
AIN
17
VDD_HV_IO_M
AIN
138
NC
137
NC
16
NC
15
NC
136
NC
135
NC
14
NC
13
NC
134
NC
133
NC
12
NC
11
NC
132
NC
131
NC
10
NC
9
NC
130
PH6
129
NC
8
NC
7
NC
128
NC
127
PH9
6
NC
5
NC
126
PH10
125
PH11
4
NC
3
NC
124
PH12
123
PH13
2
NC
1
NC
122
PH14
121
PH15
LEDs
LEDs shown in Table 30 provide indicators for:
• Power from externally-supplied voltages
• Power output from the PwrSBC
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
21
Test points
•
•
Reset states
Fail-safe signals from the PwrSBC
Table 30. LEDs
LED
8
Description
D1
EXT_POR_B
D2
RESET_B
D3
External power supply 5 V
D4
External power supply 3.3 V
D5
External power supply 1.25 V
D6
PwerSBC VSUP
D9
PwrSBC VCAN
D10
PwrSBC FS1
D12
PwrSBC FS0
D15
PwrSBC VAUX
D16
PwrSBC VCCA
D17
PwrSBC VCORE
D18
PwrSBC VPRE
Test points
Test points shown in Table 31 are available to allow probing of various voltages.
Table 31. Test points
Test Point
Description
TP1
VDD_HV_IO
TP2
CLK_OUT
TP3
VDD_HV_FLA0
TP4
GND
TP5
GND
TP6
VSUP
TP8
VDD_LV_NEXUS
TP9
VSUP1/2 — PwrSBC supply
TP11
VDD_LV_LFAST
TP12
VCAN — PwrSBC CAN supply
TP13
GND
TP14
FS1 — PwrSBC fail safe output 1
TP15
VSW1/VSW2 — PwrSBC switching point
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Freescale Semiconductor
Port pin to main board mapping
Table 31. Test points (continued)
Test Point
9
Description
TP16
VDD_LV_PLL
TP17
VDD_LV_CORE
TP18
FB_CORE — PwrSBC feedback core
TP19
GND
TP20
VSW_CORE PwrSBC switching core
TP21
COMP_CORE — PwrSBC compensation
TP22
VDD_HV_OSC0
TP23
VDD_HV_ADR0
TP24
VDD_HV_ADR1
TP25
VDD_HV_ADV0/1
TP26
VDD_HV_PMU
TP27
VCCA — PwrSBC VCCA output
TP28
VCORE — PwrSBC VCORE output
TP29
VPRE — PwrSBC preregulator
TP30
VAUX — PwrSBC VAUX output
Port pin to main board mapping
When the expansion board is connected to the main board, the port pins are routed to the main board via
the interface connectors. Table 32 shows the port pin mapping to the main board connectors.
For example, port pin PB4 can be accessed on the main board from connector P9 pin 8.
Table 32. Port pin mapping to main board connectors
MPC5744P
port pin
MPC5746MMB port pin
connectors
PA0
P8.1
PA1
P8.2
PA2
P8.3
PA3
P8.4
PA4
P8.5
PA5
P8.6
PA6
P8.7
PA7
P8.8
PA8
P8.9
PA9
P8.10
PA10
P8.11
MPC5746MMB communication
interface
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
23
Port pin to main board mapping
Table 32. Port pin mapping to main board connectors (continued)
MPC5744P
port pin
MPC5746MMB port pin
connectors
PA11
P8.12
PA12
P8.13
PA13
P8.14
PA14
P12.6
PA15
P14.15
PB0
P10.10 (Must connect J17 5–6 on
expansion board)
PB1
P10.9 (Must connect J17 2–3 on
expansion board)
PB2
P11.15 (Must connect J17 11–12
on expansion board)
PB3
P11.16 (Must connect J17 8–9 on
expansion board)
PB4
P9.8
PB5
P9.7
PB6
P9.10
PB7
P9.1
PB8
P9.2
PB9
P9.5
PB10
P9.6
PB11
P9.9
PB12
P9.12
PB13
P9.3
PB14
P9.4
PB15
P9.11
PC0
P10.1
PC1
P10.2
PC2
P10.3
PC3
Not implemented
PC4
P10.5 (Must connect J19 11–12 on
expansion board)
PC5
P10.6 (Must connect J19 8–9 on
expansion board)
PC6
P10.7 (Must connect J19 2–3 on
expansion board)
PC7
P10.8 (Must connect J19 5–6 on
expansion board)
MPC5746MMB communication
interface
J6 CAN DB9 connector
J5 CAN DB9 connector
J19 RS-232 DB9 connector
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
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Freescale Semiconductor
Port pin to main board mapping
Table 32. Port pin mapping to main board connectors (continued)
MPC5744P
port pin
MPC5746MMB port pin
connectors
PC8
Not implemented
PC9
Not implemented
PC10
P10.11
PC11
P12.1
PC12
P10.13
PC13
P10.14
PC14
P10.15
PC15
P15.9
PD0
P15.8
PD1
P15.10
PD2
P15.11
PD3
P15.4
PD4
P15.5
PD5
P10.14
PD6
P10.13
PD7
P20.1
PD8
P10.11
PD9
P11.10
PD10
P20.5
PD11
P11.12
PD12
P11.13
PD13
Not implemented
PD14
P15.1
PD15
Not implemented
PE0
P18.1
PE1
P18.2
PE2
P18.3
PE3
P18.4
PE4
P18.5
PE5
P18.6
PE6
P18.7
PE7
P18.8
PE8
P18.9
PE9
P18.10
MPC5746MMB communication
interface
J7 Ethernet RJ45 connector
J2 FlexRay DB9 connector
J2 FlexRay DB9 connector
J7 Ethernet RJ45 connector
J7 Ethernet RJ45 connector
Qorivva MPC5744P Evaluation Board 257BGA Expansion Board User’s Guide, Rev. 1
Freescale Semiconductor
25
Port pin to main board mapping
Table 32. Port pin mapping to main board connectors (continued)
MPC5744P
port pin
MPC5746MMB port pin
connectors
PE10
P18.11
PE11
P18.12
PE12
P18.13
PE13
P18.14
PE14
P18.15
PE15
P18.16
PF0
P10.4
PF1
Not implemented
PF2
Not implemented
PF3
P13.4
PF4
P13.5
PF5
P13.6
PF6
P13.7
PF7
P13.8
PF8
P13.9
PF9
P13.10
PF10
P13.11
PF11
P13.12
PF12
P13.13
PF13
P13.14
PF14
P12.8
PF15
P12.7
PG0
Not implemented
PG1
Not implemented
PG2
P14.3
PG3
P14.4
PG4
P14.5
PG5
P10.15
PG6
P14.7
PG7
P14.8
PG8
P18.15
PG9
P10.16
PG10
P12.13
PG11
P20.6
MPC5746MMB communication
interface
J7 Ethernet RJ45 connector
J4 LIN Molex connector
J7 Ethernet RJ45 connector
J7 Ethernet RJ45 connector
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Port pin to main board mapping
Table 32. Port pin mapping to main board connectors (continued)
MPC5744P
port pin
MPC5746MMB port pin
connectors
PG12
Not connected to main board. Only
on expansion board.
PG13
MPC5746MMB communication
interface
PG14
PG15
PH0
PH1
PH2
Not implemented
PH3
Not implemented
PH4
P10.12
PH5
P20.3
PH6
P19.7
PH7
P10.3
PH8
P20.2
PH9
P19.10
PH10
P19.11
PH11
P19.12
PH12
P19.13
PH13
P19.14
PH14
P19.15
PH15
P19.16
PI0
P16.1
PI1
P20.4
PI2
P16.3
PI3
P16.4
PI4
P16.5
PI5
Not connected to main board. Only
on expansion board.
PI6
J7 Ethernet RJ45 connector
J7 Ethernet RJ45 connector
J7 Ethernet RJ45 connector
PI7
PI8
P16.9
PI9
P16.10
PI10
P16.11
PI11
P16.12
PI12
P16.13
PI13
P16.14
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27
Port pin to main board mapping
Table 32. Port pin mapping to main board connectors (continued)
MPC5744P
port pin
MPC5746MMB port pin
connectors
PI14
P16.15
PI15
P16.16
PJ0
P17.1
PJ1
P17.2
PJ2
P17.3
PJ3
P17.4
PJ4
P17.5
PJ5
P17.6
PJ6
P17.7
PJ7
P17.8
PJ8
P17.9
PJ9
P18.16
PJ10
Not connected to main board. Only
on expansion board.
PJ11
PJ12
Not implemented
PJ13
Not implemented
PJ14
Not implemented
PJ15
Not implemented
MPC5746MMB communication
interface
J7 Ethernet RJ45 connector
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Diagrams
10
Diagrams
J4
J3
SW2
SW1
J2
J1
J5
J6
P1
SW3
J7
P2
J9
J11
J8
J10
J12
J13
J14
U2
J18
J16
J19
J20
J21
J22
J23
J24
J17
J26
J25
Figure 5. Switches, jumpers, and connectors
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29
Diagrams
D1
D2
D3
D4
D5
D6
D9
D10
D12
D15 D16 D17
D18
Figure 6. LEDs
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Diagrams
TP1
TP2
TP3
TP4
TP5
TP8
TP6
TP11
TP9
TP12
TP16
TP17
TP19
TP15
TP14
TP13 TP18
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP30 TP27 TP28 TP29
Figure 7. Test points
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31
Diagrams
Figure 8. Bottom view
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Number: MPC5744PEEVB257UG
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