Standby Power Reduction Techniques

Standby Power Reduction Techniques
TND324/D Rev.1 – September 2007
Agenda
• Regulatory requirements
• Sources for standby power losses
• Methods to lower the standby power consumption
• Measured results versus calculated results
• Conclusion
2
TND324/D Rev.1 – September 2007
Agenda
• Regulatory requirements
• Sources for standby power losses
• Methods to lower the standby power consumption
• Measured results versus calculated results
• Conclusion
3
TND324/D Rev.1 – September 2007
Regulatory challenges
•
Standby Power Reduction
• 25% of total energy consumption is in low power/sleep/standby mode
• Concerted effort by CECP, Energy Star, IEA and other international
agencies to limit standby power
•
Active Mode Efficiency Improvement
• 75% of total energy consumption is in active mode
• Changing efficiency from 60% to 75% can result in 15% energy
savings
• Next focus area for agencies
•
Power Factor Correction (or Harmonic Reduction)
• Applicable with IEC 1000-3-2 (Europe, Japan)
• Some efficiency specifications also require >0.9 PF
4
TND324/D Rev.1 – September 2007
Standby certification programs
Code
5
(external power supplies)
Region/Country & Timing
No Load Power
Consumption
CUC1
CECP (China) & Energy Star (US)
From January, 2005 (Tier 1)
≤ 0.50 W for 0-<10 W
≤ 0.75 W for ≥10-250 W
CUC2
CECP and Energy Star
From July 1, 2006 (Tier 2)
≤ 0.30 W for 0-<10 W
≤ 0.50 W for ≥10-250 W
CE1
Europe (EC Code of Conduct)
From January 1, 2005
≤ 0.30 W for <15 W
≤ 0.50 W for 15-50 W
≤ 0.75 W for 50-60 W
≤ 1.00 W for 60-150 W
CE2
Europe (EC Code of Conduct)
From January 1, 2007
≤ 0.30 W for non-PFC
≤ 0.50 W for PFC
CA1
Australia (High Efficiency)
From April, 2006
≤ 0.50 W
For 0-180 W
TND324/D Rev.1 – September 2007
Standby mandatory programs
Code
Region/Country & Timing
No Load Power Consumption
MU0
US – FEMP
DOE (Final 2011)
≤ 1.00 W for most applications
?
MC1
China GB (Guo Biao) Standards
(From January, 2005)
≤ 0.75 W for 0-10 W
≤ 1.00 W for 10-250 W
MC2
China GB (Guo Biao) Standards
(From October, 2007)
≤ 0.50 W for 0-10 W
≤ 0.75 W for 10-250 W
MA1
Australia (MEPS)
From April, 2006
≤ 0.75 W for 0-180 W
MA2
Australia (MEPS)
From 2008/9
≤ 0.50 W for 0-180 W
6
TND324/D Rev.1 – September 2007
Agenda
• Regulatory requirements
• Sources for standby power losses
• Methods to lower the standby power consumption
• Measured results versus calculated results
• Conclusion
7
TND324/D Rev.1 – September 2007
Application overview
•
•
One application was selected.
Notebook adaptor operating in a flyback topology.
•
•
•
•
•
Standby power losses calculations
•
•
•
8
Start-up resistors 70 Vac, or 100 Vdc
Standby power calculations 230 Vac (required)
Standby power measured data
•
•
•
Universal input 85 -265 Vac
Vout 19 Vdc @ 90 W
Frequency 65 kHz
No power factor correction pre-regulation stage.
Measured data 230 Vac, or 325 Vdc
Goal to have a standby power < 0.5 W minimum
Desired < 0.3 W
TND324/D Rev.1 – September 2007
What are the sources for standby power losses?
•
•
•
•
•
9
Switching losses
Gate charge losses
Start-up circuits
Bias circuits
Snubbers
TND324/D Rev.1 – September 2007
Switching losses
• Switching losses are associated with the controller
turning on the power MOSFET each oscillator cycle
1
P =
• C
2
1
P =
• 390
2
OSS
• V
2
DS
pF • 325 V
• Freq
2
• 65 kHz
= 1 . 33 W
Where:
Operating frequency = 65 kHz
230 Vac • 1.414 = 325 V
MOSFET Characteristics
VDS = 650 V
ID = 11 A
COSS = 390 pF
Q = Gate Charge = 45 nC
10
TND324/D Rev.1 – September 2007
Gate charge loss
• The loss due to the controller charging and
discharging the power MOSFET’s gate
P = Vg • Q • Fsw = 13 V • 45 nC • 65 kHz = 38 mW
Q = Gate Charge = 45 nC
Lower gate charge devices are available, but they typically have a higher RDSON,
decreasing the active efficiency of the SMPS at full load
11
TND324/D Rev.1 – September 2007
Start-up circuits
•
Start-up circuits are used in SMPS to start the controller when the
input power is first applied to the power supply .
The start-up time is 5 s
CVcc 39 µF,
Vccon 12 V
50 µA is the start-up
current of the controller
•The start-up current:
dV
ITOTAL = ISTART-UP Controller + C dt
ITOTAL = 50 µA + 94 µA > 144 µA (Use 150 µA)
Where:
dV = 12 V the controller turn-on threshold (VCCON)
dt = 5 s (the start-up time)
C = CVcc = 39 µF
12
TND324/D Rev.1 – September 2007
Start-up circuits continued
R START
R
START
P START
− UP
−
− UP
UP
Vdc min
=
I Total
100 Vdc
=
150 μ A
= 667
2
2
= VBulk
= 325
667 k Ω
R START − UP
kΩ
= 160 mW
PSTART_UP is calculated at 230 Vac
13
TND324/D Rev.1 – September 2007
Start-up time vs. standby power
Changing the start-up time to 500 ms
CVcc 39 µF,
Vccon 12 V
IVcc =50 µA is the start-up current of the controller
I
VCC
=C
VCC
T
VCC
start
ON
− up
12 V
= 39 μ F
= 936 μ A
500 ms
ITotal = IVCC + Icontroller = 936 μA + 50 μA = 986 μA
R
START
P START
14
−
UP
− UP
=
min
Vdc
= VBulk
R START
I
Total
2
− UP
=
100 Vdc
986 μ A
325 V 2
=
=1.04 W
101 . 4 k
=100.4 k
To increase the start-up
time, Rstart-up must be
lowered increasing the
standby power
TND324/D Rev.1 – September 2007
Half-wave connection
Rstart − up =
100 Vpk
= 212 k Ω
150 μ A • π
Vin 2
230 Vac 2
Pstart − up =
=
= 125 mW
2 • Rstart − up 2 • 212 kΩ
Pstart-up@ 230 Vac = 125 mW, a 22% reduction
15
TND324/D Rev.1 – September 2007
Integrated high voltage start-up MOSFETs
•
The high voltage MOSFET is used as a current source that
charges up the controllers Vcc capacitor when the input ac
power is applied to the Power Supply.
Controller with a High Voltage Start-Up FET
Typical Isource 4 mA
The Start-Up time is 118 ms
Typical ILeakage 30 µA
Pd = ILeakge • VBulk = 30μA • 325Vdc = 9.75mW
Advantages:
• Can reduce the standby power consumption by approximately 150 mW
(compared to a SMPS with the start-up resistors connected to the bulk
capacitor) down to 9.75 mW
• Faster start-up time.
16
TND324/D Rev.1 – September 2007
Bias currents
•
In any power supply there are a number of circuits that, if not carefully selected,
can consume a significant amount of standby power.
• TL431 Shunt Regulator (TL431 needs a minimum of 1 mA of cathode
• current ).
• Optocoupler for the output feedback signal.
• Resistive dividers
•
Output sensing and divider
network impedance needs to be
as high as possible
Vsense =
17
Rlower
Rupper + Rlower
Vout =
7.4 k
49.0 k + 7.4 k
19V = 2.5 V
TND324/D Rev.1 – September 2007
Bias networks
Psense =
Vo 2
19 2
=
= 6.3 mW
Rupper + Rlower
57 .3k
The goal was to
keep the bias
current losses on
the secondary to
less than 20 mW.
VRin = 1 mA • 1 kΩ = 1 V
PRin = 1 mA² • 1 kΩ = 1 mW
PTL431=(Vo-VRin-Vopto)•1 mA =(19 V- 1 V- 1V)•1 mA = 17 mW
PTSECONDARY Side = 24.3 mW
The primary side controller bias current = 2 mA
Pcontroller = ICC • Vcc= 2 mA • 13 V = 26 mW
The total losses due to bias currents are:
PTotal = Psense + PRin + PTL431 + PController
6.3 mW + 1 mW + 17 mW + 26 mW = 50.3 mW
18
TND324/D Rev.1 – September 2007
Snubber/clamp losses
RDC snubber
1
V clamp
2
P R = L LK • Ipk • Freq •
2
V clamp − V out • n
Zener clamp
1
Vdc − Vz
2
P Z = Ipk L LK • Freq
2
Vz − Vout • n
Where:
LLK is the transformer leakage inductance
Ipk is the transformer peak primary current
Freq is the SMPS operating frequency
VZ is the zener break down voltage
Vclamp is the RDC snubber clamp voltage
Vout is the output voltage
N is the transformer turns ratio
Vdc is the SMPS HV dc bus
19
TND324/D Rev.1 – September 2007
Losses summary
PTstand-by = PSwitching+PGate+PStart-up+PBias
With 667 kΩ start-up resistors.
PTstand-by = 1.33 W + 38 mW + 160 mW + 50.3 mW =1.58 W
With HV start-up
PTstand-by = 1.33 W + 38 mW +9.75 mW + 50.3 mW = 1.43 W
Using Fixed frequency will not get us to the low standby power
requirements.
20
TND324/D Rev.1 – September 2007
Agenda
• Regulatory requirements
• Sources for standby power losses
• Methods to lower the standby power consumption
• Measured results versus calculated results
• Conclusion
21
TND324/D Rev.1 – September 2007
Methods to lower the
standby power consumption
• Switching losses
• Frequency foldback
• Skip cycle operation
• Startup circuits
• Bias circuits
22
TND324/D Rev.1 – September 2007
Frequency foldback
Operating frequency =65 kHz → 24 kHz
P =
1
• 390 pF • 325 V 2 • 24 kHz = 494 mW
2
☺ 62% reduction in standby power losses, compared to Example 1 where
the PSW = 1.33 W
VCO
2.5V
+
FB
With 667 kΩ start-up resistor
PTSTANDBY = PSWITCHING + PGATE + PSTART_UP+ PBIAS =
494 m W + 14 mW + 160 mW + 50.3 mW = 720 mW
-
Clock
1R
1V
PWM
R
Q
+
CS
S
-
With HV start-up
494 m W + 14 mW + 9.75 mW + 50.3 mW = 568 mW
2R
PWM
Latch
Set
Dominant
23
TND324/D Rev.1 – September 2007
Skip cycle
P = 1 / 2 • C OSS • V DS • Freq • D SKIP
2
24
_ CYCLE
TND324/D Rev.1 – September 2007
Skip cycle with start-up resistors
Skip cycle switching loss calculation
DSKIP_CYCLE= 7% (measured)
P=
1
2
2
• 390pF • 325 V • 65 kHz • 0.07 = 93 mW
EQ 18: ( With 667 kΩ start-up resistors)
PTSTANDBY_Skip = PSWITCHING • D + PGATE • D + PSTART_UP+ PBIAS =
93 mW + 1.4 mW + 160 mW + 50.3 mW = 304 mW
With HV start-up
93 mW + 1.4 mW + 9.75 mW + 50.3 mW = 155 mW
Frequency foldback with HV start-up
PTSTANDBY frequency foldback = 568 mW
Frequency foldback with 667 kΩ start-up resistor
PTSTANDBY = 720 mW
25
TND324/D Rev.1 – September 2007
Soft skip cycle
Skip cycle operation can lead to audible noise due to the instantaneous peak
current which causing a mechanical resonance with the snubber capacitor and
magnetic winding, and core .
Soft skip primary current waveform
•Soft skip reduces the high
instantaneous peak current by
ramping up the primary current
• This reduces the audible noise
•This increases the skip duty
cycle
•Increasing the standby power
26
TND324/D Rev.1 – September 2007
Agenda
• Regulatory requirements
• Sources for standby power losses
• Methods to lower the standby power consumption
• Measured results versus calculated results
• Conclusion
27
TND324/D Rev.1 – September 2007
Standby power results with start-up resistors
667 kΩ start-up resistors
Vin
230
Vac
28
Fixed Frequency
(65 kHz)
Frequency Foldback
(65 kHz→24 kHz)
Skip cycle
(65 kHz)
Calculated- 1.58 W
Measured-1.7 W
Calculated- 720 mW
Measured- 710 mW
Calculated- 304 mW
Measured- 320 mW
TND324/D Rev.1 – September 2007
Standby power results with a HV start-up
29
Vin
Skip with HV Start-Up
(65 kHz)
230 Vac
Calculated-155 mW
Measured- 160 mW
Soft Skip with
HV Start-Up
(65 kHz)
Measured- 190 mW
TND324/D Rev.1 – September 2007
Conclusion
• Regulatory requirements worldwide are driving the reduction of standby power consumption
• Identification of sources for standby power losses:
• Switching losses
•Bias circuits
• Gate charge losses
•Snubbers
• Start-up circuits
• Identification of methods to lower the standby power
• Switching losses
•Startup circuits
• Frequency foldback
•Bias circuits
• Skip cycle operation
• Very good correlation between calculated and measured results
30
TND324/D Rev.1 – September 2007