DG2303 Vishay Siliconix High-Speed, Low rON, 1.8-V/2.5-V/3.3-V/5-V, SPST Analog Switch (1-Bit Bus Switch) DESCRIPTION FEATURES The DG2303 is a high-speed, 1-bit, low power, TTLcompatible bus switch. Using sub-micron CMOS technology, DG2303 achieves low on-resistance and negligible propagation delay. • SC-70 5-Lead Package • 5 Ω Switch Connection Between Two Ports • Minimal Propagation Delay Through The Switch • Low ICC • Zero Bounce In Flow-Through Mode • Control Inputs Compatible with TTL Level The DG2303 consist of a bi-directional input/output pins A and B. When the output enable (OE) is low, the input/output pins are connected. When the OE is high, the switch is open and a high-impedance state exists between input/output pins A and B. Pb-free Available RoHS* COMPLIANT FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION TRUTH TABLE SC-70 A 1 B 2 GND 3 5 V+ 4 OE OE B Function L HiZ State Disconnect H A Connect Top View Device Marking: E6 ORDERING INFORMATION Temp Range Package - 40 to 85 °C SC70-5 Part Number DG2303DL-T1 DG2303DL-T1-E3 * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 72073 S-70852-Rev. B, 30-Apr-07 www.vishay.com 1 DG2303 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Reference V+ to GND Limit - 0.3 to + 6 V OE, A, Ba Continuous Current (Any Terminal) ± 50 mA ± 200 Storage Temperature (D Suffix) Power Dissipation (Packages) V - 0.3 to (V+ + 0.3 V) Peak Current (Pulsed at 1 ms, 10 % duty cycle) b Unit 5-Pin SC70 c - 65 to 150 °C 250 mW Notes: a. Signals on A, or B or OE exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 3.1 mW/°C above 70 °C. SPECIFICATIONS (V+ = 5.0 V) Parameter Symbol Limits - 40 to 85 °C Test Conditions Otherwise Unless Specified V+ = 1.65 V to 5.5 V, VIN = VIH or VILe Tempa V+ = 1.8 V, VA = 0 V, IB = 4 mA Full Minb Typc Maxb Unit DC Characteristics On-Resistance rON Flatnessd rON rON Flatness 28.0 V+ = 1.8 V, VA = 1.8 V, IB = 4 mA Full 60.0 V+ = 2.3 V, VA = 0 V, IB = 8 mA Full 12.0 V+ = 2.3 V, VA = 2.3 V, IB = 8 mA Full 30.0 V+ = 3.0 V, VA = 0 V, IB = 24 mA Full 9.0 V+ = 3.0 V, VA = 3.0 V, IB = 24 mA Full 20.0 V+ = 4.5 V, VA = 0 V, IB = 30 mA Full 7.0 V+ = 4.5 V, VA = 2.4 V, IB = 15 mA Full 12.0 V+ = 4.5 V, VA = 4.5 V, IB = 30 mA Full 15.0 V+ = 1.8 V, VA = 0 V to V+, IB = 4 mA Full 125 V+ = 2.5 V, VA = 0 V to V+, IB = 8 mA Full 28 V+ = 3.3 V, VA = 0 V to V+, IB = 24 mA Full 12 V+ = 5.0 V, VA = 0 V to V+, IB = 30 mA Full 6 Switch Off Leakage Current I(off) V+ = 5.5 V, VA = 1 V/4.5 V, VB = 4.5 V/1 V Full - 10 10 Switch-On Leakage Current I(on) V+ = 5.5 V, VA = VB = 1 V/4.5 V Full - 10 10 V+ = 1.65 V to 1.95 V Full 1.35 V+ = 2.3 V to 2.7 V Full 1.6 V+ = 3.0 V to 3.6 V Full 2.0 V+ = 4.5 V to 5.5 V Full 2.4 V+ = 1.65 V to 1.95 V Full 0.4 V+ = 2.3 V to 2.7 V Full 0.4 V+ = 3.0 V to 3.6 V Full 0.6 V+ = 4.5 V to 5.5 V Full VOE = 0 or V+ Full Input High Voltage Input Low Voltage Input Current www.vishay.com 2 VIH VIL IIL or IIH Ω µA V 0.8 -1 1 µA Document Number: 72073 S-70852-Rev. B, 30-Apr-07 DG2303 Vishay Siliconix SPECIFICATIONS Parameter Symbol Test Conditions Otherwise Unless Specified V+ = 1.65 V to 5.5 V, VIN = VIH or VILe Limits - 40 to 85 °C Tempa Minb Typc Maxb Unit Dynamic Characteristics Prop Delay Bus-to-Busf tPHL, tPLH tPZL Output Enable Timed tPZH tPLZ Output Disable Timed Charge Off Isolationd Insertion Loss d Input Capacitanced Full 5 VLD = Open, V = 2.3 V to 2.7 V, (Figure 1 and 2) Full 2 VLD = Open, V = 3.0 V to 3.6 V, (Figure 1 and 2) Full 1 VLD = Open, V = 4.5 V to 5.5 V, (Figure 1 and 2) Full 1 VLD = 2 x V+, V+ = 1.65 V to 1.95 V (Figure 1 and 2) Full 4.2 VLD = 2 x V+, V+ = 2.3 V to 2.7 V (Figure 1 and 2) Full 3.3 VLD = 2 x V+, V+ = 3.0 V to 3.6 V (Figure 1 and 2) Full 2.6 VLD = 2 x V+, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full 1.8 VLD = 0 V, V+ = 1.65 V to 1.95 V (Figure 1 and 2) Full 4.4 VLD = 0 V, V+ = 2.3 V to 2.7 V (Figure 1 and 2) Full 3.3 VLD = 0 V, V+ = 3.0 V to 3.6 V (Figure 1 and 2) Full 2.7 VLD = 0 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full 2.0 VLD = 2 x V+, V+ = 1.65 V to 1.95 V (Figure 1 and 2) Full 14.3 VLD = 2 x V+, V+ = 2.3 V to 2.7 V (Figure 1 and 2) Full 10.5 VLD = 2 x V+, V+ = 3.0 V to 3.6 V (Figure 1 and 2) Full 8.6 VLD = 2 x V+, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full 7.4 VLD = 0 V, V+ = 1.65 V to 1.95 V (Figure 1 and 2) Full 10.7 ns VLD = 0 V, V+ = 2.3 V to 2.7 V (Figure 1 and 2) Full 9.6 VLD = 0 V, V+ = 3.0 V to 3.6 V (Figure 1 and 2) Full 8.7 VLD = 0 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full 7.5 QINJ CL = 1 nF, VGEN = 0 V, RGEN = 0 Ω, (Figure 3) Room 0.5 pC OIRR RL = 50 Ω, CL = 5 pF, f = 10 MHz Room - 50 dB Loss RL = 50 Ω Room > 200 MHz Room 4 tPHZ Injectiond VLD = Open, V = 1.65 V to 1.95 V, (Figure 1 and 2) Cin Channel-Off Capacitanced C(off) Channel-On Capacitanced CON VOE = 0 or V+, f = 1 MHz Room 9 Room 20 pF Power Supply Power Supply Range Power Supply Current V+ I+ 1.65 VOE = 0 or V+ 5.5 V 1.0 µA Notes: a. Room = 25 °C, Full = as determined by the operating suffix. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. c. Typical values are for design aid only, not guaranteed nor subject to production testing. d. Guarantee by design, nor subjected to production test. e. VIN = input voltage to perform proper function. f. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the on-resistance and the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 72073 S-70852-Rev. B, 30-Apr-07 www.vishay.com 3 DG2303 Vishay Siliconix AC LOADING AND WAVEFORMS VLD Ra = 500 Ω A SWITCH INPUT B SWITCH OUTPUT Rb = 500 Ω CL OE LOGIC INPUT CL = 50 pF Input driven by 50 Ω source terminated in 50 Ω CL includes load and stray capacitance Input PRR = 1.0 MHz, tW = 50 ns Figure 1. AC Test Circuit tf = 2.5 ns tr = 2.5 ns V+ 90 % Switch Input tr = 2.5 ns tf = 2.5 ns 90 % 1.5 V 90 % Logic Input 1.5 V 1.5 V 1.5 V 10 % 10 % 10 % tw tPLH 1.5 V GND tPLZ VLd 2 tPHL VOH Output 10 % tPZL GND V+ 90 % 1.5 V Output VOL + 0.3 V VOL 1.5 V tPZH tPHZ VOH VOL VOH -0.3 V Output 1.5 V 0V Figure 2. AC Waveforms www.vishay.com 4 Document Number: 72073 S-70852-Rev. B, 30-Apr-07 DG2303 Vishay Siliconix TEST CIRCUITS V+ Rgen ΔVOUT V+ B VOUT A VOUT + Vgen OE IN CL = 0.1 nF On Off On GND Q = ΔVOUT x CL VIN = 0 - V+ IN depends on switch configuration: input polarity determined by sense of switch. Figure 3. Charge Injection V+ 10 nF V+ A OE VIN B RL VB Off Isolation = 20 log V A GND Analyzer Figure 4. Off-Isolation V+ 10 nF V+ B Meter OE VIN A GND HP4192A Impedance Analyzer or Equivalent f = 1 MHz Figure 5. Channel Off/On Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72073. Document Number: 72073 S-70852-Rev. B, 30-Apr-07 www.vishay.com 5 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1