Data Sheet

74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
Rev. 1 — 22 May 2015
Product data sheet
1. General description
The 74HC4067-Q100; 74HCT4067-Q100 is a single-pole 16-throw analog switch (SP16T)
suitable for use in analog or digital 16:1 multiplexer/demultiplexer applications. The switch
features four digital select inputs (S0, S1, S2 and S3), sixteen independent inputs/outputs
(Yn), a common input/output (Z) and a digital enable input (E). When E is HIGH, the
switches are turned off. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Input levels S0, S1, S2, S3 and E inputs:
 For 74HC4067-Q100: CMOS level
 For 74HCT4067-Q100: TTL level
 Low ON resistance:
 80  (typical) at VCC = 4.5 V
 70  (typical) at VCC = 6.0 V
 60  (typical) at VCC = 9.0 V
 Specified in compliance with JEDEC standard no. 7A
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 CDM JESD22-C101E exceeds 1000 V
 Multiple package options
 Typical ‘break before make’ built-in
3. Applications
 Analog multiplexing and demultiplexing
 Digital multiplexing and demultiplexing
 Signal gating
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
4. Ordering information
Table 1.
Ordering information
Type number
Package
74HC4067D-Q100
Temperature range
Name
Description
Version
40 C to +125 C
SO24
plastic small outline package; 24 leads;
body width 7.5 mm
SOT137-1
40 C to +125 C
TSSOP24
plastic thin shrink small outline package;
24 leads; body width 4.4 mm
SOT355-1
40 C to +125 C
DHVQFN24 plastic dual in-line compatible thermal enhanced SOT815-1
very thin quad flat package; no leads;
24 terminals; body 3.5  5.5  0.85 mm
74HCT4067D-Q100
74HC4067PW-Q100
74HCT4067PW-Q100
74HC4067BQ-Q100
74HCT4067BQ-Q100
5. Functional diagram
6
6
6
6
(
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
=
î
*
08;'08;
DDJ
DDJ
Fig 1.
Logic symbol
74HC_HCT4067_Q100
Product data sheet
Fig 2.
IEC logic symbol
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Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
<Q
9&&
9&&
=
*1'
IURP
ORJLF
Fig 3.
DDJ
Schematic diagram (one switch)
<
<
6 <
<
6 <
<
6 <
<
6 <
2)
'(&2'(5
<
<
<
<
<
<
( <
=
DDJ
Fig 4.
Functional diagram
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
<
<
<
<
<
6
<
<
<
6
<
<
<
6
<
<
<
6
<
<
(
=
DDJ
Fig 5.
Logic diagram
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
4 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
=
WHUPLQDO
LQGH[DUHD
+&4
+&74
<
9&&
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
6 (
6 6
*1' 6
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
6 <
9&&
(
6 6
6 *1' =
9&&
+&4
+&74
DDD
7UDQVSDUHQWWRSYLHZ
DDD
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 6.
Pin configuration for SO24 and TSSOP24
Fig 7.
Pin configuration for DHVQFN24
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
Z
1
common input or output
Y7, Y6, Y5, Y4, Y3, Y2, Y1, Y0, Y15,
Y14, Y13, Y12, Y11, Y10, Y9, Y8
2, 3, 4, 5, 6, 7, 8, 9, 16, 17, 18, 19, 20, 21, 22, 23
independent input or output
S0, S1, S3, S2
10, 11, 13, 14
address input 0
GND
12
ground (0 V)
E
15
enable input (active LOW)
VCC
24
supply voltage
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
7. Functional description
Table 3.
Function table[1]
Inputs
Channel ON
E
S3
S2
S1
S0
L
L
L
L
L
Y0 to Z
L
L
L
L
H
Y1 to Z
L
L
L
H
L
Y2 to Z
L
L
L
H
H
Y3 to Z
L
L
H
L
L
Y4 to Z
L
L
H
L
H
Y5 to Z
L
L
H
H
L
Y6 to Z
L
L
H
H
H
Y7 to Z
L
H
L
L
L
Y8 to Z
L
H
L
L
H
Y9 to Z
L
H
L
H
L
Y10 to Z
L
H
L
H
H
Y11 to Z
L
H
H
L
L
Y12 to Z
L
H
H
L
H
Y13 to Z
L
H
H
H
L
Y14 to Z
L
H
H
H
H
Y15 to Z
H
X
X
X
X
-
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
ISK
Min
Max
Unit
0.5
+11.0
V
VI < 0.5 V or VI > VCC + 0.5 V
-
20
mA
switch clamping current
VSW < 0.5 V or VSW > VCC + 0.5 V
-
20
mA
ISW
switch current
VSW = 0.5 V to VCC + 0.5 V
-
25
mA
ICC
supply current
-
+50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
74HC_HCT4067_Q100
Product data sheet
Conditions
[1]
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Rev. 1 — 22 May 2015
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6 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
Table 4.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Ptot
total power dissipation
Tamb = 40 C to +125 C
P
power dissipation
Min
Max
Unit
SO24 package
[2]
-
500
mW
SSOP24 package
[3]
-
500
mW
TSSOP24 package
[3]
-
500
mW
DHVQFN24 package
[4]
-
500
mW
-
100
mW
per switch
[1]
To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is
no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND.
[2]
For SO24 package: Ptot derates linearly with 8 mW/K above 70 C.
[3]
For TSSOP24 package: Ptot derates linearly with 5.5 mW/K above 60 C.
[4]
For DHVQFN24 package: Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
2.0
5.0
10.0
V
74HC4067-Q100
VCC
supply voltage
VI
input voltage
GND
-
VCC
V
VSW
switch voltage
GND
-
VCC
V
t/V
input transition rise and fall rate
VCC = 2.0 V
-
-
625
ns
VCC = 4.5 V
-
1.67
139
ns
Tamb
VCC = 6.0 V
-
-
83
ns
VCC = 10.0 V
-
-
31
ns
40
+25
+125
C
ambient temperature
74HCT4067-Q100
VCC
supply voltage
4.5
5.0
5.5
V
VI
input voltage
GND
-
VCC
V
VSW
switch voltage
GND
-
VCC
V
t/V
input transition rise and fall rate
-
1.67
139
ns
Tamb
ambient temperature
40
+25
+125
C
74HC_HCT4067_Q100
Product data sheet
VCC = 4.5 V
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Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
7 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
10. Static characteristics
Table 6.
RON resistance per switch for types 74HC4067-Q100 and 74HCT4067-Q100
VI = VIH or VIL; for test circuit see Figure 8.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
For 74HC4067-Q100: VCC  GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4067-Q100: VCC  GND = 4.5 V.
Symbol
RON(peak)
Parameter
ON resistance (peak)
25 C
Conditions
Typ
Max
ON resistance (rail)
-
-
-
-

VCC = 4.5 V; ISW = 1000 A
110
180
225
270

VCC = 6.0 V; ISW = 1000 A
95
160
200
240

VCC = 9.0 V; ISW = 1000 A
75
130
165
195

150
-
-
-
[1]
[1]
Vis = GND or VCC
VCC = 2.0 V; ISW = 100 A
RON
Max
Max
(85 C) (125 C)
Vis = VCC to GND
VCC = 2.0 V; ISW = 100 A
RON(rail)
40 C to +125 C Unit
[1]
VCC = 4.5 V; ISW = 1000 A
90
160
200
240

VCC = 6.0 V; ISW = 1000 A
80
140
175
210

VCC = 9.0 V; ISW = 1000 A
70
120
150
180

ON resistance mismatch Vis = VCC to GND
between channels
VCC = 2.0 V
-
-
-
-

VCC = 4.5 V
9
-
-
-

VCC = 6.0 V
8
-
-
-

VCC = 9.0 V
6
-
-
-

[1]
At supply voltages (VCC  GND) approaching 2 V, the analog switch ON resistance becomes extremely non-linear. Therefore it is
recommended that these devices be used to transmit digital signals only, when using these supply voltages.
74HC_HCT4067_Q100
Product data sheet
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Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
8 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
PQE
521
ȍ
96:
9&&
9,/
(
<Q
=
9LV
*1'
,6:
Vis = 0 V to VCC
Vis = 0 V to VCC
(1) VCC = 4.5 V
V SW
R ON = --------I SW
Fig 8.
9LV9
DDJ
(2) VCC = 6.0 V
(3) VCC = 9.0 V
Test circuit for measuring RON
Fig 9.
Typical RON as a function of input voltage Vis
Table 7.
Static characteristics 74HC4067-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
1.5
1.2
-
V
VCC = 4.5 V
3.15
2.4
-
V
VCC = 6.0 V
4.2
3.2
-
V
VCC = 9.0 V
6.3
4.7
-
V
VCC = 2.0 V
-
0.8
0.5
V
VCC = 4.5 V
-
2.1
1.35
V
VCC = 6.0 V
-
2.8
1.80
V
VCC = 9.0 V
-
4.3
2.70
V
VCC = 6.0 V
-
-
0.1
A
VCC = 10.0 V
-
-
0.2
A
per channel
-
-
0.1
A
all channels
-
-
0.8
A
-
-
0.8
A
Tamb = 25 C
VIH
VIL
II
IS(OFF)
IS(ON)
HIGH-level input voltage
LOW-level input voltage
input leakage current
OFF-state leakage current
ON-state leakage current
74HC_HCT4067_Q100
Product data sheet
VI = VCC or GND
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
9 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
Table 7.
Static characteristics 74HC4067-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Conditions
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND
CI
Min
Typ
Max
Unit
VCC = 6.0 V
-
-
8.0
A
VCC = 10.0 V
-
-
16.0
A
-
3.5
-
pF
VCC = 2.0 V
1.5
-
-
V
VCC = 4.5 V
3.15
-
-
V
VCC = 6.0 V
4.2
-
-
V
VCC = 9.0 V
6.3
-
-
V
VCC = 2.0 V
-
-
0.50
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.80
V
VCC = 9.0 V
-
-
2.70
V
VCC = 6.0 V
-
-
1.0
A
VCC = 10.0 V
-
-
2.0
A
per channel
-
-
1.0
A
all channels
-
-
8.0
A
-
-
8.0
A
VCC = 6.0 V
-
-
80.0
A
VCC = 10.0 V
-
-
160
A
input capacitance
Tamb = 40 C to +85 C
VIH
VIL
II
IS(OFF)
HIGH-level input voltage
LOW-level input voltage
input leakage current
OFF-state leakage current
VI = VCC or GND
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
IS(ON)
ON-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND
Tamb = 40 C to +125 C
VIH
VIL
II
HIGH-level input voltage
LOW-level input voltage
input leakage current
74HC_HCT4067_Q100
Product data sheet
VCC = 2.0 V
1.5
-
-
V
VCC = 4.5 V
3.15
-
-
V
VCC = 6.0 V
4.2
-
-
V
VCC = 9.0 V
6.3
-
-
V
VCC = 2.0 V
-
-
0.50
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.80
V
VCC = 9.0 V
-
-
2.70
V
VCC = 6.0 V
-
-
1.0
A
VCC = 10.0 V
-
-
2.0
A
VI = VCC or GND
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
10 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
Table 7.
Static characteristics 74HC4067-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IS(OFF)
OFF-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
per channel
-
-
1.0
A
all channels
-
-
8.0
A
-
-
8.0
A
VCC = 6.0 V
-
-
160
A
VCC = 10.0 V
-
-
320
A
Conditions
Min
Typ
Max
Unit
IS(ON)
ON-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND
Table 8.
Static characteristics 74HCT4067-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Tamb = 25 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
1.2
0.8
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
0.1
A
IS(OFF)
OFF-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
per channel
-
-
0.1
A
all channels
-
-
0.8
A
IS(ON)
ON-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
-
-
0.8
A
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND; VCC = 4.5 V to 5.5 V
-
-
8.0
A
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other inputs
at VCC or GND; VCC = 4.5 V to 5.5 V
pin E
-
60
216
A
pin Sn
-
50
180
A
-
3.5
-
pF
CI
input capacitance
Tamb = 40 C to +85 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
1.0
A
IS(OFF)
OFF-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
per channel
-
-
1.0
A
all channels
-
-
8.0
A
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
11 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
Table 8.
Static characteristics 74HCT4067-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IS(ON)
ON-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
-
-
8.0
A
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND; VCC = 4.5 V to 5.5 V
-
-
80.0
A
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other
inputs at VCC or GND; VCC = 4.5 V to 5.5 V
pin E
-
-
270
A
pin Sn
-
-
225
A
Tamb = 40 C to +125 C
VIH
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
V
VIL
LOW-level input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
1.0
A
IS(OFF)
OFF-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 10
per channel
-
-
1.0
A
all channels
-
-
8.0
A
IS(ON)
ON-state leakage current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC  GND; see Figure 11
-
-
8.0
A
ICC
supply current
VI = VCC or GND; Vis = GND or VCC;
Vos = VCC or GND; VCC = 4.5 V to 5.5 V
-
-
160
A
ICC
additional supply current
per input pin; VI = VCC  2.1 V; other
inputs at VCC or GND; VCC = 4.5 V to 5.5 V
pin E
-
-
294
A
pin Sn
-
-
245
A
9&&
9&&
(
9,+
,6:
9LV
9,/
<Q
=
*1'
,6:
,6:
(
=
<Q
9RV
9LV
9RV
*1'
DDJ
DDJ
Vis = VCC and Vos = GND
Vis = VCC and Vos = open
Vis = GND and Vos = VCC
Vis = GND and Vos = open
Fig 10. Test circuit for measuring OFF-state leakage
current
74HC_HCT4067_Q100
Product data sheet
Fig 11. Test circuit for measuring ON-state leakage
current
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
12 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
11. Dynamic characteristics
Table 9.
Dynamic characteristics 74HC4067-Q100
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
25 C
Conditions
Typ
tpd
propagation delay
Yn to Z; see Figure 12
40 C to +125 C Unit
Max
Max
Max
(85 C) (125 C)
[1][2]
VCC = 2.0 V
25
75
95
110
ns
VCC = 4.5 V
9
15
19
22
ns
VCC = 6.0 V
7
13
16
19
ns
VCC = 9.0 V
5
9
11
14
ns
VCC = 2.0 V
18
60
75
90
ns
VCC = 4.5 V
6
12
15
18
ns
VCC = 6.0 V
5
10
13
15
ns
4
8
10
12
ns
VCC = 2.0 V
74
250
315
375
ns
VCC = 4.5 V
27
50
63
75
ns
Z to Yn
VCC = 9.0 V
toff
turn-off time
E to Yn; see Figure 13
[3]
VCC = 5.0 V; CL = 15 pF
27
-
-
-
ns
VCC = 6.0 V
22
43
54
64
ns
VCC = 9.0 V
20
38
48
57
ns
VCC = 2.0 V
83
250
315
375
ns
VCC = 4.5 V
30
50
63
75
ns
VCC = 5.0 V; CL = 15 pF
29
-
-
-
ns
VCC = 6.0 V
24
43
54
64
ns
VCC = 9.0 V
21
38
48
57
ns
VCC = 2.0 V
85
275
345
415
ns
VCC = 4.5 V
31
55
69
83
ns
VCC = 6.0 V
25
47
59
71
ns
VCC = 9.0 V
24
42
53
63
ns
VCC = 2.0 V
94
290
365
435
ns
VCC = 4.5 V
34
58
73
87
ns
VCC = 6.0 V
27
47
62
74
ns
VCC = 9.0 V
25
45
56
68
ns
Sn to Yn
E to Z
Sn to Z
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
13 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
Table 9.
Dynamic characteristics 74HC4067-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
ton
turn-on time
25 C
Conditions
40 C to +125 C Unit
Typ
Max
VCC = 2.0 V
80
275
345
415
ns
VCC = 4.5 V
29
55
69
83
ns
VCC = 5.0 V; CL = 15 pF
26
-
-
-
ns
VCC = 6.0 V
23
47
59
71
ns
VCC = 9.0 V
17
42
53
63
ns
VCC = 2.0 V
88
300
375
450
ns
VCC = 4.5 V
32
60
75
90
ns
VCC = 5.0 V; CL = 15 pF
29
-
-
-
ns
VCC = 6.0 V
26
51
64
77
ns
VCC = 9.0 V
18
45
56
68
ns
VCC = 2.0 V
85
275
345
415
ns
VCC = 4.5 V
31
55
69
83
ns
VCC = 6.0 V
25
47
59
71
ns
VCC = 9.0 V
18
42
53
63
ns
VCC = 2.0 V
94
300
375
450
ns
VCC = 4.5 V
34
60
75
90
ns
VCC = 6.0 V
27
51
64
77
ns
19
45
56
68
ns
29
-
-
-
pF
E to Yn; see Figure 13
Max
Max
(85 C) (125 C)
[4]
Sn to Yn
E to Z
Sn to Z
VCC = 9.0 V
CPD
power dissipation
capacitance
per switch; VI = GND to VCC
[5]
[1]
tpd is the same as tPHL and tPLH.
[2]
Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal.
[3]
ton is the same as tPHZ and tPLZ.
[4]
toff is the same as tPZH and tPZL.
[5]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi + {(CL + Csw)  VCC2  fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL + Csw)  VCC2  fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
14 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
Table 10. Dynamic characteristics 74HCT4067-Q100
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
tpd
propagation delay
25 C
Conditions
40 C to +125 C Unit
Typ
Max
9
15
19
22
ns
6
12
15
18
ns
VCC = 4.5 V
26
55
69
83
ns
VCC = 5.0 V; CL = 15 pF
26
-
-
-
ns
VCC = 4.5 V
31
55
69
83
ns
VCC = 5.0 V; CL = 15 pF
30
-
-
-
ns
30
60
75
90
ns
35
60
75
90
ns
VCC = 4.5 V
32
60
75
90
ns
VCC = 5.0 V; CL = 15 pF
32
-
-
-
ns
VCC = 4.5 V
35
60
75
90
ns
VCC = 5.0 V; CL = 15 pF
33
-
-
-
ns
38
65
81
98
ns
38
65
81
98
ns
29
-
-
-
pF
Yn to Z; see Figure 12
Max
Max
(85 C) (125 C)
[1][2]
VCC = 4.5 V
Z to Yn
VCC = 4.5 V
toff
turn-off time
E to Yn; see Figure 13
[3]
Sn to Yn
E to Z
VCC = 4.5 V
Sn to Z
VCC = 4.5 V
ton
turn-on time
E to Yn; see Figure 13
[4]
Sn to Yn
E to Z
VCC = 4.5 V
Sn to Z
VCC = 4.5 V
CPD
power dissipation
capacitance
per switch; VI = GND to (VCC  1.5 V)
[5]
[1]
tpd is the same as tPHL and tPLH.
[2]
Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal.
[3]
ton is the same as tPHZ and tPLZ.
[4]
toff is the same as tPZH and tPZL.
[5]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi + {(CL + Csw)  VCC2  fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL + Csw)  VCC2  fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
15 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
12. Waveforms
9LVLQSXW
W3/+
W3+/
9RVRXWSXW
DDG
Fig 12. Input (Vis) to output (Vos) propagation delays
9,
(6QLQSXWV
90
9
W3/=
W3=/
9RVRXWSXW
W3+=
W3=+
9RVRXWSXW
VZLWFK21
VZLWFK21
VZLWFK2))
DDG
Measurement points are shown in Table 11.
Fig 13. Turn-on and turn-off times
Table 11.
Measurement points
Type
VI
74HC4067-Q100
VCC
0.5VCC
74HCT4067-Q100
3.0 V
1.3 V
74HC_HCT4067_Q100
Product data sheet
VM
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
16 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
9,
W:
QHJDWLYH
SXOVH
90
9
WI
WU
WU
WI
9,
SRVLWLYH
SXOVH
9
90
90
90
W:
9&& 9LV
38/6(
*(1(5$725
9&&
9RV
9,
5/
'87
57
6
RSHQ
&/
*1'
DDJ
Test data is given in Table 12.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 14. Test circuit for measuring switching times
Table 12.
Test data
Test
Input
Output
S1 position
Control E
Address Sn
Switch Yn (Z) tr, tf
VI[1]
VI[1]
Vis
CL
RL
tPHL, tPLH
GND
GND or VCC
GND to VCC
6 ns
50 pF
-
open
tPHZ, tPZH
GND to VCC
GND to VCC
VCC
6 ns
50 pF, 15 pF
1 k
GND
tPLZ, tPZL
GND to VCC
GND to VCC
GND
6 ns
50 pF, 15 pF
1 k
VCC
[1]
Switch Z (Yn)
For 74HCT4067-Q100: maximum input voltage VI = 3.0 V.
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
17 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
13. Additional dynamic characteristics
Table 13. Additional dynamic characteristics
Recommended conditions and typical values; GND = 0 V; Tamb = 25 C.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
THD
RL = 10 k; CL = 50 pF; see Figure 15
total harmonic distortion
Min
Typ
Max
Unit
VCC = 4.5 V; Vis(p-p) = 4.0 V
-
0.04
-
%
VCC = 9.0 V; Vis(p-p) = 8.0 V
-
0.02
-
%
-
0.12
-
%
-
0.06
-
%
-
50
-
dB
-
50
-
dB
fi = 1 kHz
fi = 10 kHz
VCC = 4.5 V; Vis(p-p) = 4.0 V
VCC = 9.0 V; Vis(p-p) = 8.0 V
iso
isolation (OFF-state)
RL = 600 ; CL = 50 pF; see Figure 16
[1]
VCC = 4.5 V
VCC = 9.0 V
f(-3dB)
Csw
3 dB frequency response
switch capacitance
RL = 50 ; CL = 10 pF; see Figure 17
[2]
VCC = 4.5 V
-
90
-
MHz
VCC = 9.0 V
-
100
-
MHz
independent pins Y
-
5
-
pF
common pin Z
-
45
-
pF
[1]
Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ).
[2]
Adjust input voltage Vis to 0 dBm level at Vos for fi = 1 MHz (0 dBm = 1 mW into 50 ). After set-up, fi is increased to obtain a reading of
3 dB at Vos.
9&&
9&&
(
9,/
5/
9LV —) <Q
IL
=
*1'
9RV
5/
&/
'
DDJ
Fig 15. Test circuit for measuring total harmonic distortion
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
18 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
DDH
Į LVR
G%
ILN+]
a. Isolation (OFF-state)
9&&
(
9,+
9LV
9&&
—)
IL
5/
<Q
=
*1'
9RV
5/
&/
G%
DDJ
b. Test circuit
VCC = 4.5 V; GND = 0 V; RL = 600 ; Rsource = 1 k.
Fig 16. Isolation (OFF-state) as a function of frequency
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
19 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
DDJ
9RV
G%
ILN+]
a. Typical 3 dB frequency response
9&&
(
9,/
9LV
9&&
—)
5/
<Q
=
*1'
IL
9RV
5/
&/
G%
DDJ
b. Test circuit
VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k.
Fig 17. 3 dB frequency response
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
20 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
14. Package outline
62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
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Fig 18. Package outline SOT137-1 (SO24)
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
21 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
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Fig 19. Package outline SOT355-1 (TSSOP24)
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
22 of 27
74HC4067-Q100; 74HCT4067-Q100
NXP Semiconductors
16-channel analog multiplexer/demultiplexer
'+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJH
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Fig 20. Package outline SOT815-1 (DHVQFN24)
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
23 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
15. Abbreviations
Table 14.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
MIL
Military
16. Revision history
Table 15.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT4067_Q100 v.1
20150522
Product data sheet
-
-
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
24 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT4067_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
25 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT4067_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
26 of 27
NXP Semiconductors
74HC4067-Q100; 74HCT4067-Q100
16-channel analog multiplexer/demultiplexer
19. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 13
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Additional dynamic characteristics . . . . . . . . 18
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 21
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Contact information. . . . . . . . . . . . . . . . . . . . . 26
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2015.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 May 2015
Document identifier: 74HC_HCT4067_Q100