isl3259e

ISL3259E
®
Data Sheet
February 18, 2008
FN6587.1
±15kV ESD Protected, 100Mbps, 5V,
PROFIBUS®, Full Fail-safe,
RS-485/RS-422 Transceivers
Features
Intersil’s ISL3259E is a ±15kV IEC61000 ESD Protected, 5V
powered, single transceiver that meets both the RS-485 and
RS-422 standards for balanced communication. It also
features the larger output voltage and higher data rate (up to
100Mbps) required by high speed PROFIBUS applications.
The low bus currents (+220µA/-150µA) present a “1/5 unit
load” to the RS-485 bus, thus allowing up to 160 transceivers
on the network without violating the RS-485 specification’s
load limit, and without using repeaters.
• Large Differential VOUT . . . . . . . . . . . . . . . 2.8V into 54Ω
Better Noise Immunity, or Drive up to 6 Terminations
• IEC61000 ESD Protection on RS-485 I/O Pins . . . ±15kV
- Class 3 HBM ESD Level on all Other Pins . . . . . . >9kV
This transceiver requires a 5V supply, and delivers at least a
2.1V differential output voltage. This translates into better noise
immunity (data integrity), longer reach, or the ability to drive up
to six 120Ω terminations in “star” or other non-standard bus
topologies.
• Very High Data Rate . . . . . . . . . . . . . . . . up to 100Mbps
• 11/13ns (Max) Tx/Rx Propagation Delays; 1.5ns (Max)
Skew
• 1/5 Unit Load Allows up to 160 Devices on the Bus
• Full Fail-Safe (Open, Shorted, Terminated/Undriven)
Receiver
• High Rx IOL to Drive Opto-Couplers for Isolated
Applications
• Hot Plug - Tx and Rx Outputs Remain Three-State During
Power-Up
SCSI applications benefit from the ISL3259’s low receiver
and transmitter part-to-part skews, which make it perfect for
high speed parallel applications where large numbers of bits
must be simultaneously captured. The low bit-to-bit skew
eases the timing constraints on the data latching signal.
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . 4mA
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven. Rx outputs feature high
drive levels (typically >30mA @ VOL = 1V) to ease the design
of optically isolated interfaces.
• Operates from a Single +5V Supply
Hot Plug circuitry ensures that the Tx and Rx outputs remain
in a high impedance state while the power supply stabilizes.
Applications
Driver (Tx) outputs are short circuit protected, even for
voltages exceeding the power supply voltage. Additionally,
on-chip thermal shutdown circuitry disables the Tx outputs to
prevent damage if power dissipation becomes excessive.
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . . 1µA
• -7V to +12V Common Mode Input Voltage Range
• Three-State Rx and Tx Outputs
• Current Limiting and Thermal Shutdown for Driver
Overload Protection
• Pb-Free (RoHS Compliant)
• PROFIBUS® DP and FMS Networks
• SCSI “Fast 40” Drivers and Receivers
• Motor Controller/Position Encoder Systems
• Factory Automation
• Field Bus Networks
• Security Networks
• Building Environmental Control Systems
• Industrial/Process Control Networks
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL3259E
Ordering Information
PART NUMBER
(Notes 1, 2)
TEMP. RANGE
(°C)
PART MARKING
PACKAGE
(Pb-Free)
PKG. DWG. #
ISL3259EIBZ
3259 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL3259EIUZ
3259Z
-40 to +85
8 Ld MSOP
M8.118
ISL3259EIRZ
3259
-40 to +85
10 Ld 3x3 DFN
L10.3x3C
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
Pinouts
ISL3259E
(10 LD DFN)
TOP VIEW
ISL3259E
(8 LD MSOP, SOIC)
TOP VIEW
RO 1
8
VCC
RE 2
7
B/Z
DE 3
6
A/Y
5
GND
DI 4
R
D
Truth Table
RO
1
10 VCC
RE
2
9 NC
DE
3
8 B/Z
DI
4
7 A/Y
NC
5
6 GND
Truth Table
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
OUTPUT
RE
DE
DI
B/Z
A/Y
RE
DE
A-B
RO
X
1
1
0
1
0
0
≥-0.05V
1
X
1
0
1
0
0
0
≤-0.2V
0
0
0
X
High-Z
High-Z
0
0
Inputs Open/Shorted
1
1
0
X
High-Z*
High-Z*
1
1
X
High-Z
1
0
X
High-Z*
NOTE: *Shutdown Mode
NOTE: *Shutdown Mode
2
FN6587.1
February 18, 2008
ISL3259E
Pin Descriptions
PIN
FUNCTION
RO
Receiver output: If A - B ≥ -50mV, RO is high; If A - B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted,
or connected to a terminated bus that is undriven.
RE
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t
required, connect RE directly to GND.
DE
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. If the
Tx enable function isn’t required, connect DE to VCC through a 1kΩ or greater resistor.
DI
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
Ground connection. This is also the potential of the DFN thermal pad.
A/Y
±15kV IEC61000 ESD Protected RS-485, RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input (A)
if DE = 0; pin is an output (Y) if DE = 1.
B/Z
±15kV IEC61000 ESD Protected RS-485, RS-422 level, inverting receiver input and inverting driver output. Pin is an input (B) if
DE = 0; pin is an output (Z) if DE = 1.
VCC
System power supply input (4.75V to 5.25V).
NC
No Connection.
Typical Operating Circuit
ISL3259E
+5V
+5V
MSOP PIN NUMBERS SHOWN
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
D
2 RE
B/Z
7
3 DE
A/Y
6
4 DI
RT
RT
7
B/Z
DE 3
6
A/Y
RE 2
R
D
GND
GND
5
5
3
DI 4
RO 1
FN6587.1
February 18, 2008
ISL3259E
Absolute Maximum Ratings
Thermal Information
VCC to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical)
θJA (°C/W)
8 Ld SOIC Package (Note 3) . . . . . . . . . . . . . . . . . .
105
8 Ld MSOP Package (Note 3) . . . . . . . . . . . . . . . . .
140
10 Ld DFN Package (Note 4). . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
Electrical Specifications
Test Conditions: VCC = 4.75V to 5.25V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 5).
PARAMETER
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
No Load
Full
-
-
VCC
RL = 100Ω (RS-422) (Figure 1A)
Full
2.6
3.4
-
SYMBOL
TEST CONDITIONS
UNITS
DC CHARACTERISTICS
Driver Differential VOUT
VOD
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
V
RL = 54Ω (RS-485) (Figure 1A)
Full
2.1
2.8
VCC
V
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B)
Full
1.9
2.7
-
V
ΔVOD
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
2
3
V
ΔVOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
Logic Input High Voltage
VIH
DI, DE, RE
Full
2
-
-
V
Logic Input Low Voltage
VIL
DI, DE, RE
Full
-
-
0.8
V
Logic Input Current
IIN1
DI = DE = RE = 0V or VCC
Full
-2
-
2
µA
Input Current (A/Y, B/Z)
IIN2
DE = 0V, VCC = 0V or
5.25V
VIN = 12V
Full
-
-
220
µA
VIN = -7V
Full
-160
-
-
µA
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 7)
Full
-
-
±250
mA
IOSD1
Driver Short-Circuit Current,
VO = High or Low
Differential Capacitance
CD
A/Y to B/Z
25
-
9
-
pF
Receiver Differential Threshold
Voltage
VTH
-7V ≤ VCM ≤ 12V
Full
-200
-
-50
mV
Receiver Input Hysteresis
ΔVTH
VCM = 0V
25
-
28
-
mV
Receiver Output High Voltage
VOH
IO = -8mA, VID = -50mV
Full
VCC - 0.5
-
-
V
Receiver Output Low Voltage
VOL
IO = +10mA, VID = -200mV
Full
-
-
0.4
V
Receiver Output Low Current
IOL
VOL = 1V, VID = -200mV
Full
25
40
-
mA
Three-State (High Impedance)
Receiver Output Current
IOZR
0.4V ≤ VO ≤ 2.4V
Full
-1
0.015
1
µA
4
FN6587.1
February 18, 2008
ISL3259E
Electrical Specifications
Test Conditions: VCC = 4.75V to 5.25V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 5). (Continued)
PARAMETER
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
-7V ≤ VCM ≤ 12V
Full
54
80
-
kΩ
0V ≤ VO ≤ VCC
Full
±20
-
±110
mA
DI = DE = 0V or VCC
Full
-
2.6
4
mA
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
0.05
1
µA
IEC61000-4-2, Air-Gap Discharge Method
25
-
±15
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
±8
-
kV
Human Body Model, From Bus Pins to GND
25
-
±16.5
-
kV
SYMBOL
Receiver Input Resistance
RIN
Receiver Short-Circuit Current
IOSR
TEST CONDITIONS
SUPPLY CURRENT
No-Load Supply Current (Note 6)
Shutdown Supply Current
ICC
ISHDN
ESD PERFORMANCE
RS-485 Pins (A/Y, B/Z)
All Pins
HBM, per MIL-STD-883 Method 3015
25
-
> ±9
-
kV
Machine Model
25
-
> ±400
-
V
VOD ≥ ±1.5V, RD = 54Ω, CL = 100pF (Figure 4)
Full
100
-
-
Mbps
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
Driver Differential Output Delay
tDD
RD = 54Ω, CD = 50pF (Figure 2)
Full
-
8
12
ns
Driver Differential Output Skew
tSKEW
RD = 54Ω, CD = 50pF (Figure 2)
Full
-
0.5
1.5
ns
Prop Delay Part-to-Part Skew
tSKP-P
RD = 54Ω, CD = 50pF (Figure 2), (Note 13)
Full
-
-
4
ns
Driver Differential Rise or Fall
Time
tR, tF
RD = 54Ω, CD = 50pF (Figure 2)
Full
2
5
8
ns
Driver Enable to Output High
tZH
RL = 110Ω, CL = 50pF, SW = GND (Figure 3),
(Note 8)
Full
-
13
20
ns
Driver Enable to Output Low
tZL
RL = 110Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 8)
Full
-
11
20
ns
Full
-
2.5
-
ns
tENSKEW |tZH (Y or Z) - tZL (Z or Y)|
Driver Enable Time Skew
Driver Disable from Output High
Driver Disable from Output Low
tHZ
RL = 110Ω, CL = 50pF, SW = GND (Figure 3)
Full
-
14
20
ns
tLZ
RL = 110Ω, CL = 50pF, SW = VCC (Figure 3)
Full
-
12
20
ns
Full
-
3
-
ns
Full
60
-
600
ns
tDISSKEW |tHZ (Y or Z) - tLZ (Z or Y)|
Driver Disable Time Skew
Time to Shutdown
tSHDN
(Note 10)
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 10, 11)
Full
-
-
1000
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 110Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 10, 11)
Full
-
-
1000
ns
Full
100
-
-
Mbps
Full
-
9
13
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
VID = ±1.5V
tPLH, tPHL (Figure 5)
Receiver Input to Output Delay
Receiver Skew | tPLH - tPHL |
tSKD
Prop Delay Part-to-Part Skew
tSKP-P
(Figure 5)
Full
-
0
1.5
ns
(Figure 5), (Note 13)
Full
-
-
4
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Note 9)
Full
-
-
12
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Note 9)
Full
-
-
12
ns
Receiver Disable from Output
High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
Full
-
-
12
ns
5
FN6587.1
February 18, 2008
ISL3259E
Electrical Specifications
Test Conditions: VCC = 4.75V to 5.25V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 5). (Continued)
PARAMETER
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
Full
-
-
12
ns
(Note 10)
Full
60
-
600
ns
SYMBOL
Receiver Disable from Output
Low
tLZ
Time to Shutdown
tSHDN
TEST CONDITIONS
Receiver Enable from Shutdown
to Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 10, 12)
Full
-
-
1000
ns
Receiver Enable from Shutdown
to Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 10, 12)
Full
-
-
1000
ns
NOTES:
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
6. Supply current specification is valid for loaded drivers when DE = 0V.
7. Applies to peak current. See “Typical Performance Curves” starting on page 11 for more information.
8. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
9. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
10. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not
to enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power
Shutdown Mode” on page 11.
11. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN.
12. Set the RE signal high time >700ns to ensure that the device enters SHDN.
13. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.).
14. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Test Circuits and Waveforms
VCC
RL/2
DE
375Ω
VCC
Z
DI
Z
DI
VOD
D
DE
Y
Y
RL/2
FIGURE 1A. VOD AND VOC
VOC
VCM
VOD
D
RL = 60Ω
-7V TO +12V
375Ω
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
6
FN6587.1
February 18, 2008
ISL3259E
Test Circuits and Waveforms (Continued)
3V
DI
1.5V
1.5V
0V
VCC
tPHL
tPLH
DE
Z
DI
RD
D
OUT (Z)
VOH
OUT (Y)
VOL
CD
Y
SIGNAL
GENERATOR
90%
DIFF OUT (Y - Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
3V
50pF
DE
(NOTE 10)
1.5V
1.5V
0V
tZH, tZH(SHDN)
PARAMETER
OUTPUT
RE
DI
SW
tHZ
Y/Z
X
1/0
GND
tLZ
Y/Z
X
0/1
VCC
tZH
Y/Z
0 (Note 8)
1/0
GND
tZL
Y/Z
0 (Note 8)
0/1
VCC
tHZ(SHDN)
Y/Z
1 (Note 11)
1/0
GND
tLZ(SHDN)
Y/Z
(NOTE 10)
tHZ
OUTPUT HIGH
VOH - 0.5V
VOH
50%
OUT (Y, Z)
0V
tZL, tZL(SHDN)
tLZ
(NOTE 10)
VCC
OUT (Y, Z)
50%
OUTPUT LOW
1 (Note 11)
0/1
VOL + 0.5V V
OL
VCC
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3A. TEST CIRCUIT
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
VCC
DE
+
CL
Z
DI
54Ω
D
Y
VOD
3V
DI
0V
-
SIGNAL
GENERATOR
CL
+VOD
DIFF OUT (Y - Z)
-VOD
FIGURE 4A. TEST CIRCUIT
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER DATA RATE
7
FN6587.1
February 18, 2008
ISL3259E
Test Circuits and Waveforms (Continued)
+3V
RE
+1.5V
A
15pF
B
R
A
1.5V
1.5V
RO
0V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
1.7V
RO
1.7V
0V
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY
RE
GND
B
A
1kΩ
RO
R
VCC
SW
SIGNAL
GENERATOR
GND
15pF
(NOTE 10)
3V
RE
1.5V
1.5V
0V
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 9)
0
+1.5V
GND
tZL (Note 9)
0
-1.5V
VCC
tHZ(SHDN) (Note 12)
0
+1.5V
GND
tLZ(SHDN) (Note 12)
0
-1.5V
VCC
FIGURE 6A. TEST CIRCUIT
tZH, tZH(SHDN)
(NOTE 10)
tHZ
OUTPUT HIGH
VOH - 0.5V
VOH
1.5V
RO
0V
tZL, tZL(SHDN)
tLZ
(NOTE 10)
RO
VCC
1.5V
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
8
FN6587.1
February 18, 2008
ISL3259E
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only
one driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any mix of
drivers and receivers) on each bus. To allow for multipoint
operation, the RS-485 spec requires that drivers must
handle bus contention without sustaining any damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’ (~1200m), so the wide CMR is necessary to
handle ground potential differences, as well as voltages
induced in the cable by external fields.
Receiver (Rx) Features
This transceiver utilizes a differential input receiver for
maximum noise immunity and common mode rejection. Input
sensitivity is ±200mV, as required by the RS-422 and RS-485
specifications. Receiver inputs function with common mode
voltages as great as 7V outside the power supplies (i.e.,
+12V and -7V), making them ideal for long networks, or
industrial environments, where induced voltages are a
realistic concern.
The receiver input resistance of 50kΩ surpasses the RS-422
spec of 4kΩ, and is 5x the RS-485 “Unit Load” (UL)
requirement of 12kΩ minimum. Thus, the ISL3259E is
known as a “one-fifth UL” transceiver, and there can be up to
160 devices on the RS-485 bus while still complying with the
RS-485 loading specification.
The receiver is a “full fail-safe” version that guarantees a
high level receiver output if the receiver inputs are
unconnected (floating), shorted together, or connected to a
terminated bus with all the transmitters disabled
(terminated/undriven).
Rx outputs deliver large low state currents (typically >30mA)
at VOL = 1V, to ease the design of optically coupled isolated
networks.
Receivers easily meet the 100Mbps data rate supported by
the driver, and the receiver output is tri-statable via the active
low RE input.
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 2.1V across a 54Ω load (RS-485/
PROFIBUS), and at least 2.6V across a 100Ω load (RS-422)
even with VCC = 4.75V. The drivers feature low propagation
delay skew to maximize bit width, and to minimize EMI.
9
Outputs of the drivers are not slew rate limited, so faster
output transition times allow data rates up to100Mbps. Driver
outputs are tri-statable via the active high DE input.
For parallel applications, bit-to-bit skews between any two
ISL3259E transmitter and receiver pairs are guaranteed to
be no worse than 8ns (4ns max for any two Tx, 4ns max for
any two Rx).
High VOD Improves Noise Immunity and Flexibility
The ISL3259E driver design delivers larger differential output
voltages (VOD) than the RS-485 standard requires, or than
most RS-485 transmitters can deliver. The minimum ±2.1V
VOD guarantees at least ±600mV more noise immunity than
networks built using standard 1.5V VOD transmitters.
Another advantage of the large VOD is the ability to drive more
than two bus terminations, which allows for utilizing the
ISL3259E in “star” and other multi-terminated, “non-standard”
network topologies. Figure 8, details the transmitter’s VOD vs
IOUT characteristic, and includes load lines for four (30Ω) and
six (20Ω) 120Ω terminations. The figure shows that the driver
typically delivers 1.9/1.5V into 4/6 terminations, even at +85°C.
The RS-485 standard requires a minimum 1.5V VOD into two
terminations, but the ISL3259E typically delivers RS-485
voltage levels with 2x to 3x the number of terminations.
ESD Protection
All pins on the ISL3259E include class 3 (>9kV) Human
Body Model (HBM) ESD protection structures, but the
RS-485 pins (driver outputs and receiver inputs)
incorporate advanced structures allowing them to survive
ESD events in excess of ±16.5kV HBM and ±15kV
IEC61000-4-2. The RS-485 pins are particularly vulnerable
to ESD strikes because they typically connect to an
exposed port on the exterior of the finished product. Simply
touching the port pins, or connecting a cable, can cause an
ESD event that might destroy unprotected ICs. These new
ESD structures protect the device whether or not it is
powered up, and without degrading the RS-485 common
mode range of -7V to +12V. This built-in ESD protection
eliminates the need for board level protection structures
(e.g., transient suppression diodes), and the associated,
undesirable capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-485 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The
IEC61000 standard’s lower current limiting resistor coupled
with the larger charge storage capacitor yields a test that is
much more severe than the HBM test. The extra ESD
protection built into this device’s RS-485 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-485 port.
FN6587.1
February 18, 2008
ISL3259E
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is more difficult to obtain
repeatable results. The ISL3259E RS-485 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±9kV. The RS-485 pins of the ISL3259E survive
±8kV contact discharges.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and
Rx outputs are kept disabled. If the equipment is connected
to the bus, a driver activating prematurely during power-up
may crash the bus. To avoid this scenario, the ISL3259E
incorporates a “Hot Plug” function. Circuitry monitoring VCC
ensures that, during power-up and power-down, the Tx and Rx
outputs remain disabled, regardless of the state of DE and RE,
if VCC is less than ~3.2V. This gives the processor/ASIC a
chance to stabilize and drive the RS-485 control lines to the
proper states.
RE = GND
3.3V
3.1V
5.0
2.5
0
5.0
RL = 1kΩ
2.5
A/Y
ISL3259E
0
5.0
RL = 1kΩ
RO
2.5
ISL3259E
0
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
VCC
VCC (V)
DE, DI = VCC
TIME (40μs/DIV)
FIGURE 7. HOT PLUG PERFORMANCE (ISL3259E) vs
ISL83088E WITHOUT HOT PLUG CIRCUITRY
Data Rate, Cables, and Terminations
Twisted pair is the cable of choice for RS-485, RS-422, and
PROFIBUS networks. Twisted pair cables tend to pick up
noise and other electromagnetically induced voltages as
common mode signals, which are effectively rejected by the
differential receivers in these ICs.
10
According to guidelines in the RS-422 and PROFIBUS
specifications, networks operating at data rates in excess of
3Mbps should be limited to cable lengths of 100m (328 ft) or
less, and the PROFIBUS specification recommends that the
more expensive “Type A” (22AWG) cable be used. The
ISL3259E’s large differential output swing, fast transition
times, and high drive-current output stages allow operation
even at 100Mbps over standard “CAT-5” cables up to 31m
(100 ft). Figures 16 and 17 detail the ISL3259E performance
at this condition, with a 120Ω termination resistor at both the
driver and the receiver ends. Note that the differential signal
delivered to the receiver at the end of the cable (A - B) still
exceeds 1V, so even longer cables could be driven if lower
noise margins are acceptable. Of course, jitter or some other
criteria may limit the network to shorter cable lengths than
those discussed here. If more noise margin is desired,
shorter cables may produce a larger receiver input signal.
Performance should be even better if the “Type A” cable is
utilized.
The ISL3259E may also be used at slower data rates over
longer cables, but there are some limitations. The Rx is
optimized for high speed operation, so its output may glitch if
the Rx input differential transition times are too slow.
Keeping the transition times below 500ns, (which equates to
the Tx driving a 1000’ (305m) CAT-5 cable) yields excellent
performance over the full operating temperature range.
To minimize reflections, proper termination is imperative when
using this high data rate transceiver. In point-to-point, or pointto-multipoint (single driver on bus) networks, the main cable
should be terminated in its characteristic impedance (typically
120Ω for “CAT-5”, and 220Ω for “Type A”) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require that
the main cable be terminated in its characteristic impedance
at both ends. Stubs connecting a transceiver to the main cable
should be kept as short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst case bus contentions undamaged.
These transmitters meet this requirement via driver output
short circuit current limits, and on-chip thermal shutdown
circuitry.
The driver output stages incorporate short circuit current limiting
circuitry, which ensures that the output current never exceeds
the RS-485 specification, even at the common mode voltage
range extremes. In the event of a major short circuit condition,
the device also includes a thermal shutdown feature that
disables the drivers whenever the die temperature becomes
excessive. This eliminates the power dissipation, allowing the
die to cool. The drivers automatically reenable after the die
temperature drops about +15°. If the contention persists, the
thermal shutdown/re-enable cycle repeats until the fault is
cleared. Receivers stay operational during thermal shutdown.
FN6587.1
February 18, 2008
ISL3259E
Low Power Shutdown Mode
This BiCMOS transceiver uses a fraction of the power
required by their bipolar counterparts, but it also includes a
shutdown feature that reduces the already low quiescent ICC
to a 50nA trickle. It enters shutdown whenever the receiver
and driver are simultaneously disabled (RE = VCC and
DE = GND) for a period of at least 600ns. Disabling both the
Typical Performance Curves
110
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
3.5
90
RD = 30Ω
+85°C
80
70
RD = 54Ω
60
50
40
RD = 100Ω
30
20
10
0
0
0.5
Note that receiver and driver enable times increase when
the transceiver enables from shutdown. Refer to Notes 8, 9,
10, 11 and 12, at the end of the “Electrical Specifications”
table on page 6, for more information.
VCC = 5V, TA = +25°C; Unless Otherwise Specified
RD = 20Ω
+25°C
100
driver and the receiver for less than 60ns guarantees that
the transceiver will not enter shutdown.
1.0
1.5
2.0
2.5
3.0
3.5
4.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
4.5
3.4
3.2
3.1
3.0
2.9
2.8
2.7
RD = 54Ω
2.6
2.5
-40
5.0
RD = 100Ω
3.3
-15
10
35
60
85
TEMPERATURE (°C)
FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
200
2.55
150
2.50
100
ICC (mA)
OUTPUT CURRENT (mA)
Y OR Z = LOW
50
0
2.45
2.40
-50
Y OR Z = HIGH
2.35
-100
DE = VCC, RE = X OR DE = GND, RE = GND
-150
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
12
FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
11
2.30
-40
-15
10
35
60
85
TEMPERATURE (°C)
FIGURE 11. SUPPLY CURRENT vs TEMPERATURE
FN6587.1
February 18, 2008
ISL3259E
Typical Performance Curves
VCC = 5V, TA = +25°C; Unless Otherwise Specified (Continued)
9.0
0.9
|tPLH - tPHL|
8.8
0.8
PROPAGATION DELAY (ns)
8.6
8.4
SKEW (ns)
0.7
8.2
tPHL
8.0
7.8
0.6
0.5
7.6
tPLH
7.4
0.4
7.2
10
35
60
0.3
-40
85
-15
TEMPERATURE (°C)
DI
0
5
RO
0
3
2
1
0
-1
RECEIVER OUTPUT (V)
5
DRIVER INPUT (V)
RDIFF = 54Ω, CD = 50pF
Y-Z
-2
-3
0
5
RO
0
3
2
1
0
-1
Y-Z
-2
-3
TIME (5ns/DIV)
5.0
RO
0
RECEIVER OUTPUT (V)
0
3.0
1.5
A-B
0
-1.5
-3.0
TIME (20ns/DIV)
FIGURE 16. WORST CASE (NEGATIVE) SINGLE PULSE
DRIVER AND RECEIVER WAVEFORMS DRIVING
100 FEET (31 METERS) OF CAT5 CABLE
(DOUBLE TERMINATED WITH 120Ω)
VCC = 4.75V
T = +85°C
DI = 100Mbps
5
0
5.0
RO
0
(~150ns)
RECEIVER INPUT (V)
RECEIVER INPUT (V)
5
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
VCC = 4.75V
T = +85°C
12
5
DI
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS
DRIVER + CABLE DELAY
85
RDIFF = 54Ω, CD = 50pF
TIME (5ns/DIV)
DI = 100Mbps
60
FIGURE 13. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE
10
35
TEMPERATURE (°C)
DRIVER INPUT (V)
-15
DRIVER INPUT (V)
7.0
-40
DRIVER + CABLE DELAY
(~150ns)
3.0
1.5
0
A-B
-1.5
-3.0
TIME (20ns/DIV)
FIGURE 17. DRIVER AND RECEIVER SEVEN PULSE
WAVEFORMS DRIVING 100 FEET (31 METERS)
OF CAT5 CABLE (DOUBLE TERMINATED WITH
120Ω)
FN6587.1
February 18, 2008
ISL3259E
Typical Performance Curves
VCC = 5V, TA = +25°C; Unless Otherwise Specified (Continued)
Die Characteristics
RECEIVER OUTPUT CURRENT (mA)
70
SUBSTRATE AND DFN THERMAL PAD POTENTIAL
(POWERED UP):
VOL, +25°C
60
VOH, +25°C
VOL, +85°C
GND
50
TRANSISTOR COUNT:
40
VOH, +85°C
768
30
PROCESS:
Si Gate BiCMOS
20
10
0
0
1
2
3
4
5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 18. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
13
FN6587.1
February 18, 2008
ISL3259E
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
α
B S
0.050 BSC
-
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
α
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
1.27 BSC
H
N
NOTES:
MILLIMETERS
8
0°
8
8°
0°
7
8°
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
14
FN6587.1
February 18, 2008
ISL3259E
Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
INCHES
E
-B-
INDEX
AREA
1 2
0.20 (0.008)
A B C
TOP VIEW
4X θ
0.25
(0.010)
R1
R
GAUGE
PLANE
SEATING
PLANE -CA
4X θ
A2
A1
b
-H-
0.10 (0.004)
L
SEATING
PLANE
C
MIN
MAX
MIN
MAX
NOTES
A
0.037
0.043
0.94
1.10
-
A1
0.002
0.006
0.05
0.15
-
A2
0.030
0.037
0.75
0.95
-
b
0.010
0.014
0.25
0.36
9
c
0.004
0.008
0.09
0.20
-
D
0.116
0.120
2.95
3.05
3
E1
0.116
0.120
2.95
3.05
4
0.026 BSC
0.20 (0.008)
C
C
a
SIDE VIEW
CL
E1
0.20 (0.008)
C D
-B-
-
0.187
0.199
4.75
5.05
-
L
0.016
0.028
0.40
0.70
6
0.037 REF
N
-A-
0.65 BSC
E
L1
e
D
SYMBOL
e
L1
MILLIMETERS
0.95 REF
8
R
0.003
R1
0
α
-
8
-
0.07
0.003
-
5o
15o
0o
6o
7
-
-
0.07
-
-
5o
15o
-
0o
6o
Rev. 2 01/03
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A -H- .
and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
15
FN6587.1
February 18, 2008
ISL3259E
Dual Flat No-Lead Plastic Package (DFN)
L10.3x3C
2X
0.10 C A
A
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
D
MILLIMETERS
2X
0.10 C B
E
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.85
0.90
0.95
-
A1
-
-
0.05
-
A3
6
INDEX
AREA
b
0.20 REF
0.20
D
TOP VIEW
B
D2
//
A
C
SEATING
PLANE
D2
6
INDEX
AREA
0.08 C
7
8
D2/2
1
2.33
2.38
2.43
7, 8
1.69
7, 8
3.00 BSC
1.59
e
1.64
-
0.50 BSC
-
k
0.20
-
-
-
L
0.35
0.40
0.45
8
N
10
2
Nd
5
3
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX k
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
E2
E2/2
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
NX L
N
N-1
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
NX b
e
(Nd-1)Xe
REF.
BOTTOM VIEW
5
0.10 M C A B
(A1)
9 L
5
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
CL
NX (b)
5, 8
Rev. 1 4/06
2
(DATUM A)
8
0.30
3.00 BSC
E
E2
A3
SIDE VIEW
(DATUM B)
0.10 C
0.25
-
9. COMPLIANT TO JEDEC MO-229-WEED-3 except for
dimensions E2 & D2.
e
SECTION "C-C"
C C
TERMINAL TIP
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
FN6587.1
February 18, 2008