UM5062 Dual Line ESD Protection Diode Array UM5062 QFN3 1.4×1.1 General Description The UM5062 ESD protection diode is designed to replace multilayer varistors (MLVs) in portable applications such as cell phones, notebook computers, and PDA’s. It features large cross-sectional area junctions for conducting high transient currents, offers desirable electrical characteristics for board level protection, such as fast response time, lower operating voltage, lower clamping voltage and no device degradation when compared to MLVs. The UM5062 ESD protection diode protects sensitive semiconductor components from damage or upset due to electrostatic discharge (ESD) and other voltage induced transient events. The UM5062 is available in a QFN3 1.4mm×1.1mm package with working voltages of 5 volt. It gives designer the flexibility to protect one or two unidirectional line in applications where arrays are not practical. Additionally, it may be “sprinkled” around the board in applications where board space is at a premium. It may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level 4 (±15kV air, ±8kV contact discharge). Applications Features Cell Phone Handsets and Accessories Microprocessor Based Equipment Personal Digital Assistants (PDA’s) Notebooks, Desktops and Servers Portable Instrumentation Cordless Phones Digital Cameras Peripherals MP3 Players Pin Configurations Transient Protection for Data & Power Lines to IEC 61000-4-2 (ESD) ±15kV (Air), ±8kV (Contact) Small Package for Use in Portable Electronics Suitable Replacement for MLV’s in ESD Protection Applications Protect One or Two I/O Lines Low Clamping Voltage Stand-off Voltages: 5V Low Leakage Current Solid-State Silicon-Avalanche Technology Top View (Bottom View) XX: Week Code UM5062 QFN3 1.4×1.1 ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 1/6 UM5062 Ordering Information Part Number Working Voltage UM5062 5.0V Packaging Type Channel Marking Code QFN3 1.4×1.1 2 AD Shipping Qty 3000pcs/7 Inch Tape & Reel Absolute Maximum Ratings Rating Peak Pulse Power (tP=8/20μs) Maximum Peak Pulse Current (tP=8/20μs) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol PPK IPP TL TJ TSTG Value 140 11 260 (10 sec.) -55 to +125 -55 to +150 Unit Watts Amps °C °C °C - Symbol Definition Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Forward Current Forward Voltage @ IF Peak Power Dissipation Max. Capacitance @ VR=0V, f=1MHz Symbol IPP VC VRWM IR VBR It IF VF PPK C ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 2/6 UM5062 Electrical Characteristics (T=25°C, Device for 5.0V Reverse Stand-off Voltage) Parameter Symbol Conditions Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Min Typ Max Unit 5 V 7.2 V μA VRWM VBR IT=1mA 6 6.8 IR VRWM=5V, T=25°C 0.1 IPP=5A, tP=8/20μs 9.1 IPP=11A, tP=8/20μs 13 Clamping Voltage VC V Forward Voltage VF IF=10mA 0.8 Junction Capacitance CJ VR=0V, f=1MHz 40 55 pF Junction Capacitance CJ VR=2.5V, f=1MHz 30 40 pF V Typical Operating Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Clamping Voltage vs. Peak Pulse Current 1 Peak Pulse Power - Ppk(kW) 13 Clamping Voltage - Vc(V) 12 0.1 11 10 9 8 Waveform parameters: tr=8uS td=20uS 7 0.02 0.04 0.1 1 10 100 1000 6 0 Pulse Duration - tp(uS) 2 4 6 8 10 Peak Pulse Current - Ipp(A) Forward Voltage vs. Forward Current Junction Capacitance vs. Reverse Voltage 50 5 4 3 Waveform parameters: tr=8uS td=20uS 2 Junction Capacitance(pF) Forward Voltage - Vf(V) 6 45 40 35 30 1 2 4 6 8 Forward Current - If(A) 10 0 1 2 3 4 5 Reverse Voltage (V) ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 3/6 UM5062 Applications Information Device Connection Options UM5062 ESD protection diode is designed to protect one or two I/O lines. The device is unidirectional and may be used on lines where the signal polarity is above ground. The cathode band should be placed towards the line that is to be protected. Circuit Board Layout Recommendations for Suppression of ESD Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: 1. Place the TVS near the input terminals or connectors to restrict transient coupling. 2. Minimize the path length between the TVS and the protected line. 3. Minimize all conductive loops including power and ground loops. 4. The ESD transient return path to ground should be kept as short as possible. 5. Never run critical signals near board edges. 6. Use ground planes whenever possible. For multilayer printed-circuit boards, use ground vias. 7. Keep parallel signal paths to a minimum. 8. Avoid running protection conductors in parallel with unprotected conductor. 9. Minimize all printed-circuit board conductive loops including power and ground loops. 10. Avoid using shared transient return paths to a common ground point. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 4/6 UM5062 Package Information UM5062 QFN3 1.4×1.1 Outline Drawing D D2 e E E2 b Symbol 0.20 Top View L Pin #1 ID A1 A Bottom View Side View A A1 b D D2 E E2 e L DIMENSIONS MILLIMETERS INCHES Min Typ Max Min Typ Max 0.47 0.50 0.53 0.019 0.020 0.021 0.00 0.02 0.05 0.000 0.0008 0.002 0.25 0.30 0.35 0.010 0.012 0.014 1.35 1.40 1.475 0.053 0.055 0.058 0.65 0.75 0.85 0.026 0.030 0.033 1.05 1.10 1.175 0.041 0.043 0.046 0.65 0.75 0.85 0.026 0.030 0.033 0.55TYP 0.022TYP 0.225 0.275 0.325 0.009 0.011 0.013 Land Pattern 1.40 0.95 0.55 0.95 1.10 0.30 0.10 0.20 0.425 NOTES: 1. Compound dimension: 1.40×1.10: 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation AD XX ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 5/6 UM5062 GREEN COMPLIANCE Union Semiconductor is committed to environmental excellence in all aspects of its operations including meeting or exceeding regulatory requirements with respect to the use of hazardous substances. Numerous successful programs have been implemented to reduce the use of hazardous substances and/or emissions. All Union components are compliant with the RoHS directive, which helps to support customers in their compliance with environmental directives. For more green compliance information, please visit: http://www.union-ic.com/index.aspx?cat_code=RoHSDeclaration IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai 201210 Tel: 021-51093966 Fax: 021-51026018 Website: www.union-ic.com ___________________________________________________________________________ http://www.union-ic.com Rev.03 Apr.2016 6/6