MCP2551 High-Speed CAN Transceiver Package Types • Supports 1 Mb/s operation • Implements ISO-11898 standard physical layer requirements • Suitable for 12V and 24V systems • Externally-controlled slope for reduced RFI emissions • Detection of ground fault (permanent Dominant) on TXD input • Power-on Reset and voltage brown-out protection • An unpowered node or brown-out event will not disturb the CAN bus • Low current standby operation • Protection against damage due to short-circuit conditions (positive or negative battery voltage) • Protection against high-voltage transients • Automatic thermal shutdown protection • Up to 112 nodes can be connected • High-noise immunity due to differential bus implementation • Temperature ranges: - Industrial (I): -40°C to +85°C - Extended (E): -40°C to +125°C PDIP/SOIC TXD 1 VSS 2 VDD 3 RXD 4 MCP2551 Features 8 RS 7 CANH 6 CANL 5 VREF Block Diagram VDD TXD Dominant Detect VDD Driver Control TXD RS Slope Control Power-On Reset RXD VREF Thermal Shutdown CANH 0.5 VDD GND Reference Voltage CANL Receiver VSS © 2010 Microchip Technology Inc. DS21667F-page 1 MCP2551 NOTES: DS21667F-page 2 © 2010 Microchip Technology Inc. MCP2551 1.0 DEVICE OVERVIEW 1.4 Operating Modes The MCP2551 is a high-speed CAN, fault-tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP2551 device provides differential transmit and receive capability for the CAN protocol controller, and is fully compatible with the ISO-11898 standard, including 24V requirements. It will operate at speeds of up to 1 Mb/s. The RS pin allows three modes of operation to be selected: Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources (EMI, ESD, electrical transients, etc.). When in High-Speed or Slope-Control mode, the drivers for the CANH and CANL signals are internally regulated to provide controlled symmetry in order to minimize EMI emissions. 1.1 Transmitter Function The CAN bus has two states: Dominant and Recessive. A Dominant state occurs when the differential voltage between CANH and CANL is greater than a defined voltage (e.g.,1.2V). A Recessive state occurs when the differential voltage is less than a defined voltage (typically 0V). The Dominant and Recessive states correspond to the Low and High state of the TXD input pin, respectively. However, a Dominant state initiated by another CAN node will override a Recessive state on the CAN bus. 1.1.1 MAXIMUM NUMBER OF NODES The MCP2551 CAN outputs will drive a minimum load of 45Ω, allowing a maximum of 112 nodes to be connected (given a minimum differential input resistance of 20 kΩ and a nominal termination resistor value of 120Ω). 1.2 Receiver Function The RXD output pin reflects the differential bus voltage between CANH and CANL. The Low and High states of the RXD output pin correspond to the Dominant and Recessive states of the CAN bus, respectively. 1.3 Internal Protection CANH and CANL are protected against battery shortcircuits and electrical transients that can occur on the CAN bus. This feature prevents destruction of the transmitter output stage during such a fault condition. • High-Speed • Slope-Control • Standby These modes are summarized in Table 1-1. Additionally, the slope of the signal transitions on CANH and CANL can be controlled with a resistor connected from pin 8 (RS) to ground. The slope must be proportional to the current output at RS, which will further reduce EMI emissions. 1.4.1 HIGH-SPEED High-Speed mode is selected by connecting the RS pin to VSS. In this mode, the transmitter output drivers have fast output rise and fall times to support high-speed CAN bus rates. 1.4.2 SLOPE-CONTROL Slope-Control mode further reduces EMI by limiting the rise and fall times of CANH and CANL. The slope, or slew rate (SR), is controlled by connecting an external resistor (REXT) between RS and VOL (usually ground). The slope is proportional to the current output at the RS pin. Since the current is primarily determined by the slope-control resistance value REXT, a certain slew rate is achieved by applying a specific resistance. Figure 1-1 illustrates typical slew rate values as a function of the slope-control resistance value. 1.4.3 STANDBY MODE The device may be placed in Standby or SLEEP mode by applying a high-level to the RS pin. In SLEEP mode, the transmitter is switched off and the receiver operates at a lower current. The receive pin on the controller side (RXD) is still functional, but will operate at a slower rate. The attached microcontroller can monitor RXD for CAN bus activity and place the transceiver into normal operation via the RS pin (at higher bus rates, the first CAN message may be lost). The device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of 165°C. All other parts of the chip remain operational, and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. This protection is essential to protect against bus line short-circuit-induced damage. © 2010 Microchip Technology Inc. DS21667F-page 3 MCP2551 TABLE 1-1: MODES OF OPERATION Mode Current at Rs Pin Standby Slope-Control High-Speed Resulting Voltage at RS Pin -IRS < 10 µA 10 µA < -IRS < 200 µA -IRS < 610 µA TABLE 1-2: VRS > 0.75 VDD 0.4 VDD < VRS < 0.6 VDD 0 < VRS < 0.3VDD TRANSCEIVER TRUTH TABLE VDD VRS TXD CANH Bus State( 1) CANL HIGH LOW Dominant Not Driven Not Driven Recessive Not Driven Not Driven Recessive VRS > 0.75 VDD HIGH LOW Dominant VRS < 0.75 VDD VPOR < VDD < 4.5V Not Driven Not Driven Recessive (See Note 3) Not Driven Not Driven Recessive VRS > 0.75 VDD Not Driven/ Not Driven/ 0 < VDD < VPOR X X High Impedance No Load No Load Note 1: If another bus node is transmitting a Dominant bit on the CAN bus, then RXD is a logic ‘0’. 2: X = “don’t care”. 3: Device drivers will function, although outputs are not ensured to meet the ISO-11898 specification. VRS < 0.75 VDD 4.5V ≤ VDD ≤ 5.5V FIGURE 1-1: 0 1 or floating X 0 1 or floating X RXD( 1) 0 1 1 0 1 1 X SLEW RATE VS. SLOPE-CONTROL RESISTANCE VALUE 25 Slew Rate V/μs 20 15 10 5 0 10 20 30 40 49 60 70 76 90 100 110 120 Resistance (k) DS21667F-page 4 © 2010 Microchip Technology Inc. MCP2551 1.5 TXD Permanent Dominant Detection If the MCP2551 detects an extended Low state on the TXD input, it will disable the CANH and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers are disabled if TXD is Low for more than 1.25 ms (minimum). This implies a maximum bit time of 62.5 µs (16 kb/s bus rate), allowing up to 20 consecutive transmitted Dominant bits during a multiple bit error and error frame scenario. The drivers remain disabled as long as TXD remains Low. A rising edge on TXD will reset the timer logic and enable the CANH and CANL output drivers. 1.6 When the device is powered on, CANH and CANL remain in a high-impedance state until VDD reaches the voltage-level VPORH. In addition, CANH and CANL will remain in a high-impedance state if TXD is Low when VDD reaches VPORH. CANH and CANL will become active only after TXD is asserted High. Once powered on, CANH and CANL will enter a high-impedance state if the voltage level at VDD falls below VPORL, providing voltage brown-out protection during normal operation. 1.7.2 GROUND SUPPLY (VSS) Ground supply pin. SUPPLY VOLTAGE (VDD) Positive supply voltage pin. 1.7.4 RECEIVER DATA OUTPUT (RXD) RXD is a CMOS-compatible output that drives High or Low depending on the differential signals on the CANH and CANL pins and is usually connected to the receiver data input of the CAN controller device. RXD is High when the CAN bus is Recessive and Low in the Dominant state. 1.7.5 Pin Descriptions TRANSMITTER DATA INPUT (TXD) TXD is a TTL-compatible input pin. The data on this pin is driven out on the CANH and CANL differential output pins. It is usually connected to the transmitter data output of the CAN controller device. When TXD is Low, CANH and CANL are in the Dominant state. When TXD is High, CANH and CANL are in the Recessive state, provided that another CAN node is not driving the CAN bus with a Dominant state. TXD has an internal pull-up resistor (nominal 25 kΩ to VDD). 1.7.3 Power-on Reset 1.7 1.7.1 REFERENCE VOLTAGE (VREF) Reference Voltage Output (defined as VDD/2). The 8-pin pinout is listed in Table 1-3. 1.7.6 TABLE 1-3: MCP2551 PINOUT CAN LOW (CANL) The CANL output drives the Low side of the CAN differential bus. This pin is also tied internally to the receive input comparator. Pin Number Pin Name 1 TXD Transmit Data Input 1.7.7 2 VSS Ground 3 VDD Supply Voltage 4 RXD Receive Data Output The CANH output drives the high-side of the CAN differential bus. This pin is also tied internally to the receive input comparator. 5 VREF Reference Output Voltage 1.7.8 6 CANL CAN Low-Level Voltage I/O 7 CANH CAN High-Level Voltage I/O The RS pin is used to select High-Speed, Slope-Control or Standby modes via an external biasing resistor. 8 RS Pin Function CAN HIGH (CANH) SLOPE RESISTOR INPUT (RS) Slope-Control Input © 2010 Microchip Technology Inc. DS21667F-page 5 MCP2551 NOTES: DS21667F-page 6 © 2010 Microchip Technology Inc. MCP2551 2.0 ELECTRICAL CHARACTERISTICS 2.1 Terms and Definitions A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section. 2.1.1 BUS VOLTAGE VCANL and VCANH denote the voltages of the bus line wires CANL and CANH relative to ground of each individual CAN node. 2.1.2 COMMON MODE BUS VOLTAGE RANGE Boundary voltage levels of VCANL and VCANH with respect to ground, for which proper operation will occur, if up to the maximum number of CAN nodes are connected to the bus. 2.1.3 2.1.5 DIFFERENTIAL VOLTAGE, VDIFF (OF CAN BUS) Differential voltage of the two-wire CAN bus, value VDIFF = VCANH - VCANL. 2.1.6 INTERNAL CAPACITANCE, CIN (OF A CAN NODE) Capacitance seen between CANL (or CANH) and ground during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). 2.1.7 INTERNAL RESISTANCE, RIN (OF A CAN NODE) Resistance seen between CANL (or CANH) and ground during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). FIGURE 2-1: PHYSICAL LAYER DEFINITIONS ECU DIFFERENTIAL INTERNAL CAPACITANCE, CDIFF (OF A CAN NODE) RIN Capacitance seen between CANL and CANH during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). RIN CANL CANH CIN 2.1.4 DIFFERENTIAL INTERNAL RESISTANCE, RDIFF (OF A CAN NODE) CDIFF RDIFF CIN GROUND Resistance seen between CANL and CANH during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). © 2010 Microchip Technology Inc. DS21667F-page 7 MCP2551 Absolute Maximum Ratings† VDD .............................................................................................................................................................................7.0V DC Voltage at TXD, RXD, VREF and VS ............................................................................................ -0.3V to VDD + 0.3V DC Voltage at CANH, CANL (Note 1) .......................................................................................................... -42V to +42V Transient Voltage on Pins 6 and 7 (Note 2) ............................................................................................. -250V to +250V Storage temperature ...............................................................................................................................-55°C to +150°C Operating ambient temperature ..............................................................................................................-40°C to +125°C Virtual Junction Temperature, TVJ (Note 3).............................................................................................-40°C to +150°C Soldering temperature of leads (10 seconds) .......................................................................................................+300°C ESD protection on CANH and CANL pins (Note 4) ...................................................................................................6 kV ESD protection on all other pins (Note 4) ..................................................................................................................4 kV Note 1: Short-circuit applied when TXD is High and Low. 2: In accordance with ISO-7637. 3: In accordance with IEC 60747-1. 4: Classification A: Human Body Model. † NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DS21667F-page 8 © 2010 Microchip Technology Inc. MCP2551 2.2 DC Characteristics Electrical Characteristics: Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V DC Specifications Param No. Sym Characteristic Min Max Units Conditions D1 — 75 mA Dominant; VTXD = 0.8V; VDD D2 — 10 mA Recessive; VTXD = +2V; RS = 47 kW — 365 µA -40°C ≤ TAMB ≤ +85°C, Standby; (Note 2) — 465 µA -40°C ≤ TAMB ≤ +125°C, Standby; (Note 2) Supply IDD Supply Current D3 D4 VPORH High-level of the Power-on Reset comparator 3.8 4.3 V CANH, CANL outputs are active when VDD > VPORH D5 VPORL Low-level of the Power-on Reset comparator 3.4 4.0 V CANH, CANL outputs are not active when VDD < VPORL D6 VPORD Hysteresis of Power-on Reset comparator 0.3 0.8 V Note 1 2.0 3.0 V VTXD = VDD; no load. -2 +2 mA -2V < V(CAHL,CANH) < +7V, 0V <VDD < 5.5V -10 +10 mA -5V < V(CANL,CANH) < +40V, 0V <VDD < 5.5V Bus Line (CANH; CANL) Transmitter D7 D8 D9 VCANH(r); VCANL(r) CANH, CANL Recessive bus voltage IO(CANH)(reces) Recessive output current IO(CANL)(reces) D10 VO(CANH) CANH Dominant output voltage 2.75 4.5 V VTXD = 0.8V D11 VO(CANL) CANL Dominant output voltage 0.5 2.25 V VTXD = 0.8V D12 VDIFF(r)(o) Recessive differential output voltage -500 +50 mV D13 VDIFF(d)(o) Dominant differential output voltage 1.5 3.0 V — -200 mA VCANH = -5V — -100 (typical) mA VCANH = -40V, +40V. (Note 1) — 200 mA VCANL = -40V, +40V. (Note 1) -1.0 +0.5 V -2V < V(CANL, CANH) < +7V (Note 3) -1.0 +0.4 V -12V < V(CANL, CANH) < +12V (Note 3) D14 D15 D16 D17 Note 1: 2: 3: IO(SC)(CANH) CANH short-circuit output current IO(SC)(CANL)l CANL short-circuit output current VDIFF(r)(i) Recessive differential input voltage VTXD = 2V; no load VTXD = 0.8V; VDD = 5V 40W < RL < 60W (Note 2) This parameter is periodically sampled and not 100% tested. ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD. This is valid for the receiver in all modes; High-speed, Slope-control and Standby. © 2010 Microchip Technology Inc. DS21667F-page 9 MCP2551 2.2 DC Characteristics (Continued) Electrical Characteristics: Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V DC Specifications (Continued) Param No. Sym Characteristic Min Max Units Conditions Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven] D18 D19 VDIFF(d)(i) VDIFF(h)(i) D20 RIN D21 RIN(d) Dominant differential input voltage Differential input hysteresis 0.9 5.0 V -2V < V(CANL, CANH) < +7V (Note 3) 1.0 5.0 V -12V < V(CANL, CANH) < +12V (Note 3) 100 200 mV CANH, CANL Commonmode input resistance 5 50 kW Deviation between CANH and CANL Common-mode input resistance -3 +3 % See Figure 2-3 (Note 1) VCANH = VCANL Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven] D22 D24 RDIFF Differential input resistance 20 100 kW ILI CANH, CANL input leakage current — 150 µA VDD < VPOR; VCANH = VCANL = +5V V Output Recessive Transmitter Data Input (TXD) D25 VIH High-level input voltage 2.0 VDD D26 VIL Low-level input voltage VSS +0.8 V Output Dominant D27 IIH High-level input current -1 +1 µA VTXD = VDD D28 IIL Low-level input current -100 -400 µA VTXD = 0V — V IOH = 8 mA 0.8 V IOL = 8 mA V -50 µA < IVREF < 50 µA Receiver Data Output (RXD) D31 VOH High-level output voltage D32 VOL Low-level output voltage 0.7 VD D — Voltage Reference Output (VREF) D33 VREF Reference output voltage 0.45 V 0.55 VD DD D Standby/Slope-Control (RS pin) D34 VSTB D35 ISLOPE D36 VSLOPE Input voltage for standby mode Slope-control mode current Slope-control mode voltage 0.75 V DD -10 0.4 VD D — V -200 µA 0.6 VDD V Thermal Shutdown D37 TJ(sd) Shutdown junction temperature 155 180 o Note 1 D38 TJ(h) Shutdown temperature hysteresis 20 30 o -12V < V(CANL, CANH) < +12V (Note 3) Note 1: 2: 3: C C This parameter is periodically sampled and not 100% tested. ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD. This is valid for the receiver in all modes; High-speed, Slope-control and Standby. DS21667F-page 10 © 2010 Microchip Technology Inc. MCP2551 FIGURE 2-1: TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS 0.1µF VDD CANH TXD VREF CAN Transceiver 60 Ω 100 pF RXD CANL 30 pF RS GND Rext Note: FIGURE 2-2: RS may be connected to VDD or GND via a load resistor depending on desired operating mode as described in Section 1.7.3 “Supply Voltage (VDD)”. TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS CANH TXD VREF CAN Transceiver 500 pF 60Ω Schaffner Generator RXD CANL 500 pF RS GND Note: Rext RS may be connected to VDD or GND via a load resistor depending on desired operating mode as described in Section 1.7.8 “Slope Resistor Input (Rs)”. The wave forms of the applied transients shall be in accordance with “ISO-7637, Part 1”, test pulses 1, 2, 3a and 3b. FIGURE 2-3: HYSTERESIS OF THE RECEIVER RXD (receive data output voltage) VOH VDIFF (r)(i) VDIFF (d)(i) VOL hysteresis D19 0.5 0.9 VDIFF (V) © 2010 Microchip Technology Inc. DS21667F-page 11 MCP2551 2.3 AC Characteristics Electrical Characteristics: Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V AC Specifications Param No. Sym 1 tBIT 2 fBIT 3 TtxL2bus(d) 4 5 6 TtxH2bus(r) TtxL2rx(d) TtxH2rx(r) Characteristic Min Max Units Bit time 1 62.5 µs VRS = 0V Bit frequency 16 1000 kHz VRS = 0V Delay TXD to bus active — 70 ns -40°C ≤ TAMB ≤ +125°C, VRS = 0V — 125 ns -40°C ≤ TAMB ≤ +85°C, VRS = 0V — 170 ns -40°C ≤ TAMB ≤ +125°C, VRS = 0V — 130 ns -40°C ≤ TAMB ≤ +125°C, VRS = 0V — 250 ns -40°C ≤ TAMB ≤ +125°C, RS = 47 kΩ — 175 ns -40°C ≤ TAMB ≤ +85°C, VRS = 0V — 225 ns -40°C ≤ TAMB ≤ +85°C, RS = 47 kΩ — 235 ns -40°C ≤ TAMB ≤ +125°C, VRS = 0V — 400 ns -40°C ≤ TAMB ≤ +125°C, RS = 47 kΩ CANH, CANL slew rate 5.5 8.5 V/µs Delay TXD to bus inactive Delay TXD to receive active Delay TXD to receiver inactive Conditions Refer to Figure 2-1; RS = 47 kΩ, (Note 1) 7 SR 10 tWAKE Wake-up time from standby (Rs pin) — 5 µs See Figure 2-5 11 TbusD2rx(s) Bus Dominant to RXD Low (Standby mode) — 550 ns VRS = +4V; (See Figure 2-6) 12 CIN(CANH) CIN(CANL) CANH; CANL input capacitance — 20 (typical) pF 1 Mb/s data rate; VTXD = VDD, (Note 1) 13 CDIFF Differential input capacitance — 10 (typical) pF 1 Mb/s data rate (Note 1) 14 TtxL2busZ TX Permanent Dominant Timer Disable Time 1.25 4 ms 15 TtxR2pdt(res) TX Permanent Dominant Timer Reset Time — 1 µs Rising edge on TXD while device is in permanent Dominant state Note 1: This parameter is periodically sampled and not 100% tested. DS21667F-page 12 © 2010 Microchip Technology Inc. MCP2551 2.4 Timing Diagrams and Specifications FIGURE 2-4: TIMING DIAGRAM FOR AC CHARACTERISTICS VDD TXD (transmit data input voltage) 0V VDIFF (CANH, CANL differential voltage) RXD (receive data output voltage) 0.5V 0.9V 0.7 VDD 0.3 VDD 3 4 5 6 FIGURE 2-5: TIMING DIAGRAM FOR WAKE-UP FROM STANDBY VRS Slope resistor input voltage VDD 0.6 VDD 0V VRXD Receive data output voltage 0.3 VDD 10 VTXD = 0.8V FIGURE 2-6: TIMING DIAGRAM FOR BUS DOMINANT TO RXD LOW (STANDBY MODE) 1.5V VDIFF, Differential voltage 0.9V 0V Receive data output voltage 0.3 VDD 11 VRS = 4V; VTXD = 2V © 2010 Microchip Technology Inc. DS21667F-page 13 MCP2551 NOTES: DS21667F-page 14 © 2010 Microchip Technology Inc. MCP2551 3.0 PACKAGING INFORMATION 3.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Legend: XX...X Y YY WW NNN e3 * Note: Example: MCP2551 3 I/P e^^256 1019 Example: MCP2551E 3 SN e^^1019 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2010 Microchip Technology Inc. DS21667F-page 15 MCP2551 3 &' !&"&4#*!(!!& 4%& &#& &&255***' '54 N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 6&! '! 9'&! 7"') %! 7,8. 7 7 7: ; < & & & = = ##44!! - 1!& & = = "#& "#>#& . - - ##4>#& . < : 9& -< -? & & 9 - 9#4!! < ) ? ) < 1 = = 69#>#& 9 *9#>#& : *+ 1, - !"#$%&"' ()"&'"!&) &#*&&&# +%&,&!& - '! !#.# &"#' #%! &"! ! #%! &"! !! &$#/!# '! #& .0 1,21!'! &$& "! **& "&& ! * ,<1 DS21667F-page 16 © 2010 Microchip Technology Inc. MCP2551 ! ""#$%& !' 3 &' !&"&4#*!(!!& 4%& &#& &&255***' '54 D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 L1 6&! '! 9'&! 7"') %! β 99.. 7 7 7: ; < & : 8& = 1, = ##44!! = = &# %%+ = : >#& . ##4>#& . -1, : 9& 1, ?1, ,'%@ & A = 3 &9& 9 = 3 && 9 .3 3 & I B = <B 9#4!! = 9#>#& ) - = #%& D B = B #%&1 && ' E B = B !"#$%&"' ()"&'"!&) &#*&&&# +%&,&!& - '! !#.# &"#' #%! &"! ! #%! &"! !! &$#''!# '! #& .0 1,2 1!'! &$& "! **& "&& ! .32 %'! ("!"*& "&& (% % '& " !! * ,1 © 2010 Microchip Technology Inc. DS21667F-page 17 MCP2551 ! ""#$%& !' 3 &' !&"&4#*!(!!& 4%& &#& &&255***' '54 DS21667F-page 18 © 2010 Microchip Technology Inc. MCP2551 APPENDIX A: REVISION HISTORY Revision F (July 2010) The following is the list of modifications: 1. Updates to the packaging diagrams. Revision E (January 2007) The following is the list of modifications: 1. Updates to the packaging diagrams. Revision D (October 2003) The following is the list of modifications: 1. Undocumented changes. Revision C (November 2002) The following is the list of modifications: 1. Undocumented changes. Revision B (June 2002) The following is the list of modifications: 1. Undocumented changes. Revision A (June 2001) • Original Release of this Document. © 2010 Microchip Technology Inc. DS21667F-page 19 MCP2551 NOTES: DS21667F-page 20 © 2010 Microchip Technology Inc. MCP2551 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX XXX Device Temperature Range Package Pattern Examples: a) b) Device: MCP2551: High-Speed CAN Transceiver MCP2551T: High-Speed CAN Transceiver (Tape and Reel) c) d) Temperature Range: I E Package: P SN = = -40°C to +85°C -40°C to +125°C = = © 2010 Microchip Technology Inc. Plastic DIP (300 mil Body) 8-lead Plastic SOIC (150 mil Body) 8-lead e) f) MCP2551-I/P: Industrial temperature, PDIP package. MCP2551-E/P: Extended temperature, PDIP package. MCP2551-I/SN: Industrial temperature, SOIC package. MCP2551T-I/SN: Tape and Reel, Industrial Temperature, SOIC package. MCP2551T-E/SN: Tape and Reel, Extended Temperature, SOIC package. MCP2551-E/SN: Extended Temperature, SOIC package. DS21667F-page 21 MCP2551 NOTES: DS21667F-page 22 © 2010 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. 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Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2010 Microchip Technology Inc. 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