Supertex inc. MD1715DB2 MD1715+TC8020 Demoboard High Speed ±100V 3.2A Pulser Features General Description Applications The demoboard consists of one MD1715 in a 6x6mm 40-lead QFN package driving 12 high voltage FETs in six TC8020s in one 8x8mm 56-lead QFN package. The CPLD programmable logic circuit 40MHz crystal oscillator generates accurate timing high-speed waveforms on a separate CPL board. There are multiple frequencie and waveform combinations that can be selected as bipolar pulse waveforms. External clock input can be used if the on board oscillator is disabled. The external trigger input can be used to synchronize the output waveforms. There are five push buttons for selecting the demo waveform, frequency, phase, mode selection functions. Color LEDs indicate the demo selection states. Jumpers on board for select the SMA connector to the external loads or the 220pF//1k on board dummy load. ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► Demo dual-transducer ultrasound transmitter MD1715 driving TC8020 with 12 MOSFETs 5-level voltage pulse waveforms outputs ±3.2 A source and sink current capability 100MHz frequency clock on board Programmable logic waveform generation JTAG connection for CPLD programming SMA connectors for external clock and signals 1.8 to 3.3V CMOS logic interface The MD1715DB2 demoboard can drive two transducers as a five-level, two channel transmitter for ultrasound and other applications. Medical ultrasound imaging Ultrasonic NDT detection Piezoelectric transducer drivers Capacitive and MEMS sensor driver Material flaw detection ATE and waveform generator Block Diagram +12V +12V +12V AVDD VDD1 MD1715 1 of 2 channels VDD2 TC8020 6 of 12 FETs VPP1 SP1 VDD2 OP1 GP1 DP1 ON1 GN1 DN1 VDD2 VNN1 SN1 High Speed Gate Buffers VLL/EN VPP2 SP2 VDD1 SEL POS NEG Control Logic and Level Translation OP2 GP2 ON2 GN2 DP2 VDD1 100Ω DN2 VNN2 SN2 High Speed Gate Buffers GND SP3 OP3 GP3 DP3 ON3 GN3 DN3 VSS VDD1 SN3 GND PAD AVSS -12V Doc.# DSDB-MD1715DB2 A032713 VSS -12V PAD VSUB -100V Supertex inc. www.supertex.com MD1715DB2 MD1715/+TC8020DB2 Schematic Block Diagram JTAG +3.3V +12V +5.0V +12V AVDD VDD2 VDD1 6 VLL/EN EXTRG SELA EXCLK 100MHz OSC EN POSA Waveform Generator CPLD NEGA SELB POSB NEGB CLK IN Logic Control and Level Translation J17/18 EXT 5 LED1 WAVE LED2 FREQ PWR SEL -12V ENA CLMP MOD ENAB AVSS (SUB) VSS AGND DGND MD1715 (1 of 2 I/O channels shown) MD1715+TC8020DB2 Demo Board PCB Layout Actual size: 100mm x 60mm Doc.# DSDB-MD1715DB2 A032713 2 Supertex inc. www.supertex.com MD1715DB2 Demo Waveforms (I) EN POS NEG SEL VPP1 HVOUT VNN1 Demo Waveforms (II) EN POS NEG SEL VPP1 VPP2 HVOUT VNN2 VNN1 Demo Waveforms (III) EN POS NEG SEL VPP1 HVOUT VNN1 Doc.# DSDB-MD1715DB2 A032713 VPP2 VNN2 3 Supertex inc. www.supertex.com 2 1 J4 EXTRG J6 SYNC J5 EXCLK EX=0 J1 2 3 2 3 2 3 2 1 1 1 1 R18 50 C26 0.22 VCC INV 4 2 R21 33k MH3 MH2 WAVE SW3 2 R24 33k 2 1 R13 1k 2 1 R14 1k 2 1 R13 1k U3 XC9572XL_VQ44 EXTRG SYNC 4 39 40 CLK R12 1k 4 FRE SW2 2 R23 33k R27 1k 43 TP13 TP12 TP11 TP24 TP14 SW1 R19 50 R16 50 3 4 R11 1k OUT VCC X1 40MHz GND EN C21 0.22 VCC 30 GND 4 35 2 29 INV_LED MH4 4 CHA 2 R25 33k SW4 25 GND CHB_LED 28 2 INV 3 FRE MH1 4 CHB SW5 2 R28 33k 5 WAVE 6 CHA 7 TP18 CHB 1 1 2 2 1 C24 0.22 NEGB POSB SELB NEGA POSA SELA J7 32 4 3 1 6 D15A D12B (+3.3V) VDD2 AVSS C31 0.22 J10 6 1 D12A D16A 1 6 D16B (+4.75 to +12.6V) 10 9 TP9 TP10 8 TP8 4 3 (+4.75 to +12.6V) VDD1 VDD2 (+4.75 to +12.6V) C20 0.22 R37 50 R35 50 R26 50 18 R38 50 3 TP7 31 2 TP6 R22 50 22 36 1 TP5 X C10 1nF R33 50 VCC R42 50 TP1 19 VDD1 AVDD D15B VDD2 4 3 TP4 R41 50 C22 0.22 (+4.75 to +12.6V) JTAG 3 GND 17 POWER 26 VCC 12 VCC 15 VCC D5 YLW 4 ICEN 13 CHA_LED 10 TMS 9 TDI 24 TDO 11 TCK 5 CHA 6 D6 RED 1 EN 2 D8 GRN 3 C6 0.22 4 PWR 4 D7 YLW NEGB POSB SELB NEGA POSA SELA 14 U1 MD1715 2 J11 C13 0.22 1 D10 B1100-13 2 VNN1 +/- 12 to 100 VPP1 & VNN1 D13 1 B1100-13 VPP1 C2 0.22 VDD2 C1 0.22 16 INV 5 5 18 VLL/EN AGND 6 13 GND D7 YLW 6 GND 25 AVDD GND 19 VDD1 GND 21 32 VDD1 38 VDD1 11 VDD1 35 GND 37 40 VDD2 AVSS 7 VDD2 AVSS 41 VDD2 GND 29 2 OP1A 22 24 20 15 17 12 30 27 31 36 34 39 3 4 2 1 C8 0.22 2 J12 1 C12A 4.7nF 1 D11 B1100-13 2 VNN2 +/- 12 to 100 VPP2 & VNN2 D14 VPP2 C19 0.22 1 B1100-13 AVSS 2 C12B 4.7nF C12C 4.7nF 6 4 C11D 4.7nF C12D 4.7nF 5 3 C11C 4.7nF C11B 4.7nF 7 C11A 4.7nF 8 C9 0.22 (Pin41 = VSUB = AVSS) ON3B OP3B ON2B OP2B ON1B OP1B ON3A OP3A ON2A OP2A ON1A VSS 23 VDD2 GND 33 3 VSS 26 CHB 2 8 7 5 6 3 6 9 12 17 19 21 23 25 X X X X X X X X X 11 10 13 15 14 16 4 5 2 56 1 55 PAD NC NC NC NC NC NC NC NC NC GN6 GP6 GN5 GP5 GN4 GP4 GN3 GP3 GN2 GP2 GN1 GP1 35 SP6 36 SP3 C3 0.22 100V 72 PAD 22 VSUB 49 VSUB VDD1 3 GND 28 1 U2 TC8020 C16 0.22 100V VNN2 R5 1.0 0.2W C15 0.22 100V C4 0.22 100V R1 1.0 0.2W VPP2 SN5 AVDD 1 SN3 7 26 SP5 45 SP2 SN6 8 SN2 4 18 VNN1 R6 1.0 0.2W C17 0.22 100V NC NC NC NC NC NC NC NC NC DN4 DP4 DN5 DP5 DN6 DP6 DN3 DP3 DN2 DP2 DN1 1 5 29 30 27 28 43 44 46 48 50 52 54 4 32 C18 0.22 100V X X X X X X X X X 2 4 2 5 1 5 1 4 2 C7 0.22 100V 31 34 33 38 37 40 39 42 41 C5 0.22 100V DP1 R2 1.0 0.2W VPP1 24 SP4 47 SP1 20 SN4 51 SN1 Doc.# DSDB-MD1715DB2 A032713 52 VCC R45 0 6 3 TP3 C34 220p 250V TP1 R4 200 R3 200 TP1 C33 220p 250V TP15 TP16 R47 0 D2 MMBD3004BRM D3 MMBD3004BRM 3 6 6 3 D1 MMBD3004BRM 2 3 2 3 R48 1k 1W 1 1 R46 1k 1W J9 J8 MD1715DB2 Schematic Diagram Supertex inc. www.supertex.com MD1715DB2 Operating Supply Voltages and Current Sym VCC/VCC2 Parameter Min Typ Max Units Suggested Current Limit* Logic Supply 1.8 3.3 3.3 V 150mA AVDD Positive Supply Voltage 5.0 10 12 V 10mA VDD1 Positive Drive Supply 5.0 10 12 V 50mA VDD2 Positive Drive Supply 5.0 5.0 12 V 25mA VPP1 TC8020 HV Positive Supply 0 - 100 V 5.0mA VNN1 TC8020 HV Negative Supply -100 - 0 V 5.0mA VPP2 TC8020 HV Positive Supply 0 - 100 V 5.0mA VNN2 TC8020 HV Negative Supply -100 - 0 V 5.0mA AVSS/VSS TC8020 HV Positive Supply 0 - -12 V 10mA VSUB TC8020 Thermal Pad - 0 - V --- GND Circuit Ground or 0V - 0 - V --- Note: * Current limits should change according the testing waveform, frequency and duty cycles. Push Button Descriptions Push Button Description INV Toggles between inverting or non-Inverting CHA Toggles between CHA on or off CHB Toggles between CHB on or off FRE Toggles between 0.3125MHz to 20MHz demo waveforms on Channel-A &B WAV Toggles between waveforms on Channel-A and B Note: CPLD output signals and push button names are aligned with MD1711 demo board. LED Descriptions LED Description PWR Indicates the CPLD board VCC power is connected, LED on = Power on ENA Indicates the MD1715 VLL/EN input is High/Low, LED on = CHA or CHB or both ON INV Indicates the inverting or non-inverting mode CHA Indicates channel-A on/off CHB Indicates channel-B on/off JTAG or Boundary Scan Mode JTAG or Boundary Scan mode is an industry standard (IEEE 1149.1, or 1532) serial programming mode. External logic from a cable, microprocessor, or other device is used to drive the JTAG specific pins: Test Data Out (TDO), Test Data Doc.# DSDB-MD1715DB2 A032713 In (TDI), Test Mode Select (TMS), and Test Clock (TCK). This mode has gained popularity due to its standardization and ability to program CPLD through the same four JTAG pins. The data in this mode is loaded at one bit per TCK. 5 Supertex inc. www.supertex.com MD1715DB2 Testing MD1715DB2 Ultrasound Pulser Power supply voltages and current limit settings to start the power-up sequence are listed above. Power-down is the reverse of the power-up sequence. Use a high-impendence oscilloscope probe for all on-board test points. There are two 5:1 voltage attenuators on-board (R6 and R16 are 200Ω) that are designed to connect the high voltage output J3 and J9 SMA connectors via a 50Ω coaxial cable to the oscilloscope (50Ω input) directly. If one needs to connect the J3 or J9 SMA connectors to a testing transducer with a coaxial cable of 50/75Ω, in order to prevent circuit damage due to long cable line reflection, a proper in-series resistor of 40 to 67Ω revise-termination should be considered on R6 or R16, with the impedance matching the cable and transducer load impedances. The TC8020’s output impedance is about 8.0Ω. It is important to have the protective Schottky diodes on the MD1715 and the TC8020 pulser circuit PCB on each voltage-rail, just like this demoboard. Only one set of diodes is required per board if multiple pulser channels are on the same PCB. The IC substrate of the MD1715 is internally connected to the AVSS pin. While powering up a multi-voltage rail CMOS chip, one must usually turn one of the substrate bias voltages first, in order to prevent CMOS latch-up. However, with the Schottky diodes on-board, specifically the D9, D12 and D15 diodes, the MD1715 is allowed to poweron the VCC +3.3V first, to establish the CPU and FPGA, etc. and get the digital circuit working first, then power-on the AVSS/DVSS, AVDD/DVDD and VPP/VNN, etc., with the inactive input logic known-state. If an external cable load is used, disconnect the on-board load (220pF // 1.0KΩ) by removing both jumpers on J2 or J8 (1-3) & (2-4), then place one jumper at J2 or J8 (1-2) position. Any overloaded outputs, including shorter pulse duty cycles, longer pulse durations or higher CW voltages (>12V) could damage the IC or MOSFETs. Use a ribbon cable to connect the input logic signal connector, J13. Ground pins 3, 5-23 of J13 on the digital logic DGND of the signal generator side. Logic supply voltage VCC must equal the VLL of MD1715. It is usually 1.8, 2.5 or 3.3V DC. Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSDB-MD1715DB2 A032713 6 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com