INTERSIL ISL95835

 ISL95833
Print Page
Dual 2+1 PWM Controller for IMVP-7/VR12 CPUs
Features Description
Technical Documentation
Pricing / Samples
iSim Design Simulation
Tools And Support
Related Devices
Datasheet
ISL95833
Dual 2+1 PWM Controller for IMVP-7/VR12 CPUs
VIN (min) (V)
4.75
VIN (max) (V)
5.25
VOUT (min) (V)
.25
VOUT (max) (V)
1.52
IOUT (max) (A)
60
VBIAS (V)
5
Applications
VR12/IMVP7
Max # of outputs
2
Max # of phases
2
Droop
Y
Integrated MOSFET Driver
Y
Product Information
Key Features
Serial Data Bus
Dual Outputs:
Configurable 2- or 1-phase for the 1st Output
using one Integrated Gate Driver
1-phase for the 2nd Output using an Integrated Gate Driver
R3 Modulator
Excellent Transient Response
High Light Load Efficiency
0.5% System Accuracy Over-Temperature
Supports Multiple Current Sensing Methods
Lossless Inductor DCR Current Sensing
Precision Resistor Current Sensing
Differential Remote Voltage Sensing
Programmable VBOOT Voltage at Start-up
Resistor Programmable IMAX, Switching Frequency for Both Outputs
Adaptive Body Diode Conduction Time Reduction
Description
The ISL95833 Pulse Width Modulation (PWM) controller IC provides a complete solution for IMVP-7/VR12™ compliant
microprocessor and graphic processor core power supplies. It provides the control and protection for two Voltage
Regulators (VRs). The first VR, typically for VCORE, incorporates 1 integrated driver and can operate in 2- or 1-phase
configurations. The second VR, typically for Graphics, is a single phase regulator incorporating an integrated driver. The
two VRs share a serial control bus to communicate with the CPU and achieve lower cost and smaller board area
compared with the two-chip approach.
Both VRs utilize Intersil's Robust Ripple Regulator R3 Technology™. The R3 modulator has numerous advantages
compared to traditional modulators, including faster transient response, variable switching frequency during load
transients, and improved light load efficiency due to its ability to automatically change switching frequency.
The ISL95833 has several other key features. Both outputs support either DCR current sensing with a single NTC
thermistor for DCR temperature compensation, or more precise resistor current sensing if desired. Both outputs come
with remote voltage sense, programmable VBOOT voltage, IMAX, and switching frequency, adjustable overcurrent
protection and separate Power-Good signals.
Pricing / Packaging / Samples / Ordering
iBuy direct from Intersil
Check
distributor inventory
iBuy direct - out of stock
Available in RoHS/Pb-Free
Request samples
Design-In
Status
Temp.
Package
MSL
ISL95833HRTZ
Active
Hi-Temp Comm
32 Ld TQFN
3
ISL95833HRTZ-T
Active
Hi-Temp Comm
32 Ld TQFN T+R
3
ISL95833IRTZ
Active
Ind
32 Ld TQFN
3
ISL95833IRTZ-T
Active
Ind
32 Ld TQFN T+R
3
Part No.
Price
US $
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices
in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
Technical Documentation
Datasheet(s):
Dual 2+1 PWM Controller for IMVP-7/VR12 CPUs
Tools And Support
iSim Design Simulation
No Models Available
Applications
IMVP-7/VR12 Compliant Computers
Related Devices
Parametric Table
ISL6353
Multiphase PWM Regulator for VR12 DDR Memory Systems
ISL6363
Multiphase PWM Regulator for VR12™ Desktop CPUs
ISL6364
Dual 4-Phase + 1-Phase PWM Controller for VR12/IMVP7 Applications
ISL6364C Dual 4-Phase + 1-Phase PWM Controller for VR12 Desktop Applications ISL6366
Dual 6-Phase + 1-Phase PWM Controller for VR12/IMVP7 Applications
ISL95831 3+1 Voltage Regulator for IMVP-7/VR12™ CPUs
ISL95835 3+1 and 1+1 Voltage Regulator for IMVP-7/VR12™ CPUs
ISL95836 Dual 3+2 PWM Controller for IMVP-7/VR12™ CPUs
ISL95837 3+1 and 1+1 Voltage Regulator for IMVP-7/VR12™ CPUs
About Us | Careers | Contact Us | Investors | Legal | Privacy | Site Map | Subscribe | Intranet
©2003-2011. Intersil Americas Inc. All rights reserved.
http://www.intersil.com/products/print.asp?id=ISL95833[3/9/2012 9:51:08 AM]