Automotive Single Supply, SPDT Analog Switch ISL76123 Features The Intersil ISL76123 device is a small precision, bidirectional, single-pole/double throw (SPDT) analog switch, designed to operate from a single +2.7V to +12V supply. The device is supplied in a 6 Ld SOT-23 package. Targeted applications include automotive battery powered systems that can benefit from the device’s low power consumption (5µW), low leakage currents (3nA max), and fast switching speeds (tON = 28ns, tOFF = 20ns). This device will often find use in infotainment systems to “mux - in” additional functions to GPIO pins on SOCs. The device ensures the switching function is always break-before-make to help eliminate transient signal problems. Its small package size alleviates board space limitations. The part has been qualified for use in automotive applications over an operating temperature range of -40°C to +105°C. • Fully specified at 12V, 5V, and 3.3V supplies for 10% tolerances TABLE 1. FEATURES AT A GLANCE ISL76123 • ON-resistance (rON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Ω • rON matching between channels . . . . . . . . . . . . . . . . . . . . . . . <1Ω • Low charge injection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max) • Single supply operation . . . . . . . . . . . . . . . . . . . . . . +2.7V to +12V • Low power consumption (PD) . . . . . . . . . . . . . . . . . . . . . . . . <5µW • Low leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10nA • Fast switching action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns • Guaranteed break-before-make switching • Minimum 2000V ESD protection • TTL, CMOS compatible SW 1/SW 2 SPDT or 2x1 MUX 3.3V rON 42Ω 3.3V tON/tOFF 40ns/20ns 5V rON 23Ω 5V tON/tOFF 28ns/20ns 12V rON 15Ω 12V tON/tOFF 25ns/17ns • General signal “mux - in” (where GPIO lines may be constrained) Package 6 Ld SOT-23 • Various building block control applications • Available in 6 Ld SOT-23 package • Pb-free (RoHS compliant) • AEC-Q100 qualified Applications • Audio and video switching - Filters - Signal conditioning - Integration reset circuits September 28, 2012 FN8297.1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL76123 Pin Configuration (Note) ISL76123 (6 LD SOT-23) TOP VIEW IN 1 6 NO V+ 2 5 COM GND 3 4 NC NOTE: Switch Shown for Logic “0” Input. Truth Table Ordering Information ISL76123 LOGIC PIN NC PIN NO PART NUMBER (Notes 1, 2, 3) 0 ON OFF ISL76123AHZ-T 1 OFF ON PART MARKING (Note 4) 123A TEMP. RANGE (°C) PACKAGE (Pb-free) -40 to +105 6 Ld SOT-23 Tape and Reel PKG. DWG. # P6.064 NOTES: NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V. 1. Please refer to TB347 for details on reel specifications. Pin Descriptions PIN NAME PIN NUMBER V+ 2 System Power Supply Input (+2.7V to +12V) GND 3 Ground Connection IN 1 Digital Control Input COM 5 Analog Switch Common Pin NO 6 Analog Switch Normally Open Pin NC 4 Analog Switch Normally Closed Pin FUNCTION 2 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL76123. For more information on MSL please see tech brief TB363. 4. The part marking is located on the bottom of the part. FN8297.1 September 28, 2012 ISL76123 Absolute Maximum Ratings Thermal Information V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V Input Voltages IN (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) NO, NC (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . . . . . . . . 40mA ESD Rating Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 100V Charged Device Model (Tested per JESD22-C101). . . . . . . . . . . . . . . 1kV Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 6 Ld SOT-23 Package (Notes 6, 7) . . . . . . . 175 95 Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C Maximum Storage Temperature Range. . . . . . . . . . . . . . . . . -65°C to +150°C Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 6. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 7. For θJC, the “case temp” location is taken at the package top center. Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 9, 10) TYP MAX (Notes 9, 10) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Full 0 - V+ V +25 - 23 34 Ω Full - 25 40 Ω +25 - 0.8 2 Ω Full - 1 4 Ω V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V (Note 11) Full - 7 8 Ω V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V (Figure 5) ON-Resistance, rON rON Matching Between Channels, ΔrON rON Flatness, RFLAT(ON) V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V NO or NC OFF Leakage Current, INO(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V or INC(OFF) +25 -3 0.01 3 nA Full -5 - 5 nA COM OFF Leakage Current, ICOM(OFF) +25 -3 - 3 nA Full -5 - 5 nA V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V or Floating +25 -5 - 5 nA Full -10 - 10 nA VNO or VNC = 3V, RL = 1kΩ, CL = 35pF, VIN = 0V to 3V (See Figure 1) +25 - 28 - ns Full - 40 - ns VNO or VNC = 3V, RL = 1kΩ, CL = 35pF, VIN = 0V to 3V (See Figure 1) +25 - 20 - ns Full - 30 - ns Break-Before-Make Time Delay, tD RL = 300Ω, CL = 35pF, VNO = VNC = 3V, VIN = 0V to 3V (See Figure 3) Full - 10 - ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) +25 - 3 - pC OFF Isolation RL = 50Ω, CL = 5pF, f = 1MHz (See Figure 4) +25 - 76 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz +25 - 60 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) +25 - 8 - pF COM ON Leakage Current, ICOM(ON) V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF 3 FN8297.1 September 28, 2012 ISL76123 Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. (Continued) PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 9, 10) MAX (Notes 9, 10) UNITS TYP COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) +25 - 8 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) +25 - 28 - pF Full 2.7 - 12 V Full -1 0.0001 1 µA POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 5.5V, VIN = 0V or V+, all channels on or off DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Full - - 0.8 V Input Voltage High, VINH Full 2.4 - - V Full -1 - 1 µA Input Current, IINH, IINL V+ = 5.5V, VIN = 0V or V+ Electrical Specifications - 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. PARAMETER TEST CONDITIONS TEMP (°C) MIN (Notes 9, 10) TYP MAX (Notes 9, 10) UNITS Full 0 - V+ V +25 - 42 60 Ω Full - 45 70 Ω +25 - 0.8 2 Ω Full - 1 4 Ω +25 - 6 10 Ω ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V ON-Resistance, rON rON Matching Between Channels, ΔrON rON Flatness, RFLAT(ON) V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 1.5V V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 1.5V Full - 7 12 Ω NO or NC OFF Leakage Current, INO(OFF) or V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V INC(OFF) +25 -3 0.01 3 nA Full -5 - 5 nA V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V +25 -3 0.01 3 nA Full -5 - 5 nA V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V or floating +25 -5 - 5 nA Full -10 - 10 nA VNO or VNC = 1.5V, RL = 1kΩ, CL = 35pF, VIN = 0V to 3V +25 - 40 - ns Full - 60 - ns VNO or VNC = 1.5V, RL = 1kΩ, CL = 35pF, VIN = 0V to 3V +25 - 20 - ns Full - 30 - ns Break-Before-Make Time Delay, tD RL = 300Ω, CL = 35pF, VNO or VNC = 1.5V, VIN = 0V to 3V Full - 20 - ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω +25 - 1 - pC OFF Isolation RL = 50Ω , CL = 5pF, f = 1MHz +25 - 76 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz +25 - 56 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V +25 - 8 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V +25 - 8 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (Figure 7) +25 - 28 - pF COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF 4 FN8297.1 September 28, 2012 ISL76123 Electrical Specifications - 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. (Continued) TEMP (°C) MIN (Notes 9, 10) TYP Full -1 - 1 µA Input Voltage Low, VINL Full - - 0.8 V Input Voltage High, VINH Full 2.4 - - V Full -1 - 1 µA PARAMETER TEST CONDITIONS MAX (Notes 9, 10) UNITS POWER SUPPLY CHARACTERISTICS V+ = 3.6V, VIN = 0V or V+, all channels on or off Positive Supply Current, I+ DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL V+ = 3.6V, VIN = 0V or V+ Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 9, 10) MAX TYP (Notes 9, 10) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Full 0 - V+ V +25 - 15 23 Ω Full - 16 25 Ω +25 - 0.8 2 Ω Full - 1 4 Ω +25 - 1 4 Ω Full - - 6 Ω NO or NC OFF Leakage Current, INO(OFF) or V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V INC(OFF) +25 -3 0.01 3 nA Full -5 - 5 nA COM OFF Leakage Current, ICOM(OFF) +25 -3 0.01 3 nA Full -5 - 5 nA V+ = 13V, VCOM = 1V, 12V, or VNO or VNC = 1V, 12V or floating +25 -5 - 5 nA Full -12 - 12 nA VNO or VNC = 10V, RL = 1kΩ, CL = 35pF, VIN = 0V to 4V +25 - 25 - ns Full - 35 - ns +25 - 17 - ns Full - 26 - ns ON-Resistance, rON V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 10V rON Matching Between Channels, ΔrON rON Flatness, RFLAT(ON) V+ = 12V, ICOM = 1.0mA, VNO or VNC = 10V V+ = 12V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V (Note 11) COM ON Leakage Current, ICOM(ON) V+ = 13V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF VNO or VNC = 10V, RL = 1kΩ, CL = 35pF, VIN = 0V to 4V Break-Before-Make Time Delay, tD RL = 300Ω, CL = 35pF, VNO or VNC = 10V, VIN = 0V to 4V Full - 2 - ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω +25 - 5 - pC OFF Isolation RL = 50Ω, CL = 5pF, f = 1MHz +25 - 76 - dB Crosstalk (Channel-to-Channel) RL = 50Ω, CL = 5pF, f = 1MHz +25 - -105 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz +25 - 63 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V +25 - 8 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V +25 - 8 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (Figure 7) +25 - 28 - pF V+ = 13V, VIN = 0V or V+, all channels on or off Full -1 - 1 µA POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ 5 FN8297.1 September 28, 2012 ISL76123 Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +105°C. (Continued) PARAMETER TEMP MIN (°C) (Notes 9, 10) TEST CONDITIONS MAX TYP (Notes 9, 10) UNITS DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Full - - 0.8 V Input Voltage High, VINH Full 4 - - V Full -1 - 1 µA Input Current, IINH, IINL V+ = 13V, VIN = 0V or V+ NOTES: 8. VIN = input voltage to perform proper function. 9. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 11. Limits established by characterization and are not production tested. Test Circuits and Waveforms 3V OR 4V LOGIC INPUT V+ tr < 20ns tf < 20ns 50% 0V tOFF SWITCH V INPUT NO SWITCH INPUT VOUT NO OR NC COM IN VOUT 90% SWITCH OUTPUT C 90% LOGIC INPUT CL 35pF RL 1kΩ GND 0V tON Logic input waveform is inverted for switches that have the opposite logic sense. Repeat test for all switches. CL includes fixture and stray capacitance. RL ----------------------V OUT = V (NO or NC) R + r FIGURE 1A. MEASUREMENT POINTS FIGURE 1B. TEST CIRCUIT L ON FIGURE 1. SWITCHING TIMES V+ SWITCH OUTPUT VOUT RG ΔVOUT V+ LOGIC INPUT ON ON OFF VG NO OR NC GND C VOUT COM IN CL 0V LOGIC INPUT Q = ΔVOUT x CL FIGURE 2B. TEST CIRCUIT FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION 6 FN8297.1 September 28, 2012 ISL76123 Test Circuits and Waveforms (Continued) V+ 3V OR 4V LOGIC INPUT 0V C NO VNX VOUT COM NC CL 35pF RL 300Ω IN 90% SWITCH OUTPUT VOUT GND LOGIC INPUT 0V tD CL includes fixture and stray capacitance. FIGURE 3B. TEST CIRCUIT FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME V+ V+ C C rON = V1/1mA SIGNAL GENERATOR NO OR NC NO OR NC VNX INX 0V OR VINH 1mA COM COM ANALYZER 0.8V OR VINH IN V1 GND GND RL FIGURE 5. rON TEST CIRCUIT FIGURE 4. OFF ISOLATION TEST CIRCUIT V+ C V+ C SIGNAL GENERATOR NO1 OR NC1 COM1 50Ω NO OR NC IN1 COM2 ANALYZER INX IN2 0V OR VINH 0V OR 2.4V NO2 OR NC2 GND 0V OR VINH IMPEDANCE ANALYZER COM NC GND RL FIGURE 6. CROSSTALK TEST CIRCUIT 7 FIGURE 7. CAPACITANCE TEST CIRCUIT FN8297.1 September 28, 2012 ISL76123 Detailed Description The ISL76123 bidirectional, single SPDT analog switch offers precise switching capability from a single 2.7V to 12V supply with low ON-resistance (23Ω) and high speed operation (tON = 28ns, tOFF = 20ns). The device is especially well suited to automotive battery powered systems thanks to the low operating supply voltage (2.7V), low power consumption (5µW), low leakage currents (3nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation rejection. Supply Sequencing and Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and GND (see Figure 8). To prevent forward biasing these diodes, V+ must be applied before any input signals, and input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. The minimum recommended supply voltage is 2.7V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the “Electrical Specification” tables beginning on page 3 and “Typical Performance Curves” beginning on page 9 for details. V+ and GND also power the internal logic and level shifter. The level shifter convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. This device cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. Logic-Level Thresholds This switch is TTL compatible (0.8V and 2.4V) over a supply range of 3V to 11V (see Figure 15). At 12V the VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. High-Frequency Performance Adding a series resistor to the switch input defeats the purpose of using a low rON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch’s input to its output. Off isolation is the resistance to this feedthrough. Figure 17 details the high off isolation rejection provided by this part. At 10MHz, off isolation is about 50dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease off isolation rejection due to the voltage divider action of the switch OFF impedance and the load impedance. OPTIONAL PROTECTION DIODE Leakage Considerations V+ OPTIONAL PROTECTION RESISTOR INX VNO OR NC VCOM GND OPTIONAL PROTECTION DIODE FIGURE 8. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL76123 construction is typical of most CMOS analog switches, except that they have only two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 13V maximum supply voltage, the ISL76123 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies, as well as room for overshoot and noise spikes. 8 In 50Ω systems, signal response is reasonably flat even past 300MHz (see Figure 16). Figure 16 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of these diodes conducts if any analog signal exceeds V+ or GND. Virtually all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and V+ or GND. FN8297.1 September 28, 2012 ISL76123 Typical Performance Curves TA = +25°C, Unless Otherwise Specified. 40 45 40 35 35 V+ = 3.3V 30 30 +85°C 20 25 rON (Ω) rON (Ω) +85°C +25°C 25 20 +25°C 15 -40°C 10 -40°C 15 30 25 20 15 10 20 15 V+ = 5V +85°C +25°C -40°C +85°C V+ = 12V +25°C 10 5 -40°C 0 5 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE 0.50 0.40 0.30 +25°C 10 12 50 40 +85°C -40°C 30 V+ = 5V +25°C 0.10 Q (pC) DrON (Ω) 8 60 0.20 +85°C 20 V+ = 5V V+ = 12V 10 +85°C 0.05 0 0.15 V+ = 3.3V -40°C 0 V+ = 12V +25°C 0.10 -40°C 0.05 0 6 VCOM (V) FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE V+ = 3.3V 0.10 0 0.25 0.20 0.15 4 2 -10 +85°C +25°C -40°C 2 0 4 6 8 VCOM (V) 10 -20 2 0 12 4 6 8 10 12 VCOM (V) FIGURE 11. rON MATCH vs SWITCH VOLTAGE FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE 100 35 90 80 30 +85°C tOFF (ns) tON (ns) 70 60 +85°C 25 50 -40°C -40°C 40 20 -40°C +25°C 30 20 +25°C 2 3 4 5 6 7 V+ (V) 8 9 10 FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE 9 11 12 15 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE FN8297.1 September 28, 2012 ISL76123 Typical Performance Curves TA = +25°C, Unless Otherwise Specified. (Continued) 2.5 VINH AND VINL (V) VINH -40°C 2.0 +85°C +25°C 1.5 +85°C V+ = 3.3V TO 12V 0 GAIN -3 -6 0 PHASE 20 40 -40°C 60 +25°C 1.0 RL = 50Ω VIN = 0.2VP-P TO 2.5VP-P (V+ = 3.3V) VIN = 0.2VP-P TO 4VP-P (V+ = 5V) VIN = 0.2VP-P TO 5VP-P (V+ = 12V) VINL +85°C 0.5 2 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 1 RL = 50Ω V+ = 3V TO 13V 0 30 10 40 20 50 30 V+ = 3.3V, SWITCH OFF 60 ±PSRR (dB) OFF ISOLATION (dB) 600 FIGURE 16. FREQUENCY RESPONSE 20 ISOLATION 70 90 70 100 80 100k 1M 10M FREQUENCY (Hz) FIGURE 17. OFF ISOLATION 10 100M 500M V+ = 12V, SWITCH ON 50 60 10k V+ = 12V, SWITCH OFF 40 80 110 1k 100 10 100 FREQUENCY (MHz) FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE 10 80 PHASE (°) NORMALIZED GAIN (dB) 3.0 0.3 V+ = 3.3V, SWITCH ON 1 10 100 1000 FREQUENCY (MHz) FIGURE 18. ±PSRR vs FREQUENCY FN8297.1 September 28, 2012 ISL76123 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION September 28, 2012 FN8297.1 CHANGE Initial Release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective product information page. Also, please check the product information page to ensure that you have the most updated datasheet: ISL76123 To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 FN8297.1 September 28, 2012 ISL76123 Package Outline Drawing P6.064 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 4, 2/10 0-8° 1.90 0.95 0.08-0.22 D A 6 5 4 2.80 PIN 1 INDEX AREA 1.60 +0.15/-0.10 3 3 (0.60) 1 2 3 0.20 C 2x 0.40 ±0.10 B SEE DETAIL X 3 0.20 M C A-B D END VIEW TOP VIEW 10° TYP (2 PLCS) 2.90 ±0.10 3 1.15 +0.15/-0.25 C 0.10 C SEATING PLANE 0.00-0.15 SIDE VIEW (0.25) GAUGE PLANE 1.45 MAX DETAIL "X" 0.45±0.1 4 (0.95) (0.60) (1.20) (2.40) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to gauge plane. 5. Package conforms to JEDEC MO-178AB. TYPICAL RECOMMENDED LAND PATTERN 12 FN8297.1 September 28, 2012