2916 Dual Full-Bridge PWM Motor Driver Discontinued Product This device is no longer in production. The device should not be purchased for new design applications. Samples are no longer available. Date of status change: January 30, 2012 Recommended Substitutions: For existing customer transition, and for new customers or new applications, refer to the A4970. NOTE: For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative. Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 2916 Dual Full-Bridge PWM Motor Driver Features and Benefits Description ▪ 750 mA continuous output current ▪ 45 V output sustaining voltage ▪ Internal clamp diodes ▪ Internal PWM current control ▪ Low output saturation voltage ▪ Internal thermal shutdown circuitry ▪ Similar to dual PBL3717 or UC3770 The UDx2916 motor drivers drive both windings of a bipolar stepper motor or bidirectionally control two DC motors. Both bridges are capable of sustaining 45 V and include internal pulse-width modulation (PWM) control of the output current to 750 mA. The outputs have been optimized for a low output saturation voltage drop (less than 1.8 V total source plus sink at 500 mA). For PWM current control, the maximum output current is determined by user selection of a reference voltage and sensing resistor. Two logic-level inputs select output current limits of 0%, 33%, 67%, or 100% of the maximum level. A PHASE input to each bridge determines load current direction. Packages Package B 24-pin Batwing DIP The bridges include both ground-clamp and flyback diodes for protection against inductive transients. Internally generated delays prevent crossover currents when switching current direction. Special power-up sequencing is not required. Thermal protection circuitry disables the outputs if the chip temperature exceeds safe operating limits. Package LB 24-pin Batwing SOICW The device is supplied in a 24-pin dual in-line plastic (DIP, package B) with two pairs of batwing leads as heat-sinkable tabs for enhanced power dissipation capabilities. The LB package is a 24-lead surface-mount wide SOIC with two pairs Package EB 44-pin PLCC with internally-fused leads Continued on the next page… Not to scale PWM Current-Control Circuitry VBB 'B' PACKAGE, CHANNEL 1 PIN NUMBERS SHOWN. 24 OUT B 1 21 OUT A V REF 15 23 20 k7 w10 40 k7 I 0 20 I 1 17 E SENSE – 22 ONE SHOT + RC 10 k7 RS 14 C C R T SOURCE DISABLE RC C T Dwg. EP-007B 29319.20R 2916 Dual Full-Bridge Motor Driver Description (continued) of batwing leads. The EB package is a 44-lead power PLCC with 11 internally-fused leads on two sides. Their webbed-lead construction provides for maximum package power dissipation in the smallest possible construction. The devices are available for operation from –20°C to 85°C (range N), and from –40°C to 105°C (range Q). All packages are lead (Pb) free, with 100% matte tin leadframe plating. Selection Guide Part Number Package Ambient Temperature (°C) Packing UDN2916B-T1 24-pin batwing DIP UDN2916EBTR-T1 44-pin internally fused lead PLCC 450 per reel UDN2916LBTR-T2 24-pin batwing SOICW 1000 per reel UDQ2916LBTR-T2 24-pin batwing SOICW 1000 per reel 15 per tube –20 to 85 –40 to 105 1This variant is in production, however, it has been deemed Pre-End of Life. The product is approaching end of life. Within a minimum of 6 months, the device will enter its final, Last Time Buy, order phase. Status change: November 1, 2010. 2This variant is in production, however, it has been deemed Pre-End of Life. The product is approaching end of life. Within a minimum of 6 months, the device will enter its final, Last Time Buy, order phase. Status change: January 31, 2011. Absolute Maximum Ratings Characteristic Symbol Rating Units 45 V VCC 7.0 V VIN –0.3 to VCC + 0.3 V VE 1.5 V 1.0 A 750 mA Motor Supply Voltage VBB Logic Supply Voltage Input Voltage Output Emitter Voltage Notes Peak Output Current* IOUT Continuous Package Power Dissipation PD See graph Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or TJ(max) — W Range N –20 to 85 ºC Range Q –40 to 105 ºC Operating Ambient Temperature TA Maximum Junction Temperature TJ(max) 150 ºC Tstg –55 to 150 ºC Storage Temperature Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 2 2916 Dual Full-Bridge Motor Driver 39 7 PWM 1 37 VBB 1 10 36 11 35 12 34 13 33 2 14 32 31 15 16 17 29 SUFFIX 'B', R 2 SUFFIX 'LB', R θJA = 55°C/W* 1 26 27 28 V REF 2 RC 2 25 50 75 100 TEMPERATURE IN °C 1 B Package (DIP) 24 LOAD SUPPLY 23 OUT 2B 22 SENSE 2 OUT 1A 1 OUT 2A 2 2 PHASE 2 3 V REF 2 4 21 E2 RC 2 5 20 OUT 2A GROUND 6 19 GROUND GROUND 7 18 GROUND LOGIC SUPPLY 8 17 OUT 1A I RC 1 99 16 E1 I 12 99 V REF 1 10 15 SENSE 1 P HAS E 2 10 PHASE 1 11 14 OUT 1B V REF 2 11 I 11 12 13 I 01 RC 2 12 VBB 2 V CC E2 PWM 1 1 Q1 150 *Measured on a single-layer board, with 1 sq. in. of 2 oz copper area. For additional information, refer to the Allegro Web site. I 12 Q2 125 Dwg. GP-035B Dwg. PP-006A PWM 2 02 = 40°C/W 3 LB Package (SOIC) I θJA 0 PHASE 2 I12 25 I02 24 OUT 2B 23 21 SENSE 2 SUFFIX 'EB', RθJA = 30°C/W GND Q2 NC E2 20 OUT 2A 18 NO CONNECTION 19 NC NO CONNECTION 22 GND 30 PWM 2 4 VBB 1 3 2 24 LOAD S UP P LY 23 E1 22 S E NS E 1 21 OUT 1B S E NS E 2 4 OUT 2B 5 20 I 01 G R OUND 6 19 G R OUND G R OUND 7 18 G R OUND 8 17 I 11 16 P HAS E 1 15 V REF 1 14 RC 1 13 LOG IC S UP P LY 02 θ2 P WM 1 9 38 R θJT = 6.0°C/W P WM 2 8 GND ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS RC1 41 LOGIC SUPPLY VREF 1 42 VCC Q1 GND 5 40 I11 I01 1 PHASE 1 LOAD SUPPLY 2 43 OUT 1B 3 Power Dissipation 44 SENSE 1 4 1 OUT 1A E 6 5 EB Package (PLCC) θ1 V CC Dwg. P P -005 Dwg. PP-047 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 3 2916 Dual Full-Bridge Motor Driver ELECTRICAL CHARACTERISTICS at TA = +25°C, TJ ≤ 150°C, VBB = 45 V, VCC = 4.75 V to 5.25 V, VREF = 5.0 V (unless otherwise noted). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units 10 — 45 V VOUT = VBB — < 1.0 50 μA VOUT = 0 — <–1.0 –50 μA Output Drivers (OUTA or OUTB) Motor Supply Range VBB Output Leakage Current ICEX Output Sustaining Voltage VCE(sus) IOUT = ±750 mA, L = 3.0 mH 45 — — V Output Saturation Voltage VCE(SAT) Sink Driver, IOUT = +500 mA — 0.4 0.6 V Sink Driver, IOUT = +750 mA — 1.0 1.2 V Source Driver, IOUT = –500 mA — 1.0 1.2 V Source Driver, IOUT = –750 mA — 1.3 1.5 V Clamp Diode Leakage Current IR VR = 45 V — < 1.0 50 μA Clamp Diode Forward Voltage VF IF = 750 mA — 1.6 2.0 V IBB(ON) Both Bridges ON, No Load — 20 25 mA IBB(OFF) Both Bridges OFF — 5.0 10 mA VIN(1) All inputs 2.4 — — V VIN(0) All inputs — — 0.8 V IIN(1) VIN = 2.4 V — <1.0 20 μA VIN = 0.8 V — – 3.0 –200 μA Operating 1.5 — 7.5 V I0 = I1 = 0.8 V 9.5 10 10.5 — I0 = 2.4 V, I1 = 0.8 V 13.5 15 16.5 — I0 = 0.8 V, I1 = 2.4 V 25.5 30 34.5 — — 170 — °C Driver Supply Current Control Logic Input Voltage Input Current Reference Voltage Range VREF Current Limit Threshold (at trip point) VREF / VSENSE Thermal Shutdown Temperature Total Logic Supply Current Fixed Off-Time TJ ICC(ON) I0 = I1 = 0.8 V, No Load — 40 50 mA ICC(OFF) I0 = I1 = 2.4 V, No Load — 10 12 mA RT = 56 kΩ, CT = 820 pF — 46 — μs toff Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 4 2916 Dual Full-Bridge Motor Driver APPLICATIONS INFORMATION PWM CURRENT CONTROL PWM OUTPUT CURRENT WAVE FORM The UDx2916 dual bridges drive both windings of a bipolar stepper motor. Output current is sensed and controlled independently in each bridge by an external sense resistor, RS , internal comparator, and monostable multivibrator. When the bridge is turned on, current increases in the motor winding and it is sensed by the external sense resistor until the sense voltage, VSENSE , reaches the level set at the comparator input: ITRIP = VREF/10 RS V P HAS E + I OUT 0 – The comparator then triggers the monostable, which turns off the source driver of the bridge. I T R IP The actual load current peak will be slightly higher than the trip point (especially for low-inductance loads) because of the internal logic and switching delays. This delay, td , is typically 2 μs. After turn-off, the motor current decays, circulating through the ground-clamp diode and sink transistor. The source driver off-time (and therefore the magnitude of the current decrease) is determined by the external RC timing components of the monostable: toff = RTCT where: td toff Dwg. WM-003-1A LOAD CURRENT PATHS RT = 20 to 100 kΩ, and CT = 100 to 1000 pF. V BB The fixed off-time should be short enough to keep the current chopping above the audible range (< 46 μs) and long enough to properly regulate the current. Because only slow-decay current control is available, short off times (< 10 μs) require additional efforts to ensure proper current regulation. Factors that can negatively affect the ability to properly regulate the current when using short off times include: higher motorsupply voltage, light load, and longer than necessary blank time. When the source driver is re-enabled, the winding current (the sense voltage) is again allowed to rise to the comparator’s threshold. This cycle repeats itself, maintaining the average motor winding current at the desired level. Loads with high distributed capacitances may result in high turn-on current peaks. This peak (appearing across RS) will attempt to trip the comparator, resulting in erroneous current control or high-frequency oscillations. An external RCCC time delay should be used to further delay the action of the comparator. Depending on load type, many applications will not require these external components (SENSE connected to E). RS B R IDG E ON S OUR C E OF F ALL OF F Dwg. E P -006-1 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 5 2916 Dual Full-Bridge Motor Driver LOGIC CONTROL OF OUTPUT CURRENT Two logic level inputs (I0 and I1) allow digital selection of the motor winding current at 100%, 67%, 33%, or 0% of the maximum level per the table. The 0% output current condition turns off all drivers in the bridge and can be used as an OUTPUT ENABLE function. CURRENT-CONTROL TRUTH TABLE l0 I1 Output Current L L VREF/10 RS = ITRIP H L VREF/15 RS = 2/3 ITRIP L H VREF/30 RS = 1/3 ITRIP H H 0 GENERAL These logic level inputs greatly enhance the implementation of microprocessor controlled drive formats. During half-step operations, the I0 and I1 allow the microprocessor to control the motor at a constant torque between all positions in an eight-step se- TYPICAL APPLICATION STEPPER MOTOR V BB VBB 1 24 RS RC FROM μP 5 20 6 19 7 18 8 17 56 kΩ RT θ2 PWM 2 10 REF CC 21 C 99 V 22 2 4 PWM 1 C RC 1 3 + RS 23 2 θ1 12 820 pF CT FROM μP TRUTH TABLE V REF 14 820 pF VCC The PHASE input to each bridge determines the direction motor winding current flows. An internally generated dead time (approximately 2 μs) prevents crossover currents that can occur when switching the PHASE input. All four drivers in the bridge output can be turned-off between steps (I0 = I1 ≥ 2.4 V), resulting in a fast current decay through the internal output clamp and flyback diodes. The fast current decay is desirable in half-step and high-speed applications. The PHASE, I0 ,and I1 inputs float high. Varying the reference voltage, VREF , provides continuous control of the peak load current for micro-stepping applications. Thermal protection circuitry turns-off all drivers when the junction temperature reaches +170°C. It is only intended to protect the device from failures due to excessive junction temperature and should not imply that output short circuits are permitted. The output drivers are re-enabled when the junction temperature cools to +145°C. The UDx2916 output drivers are optimized for low output saturation voltages—less than 1.8 V total (source plus sink) at 500 mA. Under normal operating conditions, when combined with the excellent thermal properties of the package designs, this allows continuous operation of both bridges simultaneously at 500 mA. 16 15 11 quence. This is accomplished by digitally selecting 100% drive current when only one phase is on and 67% drive current when two phases are on. Logic highs on both I0 and I1 turn-off all drivers to allow rapid current decay when switching phases. This helps to ensure proper motor operation at high step rates. The logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for "hold" conditions and/or increased current (and available torque) for start-up conditions. 13 +5 V C T 56 kΩ RT PHASE OUTA OUTB H L H L L H Dwg. EP-008B1 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 6 2916 Dual Full-Bridge Motor Driver APPLICATION NOTES Current Sensing To minimize current sensing inaccuracies caused by ground trace IR drops, each current-sensing resistor should have a separate return to the ground terminal of the device. For low-value sense resistors, the IR drops in the PCB can be significant and should be taken into account. The use of sockets should be avoided as their contact resistance can cause variations in the effective value of RS. Generally, larger values of RS reduce the aforementioned effects but can result in excessive heating and power loss in the sense resistor. The selected value of RS should not cause the absolute maximum voltage rating of 1.5 V, for the SENSE terminal, to be exceeded. The recommended value of RS is in the range of: RS = 0.75 / ITRIP(max) ± 50% . If desired, the reference input voltage can be filtered by placing a capacitor from REFIN to ground. The ground return for this capacitor as well as the bottom of any resistor divider used should be independent of the high-current power-ground trace to avoid changes in REFIN due to IR drops. Thermal Considerations For reliable operation, it is recommended that the maximum junction temperature be kept below 110°C to 125°C. The junction temperature can be measured best by attaching a thermocouple to the power tab or batwing of the device and measuring the tab temperature, TTAB. The junction temperature can then be approximated by using the formula: TJ = TTAB + (2 × ILOAD × VF × RθJT) , where VF can be chosen from the electrical specification table for the given level of ILOAD. The value for RθJT is approximately 6°C/W for both package styles. The power dissipation of the batwing packages can be improved 20% to 30% by adding a section of printed circuit board copper (typically 6 to 18 square centimeters) connected to the batwing terminals of the device. The thermal performance in applications that run at high load currents, high duty cycles, or both, can be improved by adding external diodes from each output to ground in parallel with the internal diodes. Fast-recovery (≤200 ns) diodes should be used to minimize switching losses. Load Supply Terminal The load supply terminal, VBB, should be decoupled with an electrolytic capacitor (≥47 μF is recommended), placed as close to the device as is physically practical. To minimize the effect of system ground IR drops on the logic and reference input signals, the system ground should have a low-resistance return to the load supply voltage. Fixed Off-Time Selection With increasing values of tOFF, switching losses decrease, lowlevel load current regulation improves, EMI reduces, PWM frequency decreases, and ripple current increases. The value of tOFF can be chosen for optimization of these parameters. For applications where audible noise is a concern, typical values of tOFF should be chosen in the range of 15 to 35 μs. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 7 2916 Dual Full-Bridge Motor Driver Package B, 24-pin DIP External batwings, Pins 6, 7, 18, and 19 are fused internally +0.25 30.10 –0.64 24 +0.10 0.38 –0.05 +0.76 6.35 –0.25 +0.38 10.92 –0.25 5.33 MAX For Reference Only (reference JEDEC MS-001 BE) Dimensions in millimeters 7.62 A 1 2 +0.51 3.30 –0.38 1.27 MIN 2.54 +0.25 1.52 –0.38 Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area 0.018 0.46 ±0.12 Package LB, 24-pin SOICW External batwings, Pins 6, 7, 18, and 19 are fused internally 15.40±0.20 4° ±4 24 +0.07 0.27 –0.06 2.20 10.30±0.33 7.50±0.10 A 1 24 9.60 +0.44 0.84 –0.43 2 1 2 0.65 0.25 24X SEATING PLANE 0.10 C 0.41 ±0.10 1.27 2.65 MAX 0.20 ±0.10 C SEATING PLANE GAUGE PLANE 1.27 B PCB Layout Reference View For Reference Only External batwings, Pins 6, 7, 18, and 19 are fused internally (Reference JEDEC MS-013 AD) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Reference pad layout (reference IPC SOIC127P1030X265-24M) All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 8 2916 Dual Full-Bridge Motor Driver UDN2916EB Package EB, 44-pin PLCC External batwings, Pins 7 through 17 and 29 through 39 are fused internally 17.53 ±0.13 16.59 ±0.08 0.51 2 1 44 7.75 ±0.36 A 17.53 ±0.13 16.59 ±0.08 7.75 ±0.36 0.74 ±0.08 4.57 MAX 44X SEATING PLANE 0.10 C 0.43 ±0.10 C 1.27 7.75 ±0.36 7.75 ±0.36 For Reference Only (reference JEDEC MS-018 AC) Dimensions in inches, metric dimensions (mm) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area Copyright ©1994-2009, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 8535000 www.allegromicro.com 9