Application Note 1509 ISL282X7SOICEVAL2Z Evaluation Board User’s Guide Introduction but can be changed by the user to provide additional power supply filtering, or to reduce the voltage rate-of-rise to less than ±1V/µs. Two additional capacitors, C3 and C5 are connected close to the part to filter out high frequency noise. Anti-reverse diode D1 protects the circuit in the case of accidental polarity reversal. J11 V+ J12 R16 Reference Documents • ISL28207 Data Sheet, FN6631 J8 0 V- • ISL28217 Data Sheet, FN6632 C2 C4 1µF 1µF • ISL28227 Data Sheet, FN6633 J13 VREF J14 0 J6 The ISL282X7 operational amplifiers feature low bias current, low noise, and low offset and temperature drift. R31 The ISL282X7SOICEVAL2Z evaluation board is a design platform containing all the circuitry needed to characterize critical performance parameters of the ISL282X7 operational amplifiers in SOIC-8 package, using a variety of user defined test circuits. D1 Evaluation Board Key Features The ISL282X7SOICEVAL2Z is designed to enable the IC to operate from a single supply, +4.5VDC to +40VDC or from split supplies, ±2.25VDC to ±20V. The board is configured for a dual op amp connected for differential input with a closed loop gain of 10. A single external reference voltage (VREF) pin and provisions for a user-selectable voltage divider - filter are included. C3 C5 0.01µF 0.01µF FIGURE 1. POWER SUPPLY CIRCUIT Amplifier Configuration (Figure 2) The schematic of 1/2 of the op-amp with the components supplied is shown in Figure 2. The circuit implements a differential input amp with a closed loop gain of 10. The circuit can operate from a single supply or from dual supplies. The VREF pin must be connected to ground to establish a ground referenced input for dual supply operation, or can be externally set to any reference level for single supply operation. VREF should not be left floating. Power Supplies (Figure 1) External power connections are made through the +V, -V, VREF and Ground connections on the evaluation board. For single supply operation, the -V and Ground pins are tied together to the power supply negative terminal. For split supplies, +V and -V terminals connect to their respective power supply terminals. De-coupling capacitors C2 and C4 connect to their respective supplies through R16 and R31 zero-ohm resistors. These resistors are 0Ω RF ISL282X7 (1/2) 100kΩ IN RININ- VP IN- V+ 10kΩ RIN+ IN+ IN + VCM VREF VREF IN+ 10kΩ 0Ω VOUT V+ VM RREF+ RL 100kΩ DNP GND FIGURE 2. BASIC AMPLIFIER CONFIGURATION November 6, 2009 AN1509.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1509 User-selectable Options (Figures 3 and 4) The outputs (Figure 4) have additional resistor and capacitor placements for loading. Component pads are included to enable a variety of user-selectable circuits to be added to the amplifier VREF, inputs, outputs, and the amplifier feedback loops. The Inputs (Figure 3) have additional resistor and capacitor, and jumper placements for loading and/or measurement of frequency sensitive parameters. DNP R11 R13 10k 100k C1 OPEN R14 J2 R2 VREF 10k DNP R15 R18 DNP 100k To Output To INTo IN+ From Output C6 OPEN R26 0 FIGURE 3. INPUT STAGE (1/2) DNP R12 DNP OPEN R28 R10 DNP OUT R17 DNP NODE C8 R3 DNP DNP 0 DNP R4 R1 R5 J1 IN+ R6 IN- NOTE: Operational amplifiers are sensitive to output capacitance and may oscillate. In the event of oscillation, reduce output capacitance by using shorter cables, or add a resistor in series with the output. FIGURE 4. OUTPUT STAGE (1/2) TABLE 1. ISL282X7SOICEVAL2Z COMPONENTS PARTS LIST DEVICE # DESCRIPTION COMMENTS C2, C4 CAP, SMD, 0805, 1µF, 50V, 10%, X7R, ROHS Power Supply Decoupling C3, C5 CAP, SMD, 0603, 0.01µF, 50V, 10%, X7R, ROHS Power Supply Decoupling C1, C6-C10 CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS User selectable capacitors - not populated D1 DIODE-RECTIFIER, SMD, SOD-123, 2P, 40V, 0.5A, ROHS Reverse Power Protection U1 (ISL28207FBZ) OP AMP, SOIC, ROHS U1 (ISL28217FBZ) OP AMP, SOIC, ROHS U1 (ISL28227FBZ) OP AMP, SOIC, ROHS R1-R3, R5-R8, R10, R12, RESISTOR, SMD, 0603, 0.1%, MF, DNP-PLACE HOLDER R15, R17, R20,R22, R28-R30, R32, R34-R36 User selectable resistors - not populated R5, R18 RES, SMD, 0603, 0Ω, 1/10W,TF, ROHS Zero ohm user selectable resistors R11, R14, R21, R24 RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS Gain resistors R13, R18, R19, R23 RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS Gain resistors 2 AN1509.0 November 6, 2009 Application Note 1509 FIGURE 5. ISL282X7SOICEVAL2Z TOP VIEW Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 3 AN1509.0 November 6, 2009 J11 R31 0 R16 C4 1µF VREF J14 C2 1µF J13 J12 J8 V+ 0 J6 V- D1 4 CLOSE C3 TO DUT C5 0.01µF 0.01µF C6 10k DNP R30 U1 2 SOIC8 7 Generic 3 Pack. 6 4 5 J24 OPEN C7 R21 OPEN R27 10k 0 VREF J3 R15 R18 R19 R22 DNP 100k 100k DNP R7 DNP J4 DNP C8 J16 R8 DNP FIGURE 6. ISL282X7SOICEVAL2Z SCHEMATIC DIAGRAM DNP OPEN R14 8 0 DNP 10k 1 DNP R36 R24 100k C1 R35 R23 100k C10 R13 10k DNP DNP 0 R20 R34 DNP DNP R32 DNP DNP R12 DNP R17 R10 R11 INJ23 IN+ J22 J21 J20 J19 J18 NODE R25 R5 R3 OUT C9 R2 OUT OPEN R29 J2 DNP DNP 0 DNP R6 R1 DNP R4 J1 NODE Application Note 1509 J17 IN+ OPEN R28 J15 IN- OPEN R26 AN1509.0 November 6, 2009