AN56: NOVRAM AUTOSTORE Considerations

NOVRAM AUTOSTORE Considerations
®
Application Note
April 27, 2005
AN56.0
Author: Richard Downing
Introduction
and is derived by taking the integral of:
Intersil’s NOVRAM (Nonvolatile RAM) devices are highspeed SRAMs overlaid bit-for-bit with a nonvolatile E2PROM
array. The AUTOSTORE (AS) feature available on these
parts automatically saves the RAM contents to E2PROM
during power-down. AS typically requires some basic Vcc
holdup circuitry to ensure successful completion.
dV
i = C ------dt
To use the circuit with a 5V supply requires that diode DH to
have low forward voltage drop VF. A Schottky diode such as
the 1N5817 (available from Motorola or Philips) is suitable
with maximum VF of 0.32V at 100mA. The cost of the
component is around 20¢ in volume.
Basic Autostore Circuit
The minimal components necessary to achieve an AS are a
capacitor and diode which connect to the NOVRAM as
shown in Figure 1. The “hold-up” capacitor must be capable
of supplying the maximum AS current (ICC3 max.) for the
maximum AS period (TASTO max.) as Vcc falls to a level
between the AS threshold voltage (VASTH min.) and the AS
end voltage (VASEND min.). The “hold-up” capacitor value
(CH) is calculated using the equation:
Power Supply Limitation
Intersil specifies a NOVRAM Vcc operating range between
4.5V and 5.5V. The diode in the AS circuit, however, results
in a voltage drop (VF) between the power supply and the
NOVRAM’s Vcc pin. A maximum VF of 0.32V results in a
possible AS at a supply voltage of 4.62V. For a reasonable
margin of safety, the suggested AS circuit should be
powered using a supply that operates above 4.75V. A 5V
±5%. power supply would be one way of ensuring correct AS
operation.
( I CC3 max ) ( T ASTO max )
C H = -------------------------------------------------------------------V ASTH min – V ASEND max
TABLE 1. NOVRAM AUTOSTORE DEVICE SUMMARY
VASTH
(V)
VASEND (V)
TASTO (ms)
ICC3 (mA)
CH (µF)
Max
Min
Max
Max
Min
Part No.
Min
X24C45
4.0
4.3
3.5
5.0
2.0
20
X20C16
4.0
4.3
3.5
2.5
2.5
13
VCC
VCC
VCC
1N5817
X20C16
VCC
DH
NE
VCC
VCC
VCC
OE
1N914
CE
+
VCC
100µF
0.1µF
CE1
CE
VBAT
CE OUT
CE IN
CH
µC
LT691
NOVRAM
FIGURE 2
FIGURE 1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Application Note 56
Pre-AUTOSTORE Data Corruption
Conclusion
If the supply to a microcontroller interfacing to a parallel
NOVRAM is lost while the NOVRAM remains powered,
inadvertent writes to the SRAM can occur. The uncertain
state of the microcontroller control lines during power-down
may cause fluctuations in the status of CE, WE, and OE,
which can result in a write condition. Invalid SRAM data may
be transferred to the nonvolatile E2PROM array if these
changes occur before an AS. These inadvertent write
conditions can be avoided using supervisory ICs available
from manufacturers such as Linear Technology or Maxim.
These devices control the CE of the NOVRAM so that below
a set supply threshold voltage, CE is held HIGH and the
NOVRAM is placed into a standby condition. An example of
such a circuit is shown in Figure 2.
NOVRAMs combine the advantages of fast access RAMs
and nonvolatility for E2PROMs. The AUTOSTORE feature
enables data integrity to be maintained during power-down.
In most applications two additional components (a diode and
capacitor) are all that is needed to ensure successful
completion of an AUTOSTORE. A supervisory IC may also
be useful to protect the part from inadvertent writes.
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
2
AN56.0
April 27, 2005