Implementing Tip and Ring Protection Circuitry For the HC5518X Ringing SLIC Family TM Application Note September 1999 AN9842.1 Authors: Richard Whitehead, Dick Tung Introduction The secondary protection must protect the T and R ports from the “let through” voltages and currents. Although secondary protection schemes are application dependent, Figure 1 shows a typical implementation for a single stage ringing SLIC where through SLIC ringing is used. The circuit usually consists of fuses, PTCs (poly switch), RFI capacitors, diode bridges, and TVS devices such as the Intersil SGT27S10. This combination of protection circuitry must clamp the T and R ports to ground when a fault condition is present that exceeds the maximum output capabilities of the ringing SLIC. When the fault condition disappears, normal operation must resume. A very important segment of the design of telecommunications equipment is proving adequate surge protection circuitry for the equipment terminals. System designers are required to protect the system from secondary (let through) disturbances as identified in GR-1089 - CORE, Issue 2, Section 4. Developing the protection circuitry solution while maintaining overall system performance and cost can often be challenging. This application note describes circuitry which could be used to meet the GR-1089, Section 4 requirements for the HC5518X family of ringing SLICs. The “resettable” PTCs are current limiting devices which increase in resistance when an applied fault condition exceeds the specified trip limits of the PTC. When the PTC is “tripped,” it remains in a high impedance state until the fault is removed. Capacitors C 1 and C 2 provide a low impedance path to ground for RFI transients. The diode bridge is used to clamp positive surges to ground and steer negative transients to the TVS which turns “on” and clamps the T and R terminals to ground. With the appropriate selection of these protection components, secondary protection requirements specified by GR-1089 can be met while maintaining overall system performance. Basic Protection Circuit Description Figure 1 illustrates a basic concept for primary and secondary protection of telecommunications equipment terminals where ringing SLICs are used. Although the following discussions focus primarily on second level surge protection, it is interesting to briefly discuss primary protection and “let through” surges as defined by GR-1089. Primary surge protection usually consists of a 3 mil carbon block or gas tube (GDT). These are voltage and current limiting devices that will “let through” surges of up to 2.5kV peak surge (lightning) and 600VRMS (60Hz) power line cross. Let through surge currents can range from 500A peak (2µs x 10µs) lightning to 1A (600V RMS) power cross. Consult GR-1089 for additional details concerning let through surges for secondary protection. PRIMARY PROTECTION Suggested Protection Circuitry for HC5518x Utilizing operational specifications provided by the HC5518X data sheet and the GR-1089 requirements, the circuit illustrated in Figure 2 can be implemented to protect the SLIC from secondary surge levels. VBH (-85V) SECONDARY PROTECTION CROWBAR CLAMP TVS EXPOSED COPPER PLANT PROTECTION RESISTORS AND FUSE 0.002µF 100V CARBON BLOCKS OR GAS TUBES 0.002µF 100V TIP RSLIC18 0.1µF 100V RING RFI CAPS FIGURE 1. BASIC PROTECTION CIRCUIT 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001. All Rights Reserved Application Note 9842 The circuit in Figure 2 is recommended for applications where the high battery voltage (VBH) can range up to -85V. The HC5518X data sheet specifies 35Ω per leg for protection resistance. As shown in Figure 2, RP has been divided into 3 separate resistors and equals 35Ω. The total resistance of the PTC and RPT on RPR should equal 15Ω. The PTC represents 5Ω of RP (total) and limits the fault current to the TVS/diode bridge and the HC5518X. Additionally 10Ω,1W resistors are placed between the diode bridge and the PTC. These resistors provide additional current limiting to the diode bridge/TVS and the HC5518X. Finally, 20Ω, 1/2W resistors are placed between the diode bridge and the HC5518X to provide the final current limiting function to the SLIC. This arrangement provides the necessary current limiting to the system, selection of lower wattage resistors, and minimizes affects on circuit performance. To understand the selection of the protection devices an examination of the requirements placed upon the HC5518X, the TVS and the PTC should be reviewed. HC5518X Protection Requirements During Fault Conditions 1. HC5518X’s Trip and Ring ports must survive 100VPEAK “residual” surges above ground or below VBH for 1µs during 2/10 lightning tests. This represents the typical “let through” lightning surge from the protection circuitry that the SLIC will encounter. 2. HC5518X’s Tip and Ring ports must survive 3VPEAK “residual” surges above ground or below VBH during AC power cross tests. This represents the typical “let through” AC power cross surge from the protection circuitry that the SLIC will encounter. TVS Selection TVS devices are solid state SCR type structures that are available in fixed or gate controlled breakover voltages (VBO). The gate controlled version is best suited for the ringing SLIC application since its gate can be tied to the battery voltage enabling the TVS to track variations in the battery supply. A “stopper” diode is placed in series with the gate of the TVS to prevent the VBH power supply from being shorted to ground whenever a fault condition energizes the SCR protection device. Additionally, in multiline systems where power supplies are very robust, the “stopper” diode serves to protect the SCR and prevent disruption of service on the other lines. The Intersil SGT27S10 gated TVS was selected using the following criteria. 3. HC5518X must survive Tip and/or Ring faults to ground. HC5518X Operational Conditions 1. Loop Current = 15mA to 45mA 2. Maximum ringing voltage = 83.4VPEAK (59VRMS) 3. Maximum On Hook Ringing Current = 42mARMS (5REN). PTC must not open. 4. Maximum Off Hook Ringing Current = 254mARMS (5REN + RLOOP). PTC must not open before ring trip. 5. VBH = -85V, VBL = -24V, RP = 35Ωs/leg. Using the conditions above, the selection of the protection resistance (RP), the TVS, and the PTC can be determined. Protection Resistance Configuration VCC T (TR600-150) PTC RP1 RPT 5Ω 10Ω D3 BGND TIP AGND VCC 20Ω D1 RSLIC18 5Ω 10Ω D4 D2 20Ω RING R PTC (TR600-150) RPR SG1 SGT27S10 D5 RP2 VBH VBL VBH VBL CG 0.1µF 200V FIGURE 2. RSLIC18 PROTECTION CIRCUIT FOR V BH = -85V APPLICATION 2 Application Note 9842 Selection of TVS for Lightning and Power Line Cross HC5518X Protection Circuit Surge Testing Procedure 10/1000 waveform = 1000V, 40A (GR-1089) The HC5518 protection circuit as shown in Figure 2 was tested to GR-1089 requirements. The HC5518 was exposed to each fault condition in all of its operating modes. Table 1 shows the operating modes for the HC5518X device. Using the circuit shown in Figure 2, the appropriate test signal generator and sequencing control is applied to the T and R ports at the PTCs. For lightning surge tests, Table 2 identifies the tests to be performed and the procedure. For AC power cross tests, Table 3 gives the tests to be performed and the procedure. 2/10 waveform = 2500V, 125A (GR-1089) Peak line voltage to ground (40A peak current) = 25V (measured) Peak line to TVS gate voltage (40A peak current) = -15V (measured) Maximum Line to ground voltage = -90V (GR-1089) Maximum Gate to line voltage = -90V (GR-1089) TABLE 1. RSLIC OP MODE CONTROL Maximum gate current (10ms) = 1A (GR-1089) Gate Trigger Current (Igt) = 150mA OP MODE F2 F1 F0 E0 BSEL Holding Current = 100mA Forward Active L L H H H/L PTC (Positive Temperature Coefficient Thermistor) Selection Reverse Active L H H H H/L Low Power Standby L L L H H/L Ringing H L L H H/L Tip Open H H L H H/L Forward Loop Back H L H H H/L Power Denial H H H H H/L For the HC5518X protection circuitry the TR600-150 was selected. As a general rule of thumb, the PTC should have the lowest off state resistance possible. This allows for ease of matching to minimize affects on system performance. Additionally the TR600-150 resistance is specified as 6Ω which comprises part of the total protection resistance for the HC5518X. PTC Specifications PTC Resistance = 5Ω to 12Ω at 20oC 1 Hour Post Trip Resistance = 20Ω at = 20oC Three HC5518Xs were tested to all of the fault conditions listed in Tables 2 and 3. Pre and post data was recorded for each of the surge tests. The governing criteria for pass or fail is given in the last Item of each of the test procedures. PTC Holding Current = 83mA at 70oC Checking Ringing Capability 55 Second Time To Trip at 20oC = 350mA Once the protection circuitry has been selected and tested, the ringing capability of the SLIC should be evaluated for possible limitations. The HC5518X ringing capability was tested under conditions illustrated in Figure 3. The input ringing signal (sinewave) applied to the VRS pin was adjusted for maximum peak voltage swing on Tip and Ring while applying 1, 3, and 5 REN loads. The results of the evaluation are shown in Table 4. 55 Second Time To Trip at 70oC = 193mA Maximum Operating Voltage = 60V Maximum Interrupt Voltage = 600V Maximum Interrupt Current = 3A With the selected components as shown in Figure 2, the protection circuitry can be prototyped and tested to GR-1089 requirements. It should be understood that HC5518X protection circuit is not limited to the recommended selections but any alternative selection would require retesting to GR-1089. 3 Surge Test Results and Conclusion Three HC5518X devices passed all of the fault conditions applied as recommended by GR-1089. After each fault condition was removed, the devices under test returned to their normal operating state that was selected. The protection circuitry as recommended in Figure 2 can be used to meet specific requirements for secondary fault protection identified in GR-1089. Application Note 9842 TABLE 2. LIGHTNING SURGE TESTS VOPEN (RMS) ISHORT (AMP) RS (Ω) WAVEFORM (µs) TEST CONDITIONS NO. OF TESTS EXPECTED CURRENT ±1kV 100 10 10/1000 Tip to Source, Ring to Gnd 25 times 40A ±1kV 100 10 10/1000 Ring to Source, Tip to Gnd 25 times 40A ±1kV 100 10 10/1000 Tip and Ring to Source 25 times 40A ±2.5kV 500 5 2/10 Tip to Source, Ring to Gnd 10 times 125A ±2.5kV 500 5 2/10 Ring to Source, Tip to Gnd 10 times 125A ±2.5kV 500 5 2/10 Tip and Ring to Source 10 times 125A TEST PROCEDURE FOR TEST NO. 1 TO 12 1. With PTC in circuit. 2. Collect pre-test data on open tip and ring voltage and loop current readings with 600Ω load for VBH and VBL mode and record the data. 3. Set the scope settings. 4. Store the VP waveforms on scope screen when first applying the test signal and record the data. 5. Continue the surge test until it is complete. 6. Collect post-test data on open tip and ring voltage and loop current readings with 600Ω load for VBH and VBL mode and record the data. 7. The DUT passes the test, if the difference between the pre and post-test data is less than 5%. Otherwise, the DUT fails the test. TABLE 3. AC POWER CROSS TESTS VOPEN (RMS) ISHORT (AMP) RS (Ω) TEST CONDITIONS TEST DURATION EXPECTED CURRENT 50 0.330 150 Tip to Source, Ring to Gnd 15 minutes 300mA 50 0.330 150 Ring to Source, Tip to Gnd 15 minutes 300mA 50 0.330 150 Tip and Ring to Source 15 minutes 300mA 100 0.170 600 Tip to Source, Ring to Gnd 15 minutes 160mA 100 0.170 600 Ring to Source, Tip to Gnd 15 minutes 160mA 100 0.170 600 Tip and Ring to Source 15 minutes 160mA 200 0.330 600 Tip to Source, Ring to Gnd 1 sec, 60 times 320mA 200 0.330 600 Ring to Source, Tip to Gnd 1 sec, 60 times 320mA 200 0.330 600 Tip and Ring to Source 1 sec, 60 times 320mA 400 0.670 600 Tip to Source, Ring to Gnd 1 sec, 60 times 630mA 400 0.670 600 Ring to Source, Tip to Gnd 1 sec, 60 times 630mA 400 0.670 600 Tip and Ring to Source 1 sec, 60 times 630mA 600 1 600 Tip to Source, Ring to Gnd 1 sec, 60 times 950mA 600 1 600 Ring to Source, Tip to Gnd 1 sec, 60 times 950mA 600 1 600 Tip and Ring to Source 1 sec, 60 times 950mA 4 Application Note 9842 AC POWER CROSS TEST PROCEDURE TEST PROCEDURE FOR TEST NO. 1, 2, 3, 4, 5, 6 TEST PROCEDURE FOR TEST NO. 7, 8, 9, 10, 11, 12 1. With PTC in circuit. 1. With PTC in circuit. 2. Collect pre-test data on open tip and ring voltage and loop current 2. readings with 600Ω load for VBH and VBL mode and record the data. Collect pre-test data. 3. Store the VP waveforms on scope screen when first applying the test 3. signal and record the data. Store the VP waveforms on scope screen when first applying the test signal and record the data. 4. Set storage scope to real time mode. 4. Set storage scope to real time mode. 5. Record the PTC time to trip data if PTC tripped. 5. Record the thermal alarm data if SLIC went into thermal alarm within 1 minute. 6. Record the thermal alarm data if SLIC went into thermal alarm. 6. Replace the PTC with a 5Ω power resistor and set the timer to 1 second on, 2 seconds off. 7. Collect the post-test data on open tip and ring voltage and loop cur- 7. rent readings with 600Ω load for VBH and V BL mode and record the data. Collect the post-test data. 8. The DUT passes the test, if the difference between the pre and post- 8. test data are less than 5%. Otherwise, the DUT fails the test. The DUT passes the test, if the difference between the pre and posttest data are less than 5%. Otherwise, the DUT fails the test. VCC VP (TR600-150) PTC 5Ω RP1 RPT 10Ω D3 BGND TIP AGND VCC 20Ω D1 REN LOAD RSLIC18 VRS 5Ω VP PTC (TR600-150) 10Ω D4 D2 20Ω SG1 SGT27S10 RPR D5 RP2 RING VBH CG 0.1µF 200V VBL D6 VBL VBH FIGURE 3. RINGING CAPABILITY TEST CIRCUIT TABLE 4. RINGING CAPABILITY AT 1% THD VBH 1 REN 3 REN 5 REN -90V 87.5Vp 83.5Vp 80.5Vp -85V 83.4Vp 82.0Vp 80.5Vp -80V 77.0Vp 74.5Vp 71.0Vp 1 REN = 6kΩ + 8µF 5 3 REN = 2kΩ + 24µF 5 REN = 1.2kΩ + 40µF Application Note 9842 Notes 6 Application Note 9842 Notes 7 Application Note 9842 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. 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