XDS560 Trace 1 June 28, 2007 TI Public Data Customers Win with eXpressDSP™ Software and Development Tools Application Design Code & Build TMS320DSP CCStudio Robust, Open DSP/BIOS Best Algorithm Standard qualified Third Party solutions kernel with drivers and CSL Debug point and click IDE IDE and robust project manager in class C/C++ Compiler Analyze & Tune Real-time analysis H/W & S/W BP Advanced Event Triggering Fast Sims/Rewind Watch Windows Trace Accelerates time to market Enables differentiation Reduces system cost 2 June 28, 2007 TI Public Data Rich optimization options and tooling Tuning Dashboard Profiling Cache Visualization and Analysis Power Management XDS560 TRACE: Exposing the Toughest Real-time Bugs Time Savings Find previously “invisible” complex, intermittent, context-sensitive real-time bugs Detect scheduling issues, intermittent glitches, false interrupts and more without stopping the processor Fully integrated with CCStudio Advanced Event Triggering Cost Savings Fine tune code performance and cache optimization of complex switch intensive multi-channel applications Real-time code and event profiling Fast and accurate code analysis with profiling, cache 3 June 28, 2007 view and code coverage Support available today on: C641x, DM64x, C6455 TI Public Data Debug Options Today – Catch 95% of Bugs CCStudio Target Simulator Emulator 4 Emulation Simulation Effective for solving basic software issues Better view inside the “chip” June 28, 2007 TI Public Data Finding the Invisible Bugs Bug Name: “Invisisect” from the Latin roots: L invīsibilis and L insectum Common name: Pain in the Butt Phylum: Anthropoda Class: Insecta Description: Virtually invisible to the naked eye, typically reveals itself under rare, nonpredictable conditions Habitat: Hides in cache routines, interrupt algorithms Type of Damage: System intermittent glitches, race conditions between events, unpredictable system crashes Recommended Pest Control: XDS560 Trace 5 June 28, 2007 TI Public Data Finding the Invisible Bugs Difficult software problems Intermittent real time glitches Race conditions between events Crashes (Stack overflow, etc) Runaway code False interrupts What is REALLY going on here? And HERE when the problem occurs DSP Chip DSP Core Program Cache Data Cache L2 Cache DSP Peripherals & Bus 6 June 28, 2007 TI Public Data XDS560 Trace Introduction Debug unit INSIDE DSP Data collection Complex event triggers Separate of DSP execution Does not interfere “Non-intrusive” Data is piped out a high-speed interface DSP Chip DSP Core Program Cache Data Cache L2 Cache DSP Peripherals & Bus 7 June 28, 2007 Data Collection Advanced Event Trigger TRACE TRACE TI Public Data CCStudio IDE used to analyze data How Did I Get Here? Trace Capture Buffer “How did I get here?” ISR2 Trace will capture continuously through SWI, ISR1, ISR2, etc. until it is stopped. ISR1 SWI Undesired interrupt IDL Ready Running Pre-empted 8 June 28, 2007 TI Public Data Trace AET Trigger: PC=0xISR2_ADDR How Trace Works Address 0x00088 0x00089 0x00090 ~~~~ 0x0489C 0x048A0 0x048A4 0x048A8 Addr Data | | | | | | | | | Disassembly MVK.L2 B.S1 SUB.L2 ~~~~~ MVKH.S2 ADD.L2 STH.D2T2 NOP 0x088 MVK 1,B4 _SWI B15,8,B15 0x0000,B6 8,B15,B15 ; _ISR2 B4,*+B6[B5] 2 Debug Port TRACE – Data Collection Trigger Points DSP Chip 9 June 28, 2007 = 0x089 = 0x48A0 TRC OFF = 0x0xx N/A Trigger Generator DSP Core TRC ON Advanced Event Analysis Unit TI Public Data XDS560 Trace Trigger Triggerpoint pointset set to toturn turnTrace TraceON ON when PC = x089 when PC = x089 PC ≠ match no action taken How Trace Works Address 0x00088 0x00089 0x00090 ~~~~ 0x0489C 0x048A0 0x048A4 0x048A8 | | | | | | | | | Disassembly MVK.L2 B.S1 SUB.L2 ~~~~~ MVKH.S2 ADD.L2 STH.D2T2 NOP 0x089 AMOV B.S1 Addr Data 1,B4 _SWI B15,8,B15 0x0000,B6 8,B15,B15 ; _ISR2 B4,*+B6[B5] 2 Debug Port TRACE – Data Collection XDS560 Trace Trigger Points DSP Chip 10 June 28, 2007 0x089 TRC ON = 0x48A0 TRC OFF = 0x0xx N/A Trigger Generator DSP Core = Advanced Event Analysis Unit TI Public Data Trigger Triggermatch match with withcurrent currentPC PC Trigger generator enables trace How Trace Works Address 0x00088 0x00089 0x00090 ~~~~ 0x0489C 0x048A0 0x048A4 0x048A8 Addr | | | | | | | | | Disassembly MVK.L2 B.S1 SUB.L2 ~~~~~ MVKH.S2 ADD.L2 STH.D2T2 NOP 0x00089 0x00090 0x0489C Data 1,B4 _SWI B15,8,B15 0x0000,B6 8,B15,B15 ; _ISR2 B4,*+B6[B5] 2 Debug Port TRACE – Data Collection (Enabled) Trigger Points DSP Chip 11 June 28, 2007 0x089 TRC ON = 0x48A0 TRC OFF = 0x0xx N/A Trigger Generator DSP Core = Advanced Event Analysis Unit TI Public Data XDS560 Trace Trace Tracecontinues continues exporting exportingtrace. trace. Trigger setup Trigger setupto toturn turn trace OFF when trace OFF when PC=0x48A0 PC=0x48A0 PC ≠ match no action taken How Trace Works Address 0x00088 0x00089 0x00090 ~~~~ 0x0489C 0x048A0 0x048A4 0x048A8 | | | | | | | | | Disassembly MVK.L2 B.S1 SUB.L2 ~~~~~ MVKH.S2 ADD.L2 STH.D2T2 NOP 0x48A0 0x089 AMOV B.S1 Addr Data 1,B4 _SWI B15,8,B15 0x00089 0x00090 ~~~~ 0x0489C 0x048A0 | | | | | B.S1 SUB.L2 ~~~~~ MVKH.S2 ADD.L2 0x0000,B6 8,B15,B15 ; _ISR2 B4,*+B6[B5] 2 Debug Port TRACE – Data Collection (Enabled) XDS560 Trace Trigger Points DSP Chip 12 June 28, 2007 0x089 TRC ON = 0x48A0 TRC OFF = 0x0xx N/A Trigger Generator DSP Core = Advanced Event Analysis Unit TI Public Data Trigger Triggermatch match with withcurrent currentPC PC Trigger generator disables trace Trace Display Program Address & Data Use “Query” to highlight lines that you are interested in. You will now have a trace display with source and disassembly data. 13 June 28, 2007 Correlated Source Code Use the “Fields” button to choose what you want to see and in what order. Parallel cycle Disassembly TI Public Data If you click on the cycles tab, you can choose various display options like detail timestamps, etc. Tagged samples (gray) (ex: tag OR.L2) Timestamp CPU Stall The Trace Display This window now just shows source because you filtered it. If you move this line up and down with the cursor keys, the source code in the below window will move along with you. This one shows the file you are in so you can see the context of the “C” source code line. The yellow-bars allow you to see the synchronization. 14 June 28, 2007 TI Public Data What Kind of Data Can TRACE Collect? Query to highlight address or data. Ex: 0x47F0 Read Data Choose from: Read Address Read Data Write Address Write Data Correlation with Program Address 15 June 28, 2007 TI Public Data Write Data Optionally correlate the data access (read/write) to the Program Counter XDS560 Trace Product Hardware Details Host PC & CCStudio Target Board XDS560 Emulator XDS560 Trace Product C6416T DSK DM642 EVM C6455 EVM Trace Cable TMDSEMU560T Blackhawk XDS560 USB Emulator and Trace Unit 16 June 28, 2007 TI Public Data XDS560 TRACE: Exposing the Toughest Real-time Bugs Time Savings Find previously “invisible” complex, intermittent, context-sensitive real-time bugs Detect scheduling issues, intermittent glitches, false interrupts and more without stopping the processor Fully integrated with CCStudio Advanced Event Triggering Cost Savings Fine tune code performance and cache optimization of complex switch intensive multi-channel applications Real-time code and event profiling Fast and accurate code analysis with profiling, cache 17 June 28, 2007 view and code coverage Support available today on: C641x, DM64x, C6455 TI Public Data Backup 18 June 28, 2007 TI Public Data What Can I Do With Trace? Catching Problems Runaway Code Intermittent real-time glitches Bogus interrupts Race conditions between events Stack overflow context Profiling Code Fast, accurate code analysis Real-time code and event profiling Code Coverage Real-time code coverage testing Most importantly it’s good for the really, really hard problems that show up the week or two before a release (last 5% that take 50% of your debug time) 19 June 28, 2007 TI Public Data What can I do with Trace which I cannot do with other tools? Show you your true execution path through code non-intrusively. This will help you figure out whether an interrupt ran unexpectedly, whether a function path ran as expected, etc. Gather cycle information non-intrusively. Give you visibility into what the CPU is reading and writing to memory, what the CPU is seeing (stalled because of cache miss?) You can get the data read/write address, data value, and size, correlated to the program line where it occurs Show you what is happening inside SPLOOP Get information at a line level granularity. Cycles, etc. 20 June 28, 2007 TI Public Data Advanced Information 21 June 28, 2007 TI Public Data Trace Control Panel •Checked: When CCS has the CPU HALTED, update the display. When CCS runs/steps the CPU, start the trace. •Un-Checked: Starting and stopping are controlled from the Trace Display This is to be used when you need to have a different pin configuration. Ex: EMU0 is being used for global BP in a multi-processor system means “11 Pin Trace” •“Stop on buffer full” Start collecting, stop when the buffer fills up. •”Circular Buffer Mode” Keep collecting until either a trigger stops it, or you manually tell it to stop. Hint: When you click Apply, wait until the trace display has gone back to a blank “grey”. It will take a couple of seconds as the trace system is re-programmed. 22 June 28, 2007 TI Public Data Export Settings •Keep collecting trace if the CPU is halted, but you have some realtime interrupts running. •Checked: Stall the CPU to make sure Trace data gets out. This ensures there are no data gaps, but, the CPU gets stalled. •Un-Checked: Do NOT stall the CPU. In this mode, you must be careful about what you trace, as you could run out of bandwidth, so there could be gaps in the data. •How long you were halted •Global trace stream enable / disable •Select what size of trace packet to send. 23 June 28, 2007 TI Public Data Trace Capture Buffer: Trace ON “Snapshot” Ex: Capture from this point on Ready Trace Capture Buffer Running Pre-empted ISR SWI IDL Trace ON: PC=0xISR_ADDR 24 June 28, 2007 TI Public Data Trace Capture Buffer: Trace Range “Capture only this area of code.” Ready Ex: Trace only when in ISR1 (start in ISR1, end at end of ISR1 reached) Running Trace Capture Buffer A B Pre-empted •Trace starts with beginning of ISR1 and stops at end of ISR1. •ISR2, which pre-empted ISR, is also captured. •Un-desired/unexpected pre-emption visible. ISR2 ISR1 SWI IDL Undesired Pre-emption Trace Trigger Range: A 25 June 28, 2007 B TI Public Data 0xISR1_start_addr < PC < 0xISR1_end_addr Start Trace / End Trace “Capture starting here, and end here.” Ready Ex: Trace everything from one location to the next, including child functions. Trace Capture Buffer Running A Pre-empted •Trace starts at the beginning of ISR1 (0xISR1_start_addr) and ends at end of ISR2 (0xISR2_end_addr) •SWI is also captured as it is run in between the trigger points. ISR2 ISR1 SWI IDL Trace Trigger Range: A 26 June 28, 2007 0xISR1_start_addr < PC < 0xISR2_end_addr TI Public Data Circular Buffer “Where was I before the bug?” or “How did I get here?” Ex: ISR2 should never happen. If it does, where was the code before? Ready Running Trace Capture Buffer Pre-empted Trace will capture continuously through SWI, ISR1, ISR2, etc. until it is stopped. ISR2 ISR1 SWI IDL Undesired interrupt Time Trace AET Trigger: PC=0xISR2_ADDR 27 June 28, 2007 TI Public Data When to use “Stop on Buffer Full” versus “Circular Buffer” mode Stop on Buffer Full “One-Shot” Trace capture “Capture from the time I tell you to start to until buffer is full” Good way to make sure you can see the earliest trace events Good for profiling, because start point is known. Good for looking “forward” in time. Will cause “Data not verified” at end of buffer. Circular Buffer 28 Continuous Trace capture “Capture trace until I tell you to STOP” Older information will be overwritten with new trace information. Good for looking “backward” in time. Good for debugging, because stop point is known. Will cause a single “Incomplete data” at start of buffer. June 28, 2007 TI Public Data Basic Trace Tutorial 29 June 28, 2007 TI Public Data Setting up for a simple Trace. Goal: Get a basic trace out of the system. Instructions: Load the “sillyprog” project and program into the device. Notes: While we are in Early Adopter for trace, reset your emulator before you connect. This program is located in the “CCS\my projects” directory. 30 June 28, 2007 TI Public Data Activate UBM by going to DebugÆBreakpoints 31 June 28, 2007 TI Public Data •Create a new “Trace” event 32 June 28, 2007 TI Public Data •Standard Trace has been selected. Click + to configure the information trace will collect. 33 June 28, 2007 TI Public Data •Select the types of trace that you want to get. •In this case, Program address and timestamp are selected. 34 June 28, 2007 TI Public Data •After submit the job, the trace ON is now enabled. •If this is the first trace event setup, then the XDS560 Trace system will start up. 35 June 28, 2007 TI Public Data •Create a new Trace Event. We will use this one to stop the XDS560 Trace collection upon a data write to a data variable. 36 June 28, 2007 TI Public Data •Change the “Action” to select “End All Trace” •This will stop all trace collection. 37 June 28, 2007 TI Public Data •In “Trigger Type” select “Data Memory”. •We want to stop all tracing if any application code writes to the Data_4 variable. •Set the “Location Type” to be “Range” and set the start and end locations to be the start and end address for the “Data_4” variable. •If the location range was the top of the stack, then this technique would allow us to examine trace on any stack overflow. •Remember to click “Enable” AND “Submit” 38 June 28, 2007 TI Public Data •After running the trace system, and looking at the end of the trace buffer, we can see that we have stopped tracing upon the first data write to the Data_4 variable. 39 June 28, 2007 TI Public Data Trace Display •This will allow you to get to the advanced controls. •This button allows you to start / stop the trace system. When Stopped, it will not collect trace information. •The trace system starts up ready to collect information from the target. Now, go and run the target. Stop after a few seconds. 40 June 28, 2007 TI Public Data Results after Running Target •If you click on the cycles tab, you can choose various display options like detal timestamps, etc. •Use the “Fields” button to choose what you want to see and in what order. •Use “Query” to highlight lines that you are interested in. •You will now have a trace display with source and disassembly data. 41 June 28, 2007 TI Public Data Filtering Experiment with the filters. This is critical to understanding the information collected by XDS560 Trace. 42 June 28, 2007 TI Public Data •If you filter on a string that is blank, it will show just source code. The Trace Display •This window now just shows source because you filtered it. •If you move this line up and down with the cursor keys, the source code in the below window will move along with you. •This one shows the file you are in so you can see the context of the “C” source code line. The yellow-bars allow you to see the synchronization. 43 June 28, 2007 TI Public Data Tutorial: Configuring Event Trace “Help me optimize my cache operations by showing me where I have cache misses in my code.” 44 June 28, 2007 TI Public Data •If the trace type of “Event” is selected instead of “Standard”, then the trace system will be configured for “Event Tracing” •This will allow the user to select from several global categories: Stall, Memory, System, and External. •Note that event types are determined by the device being used. This information should be in the datasheet. •In this case, I have chosen to view all types of CPU stalls as well as any type of L1P cache stall. •Event 1 is setup for CPU stalls, and Event 2 is setup for L1P stalls. Thus, in the trace display, if there are any “1” in the stall event column, they will be CPU stalls. If there are any “2 in the stall event calumn, they will be L1P stalls. •This information helps a user to determine the type of stall on a per-line basis. 45 June 28, 2007 TI Public Data •From the trace output, we can see that we have CPU stalls and not L1P stalls. •This is because the Stall Cycles display shows “1” instead of “2” •Note that the meaning of “1” and “2” is wholly dependint on how you configure the events. 46 June 28, 2007 TI Public Data Data Trace 47 June 28, 2007 TI Public Data Data Trace Read Data Choose from: •Read Address •Read Data •Write Address •Write Data •Correlation with Program Address 48 June 28, 2007 Note that Trace Bandwidth is limited. Can choose to enable Stall Mode if needed. Write Data Optionally correlate the data access (read/write) to the Program Counter Query to highlight address or data. Ex: 0x47F0 TI Public Data ETB Embedded Trace Buffer 49 June 28, 2007 TI Public Data ETB Basics What is ETB? ETB stands for “Embedded Trace Buffer” ETB is an on-chip memory buffer where the trace information is stored. Where is ETB available? ETB is only available on certain devices. How big is the ETB buffer? The size depends on the chip designer. Typically, it will be between 2-8K. Is an XDS560 Trace Hardware unit needed to use the ETB? No Can ETB be used concurrently with the XDS560 Trace Yes, but there are limitations A device with multiple cores has several operating options: ¾ All cores use their individual ETB ¾ One user selected core outputs Trace to the XDS560 Trace, while others use their individual ETB. ¾ One user selected core outputs Trace to the XDS560 Trace. 50 June 28, 2007 TI Public Data Using ETB Select the type of Trace receiver Additional Tabs for each core The Trace control now shows ETB as the type of Trace Receiver 51 June 28, 2007 TI Public Data Overlays 52 June 28, 2007 TI Public Data Software Overlays Software Overlays have software modules share program memory Memory Map Can improve performance Mechanics: The software modules will both run from the same physical memory The software modules are both loaded into different physical memory locations The user or application framework will copy the code from the load region into the run region Supports automatic detection of the software module used in the overlay. Manual override is available Supports manual overlay software module selection June 28, 2007 Code A Code B Code A Load Region Code B Section: Union XDS560 Trace 53 Overlay Region (Run Region) TI Public Data Software overlay When Overlays are used, the load and run addresses are unique Trace messages indicate start of overlay section User can override the automatic overlay selection 54 June 28, 2007 TI Public Data Software Overlays: Manual The User can manually select the overlay that was used in the program 55 June 28, 2007 TI Public Data