ISL6294EVAL1Z Evaluation Board Application Manual ® Application Note November 28, 2006 AN1169.1 Description Features The ISL6294EVAL1Z is an evaluation tool for the ISL6294 single-cell Li-Ion battery charger. The evaluation tool provides a complete evaluation platform addressing all datasheet specifications and functionalities. The jumpers on the board facilitate the programming of the charge current, different charging conditions, and can be used to make other necessary connections, such as current measurement. • A Complete Evaluation Platform for the ISL6294 Charger The ISL6294 is a fully integrated single-cell Li-Ion battery charger that accepts input voltages ranging from 4.5V up to 28V. Since the cradle input is rated for 28V maximum input voltage, the components associated with the input circuit on the evaluation board are good for a 28V supply. • Convenient Jumpers for Programming the Charge Current, Charge Mode, and for Current Measurement The components assembled in the center square constitute a complete charger, indicating the space saving advantage of the typical ISL6294 installation in space-limited applications. Ordering Information PART # DESCRIPTION ISL6294EVAL1Z Evaluation Board for ISL6294 • The Center Square Suggesting the Space Saving Advantage of the Typical Components Assembly • Accepts Input Voltage up to 28V • Flexible Power Connectors Each with a Hook and a Solder Pad Providing Variety to Users • 3.5x2.5 Square Inches Board Size Handy for Evaluation • Six Thermal Vias in the Thermal Pad Similar To Customers’ Thermally Enhanced Environment • On-Board LEDs for Input PPR and CHG State Indication What is Needed The following instruments will be needed to perform testing: • Power supplies: 1) PS1: DC 30V/5A 2) PS2: DC 20V/5A • DC Electronic load: 20V/5A Pinout • Multimeters ISL6294 (8 LD DFN) TOP VIEW • Function generator • Oscilloscope • Cables and wires VIN 1 8 BAT PPR 2 7 IREF CHG 3 6 IMIN EN 4 5 GND 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1169 Quick Setup Guide (Refer to Figure 1) Step 4: Verify that jumper shunts JP5 and JP7 are not inserted DO NOT APPLY POWER UNTIL STEP 5 Step 5: Turn on Power Supplies and DC electronic load Step 6: Step 1: Connect a 5V supply PS1 to VIN with the current limit set at 1.2A The green LED should be on, indicating normal charging operation Step 7: Step 2: Connect a 3.7V supply PS2 to VBAT with the current limit set at 1.2A The current meter I2 in series with PS2 should read about 0.25A as the charging current Step 8: Insert a jumper shunt on JP5 and the current meter I2 should read about 0.5A Step 9: Insert a jumper shunt on both JP5 and JP7 and the current meter I2 should read Step 3: Connect the DC electronic load of 1.0A to BAT FIGURE 1. CONNECTION OF INSTRUMENTS 2 AN1169.1 November 28, 2006 Application Note 1169 Detailed Description The ISL6294EVAL1Z is a complete evaluation platform addressing all datasheet specifications and functionalities. The jumpers on the board facilitate the programming of the charge current, different charging conditions, and can be used to make other necessary connections, such as current measurement. Jumpers JP1 - Connects the EN pin to a pull-up voltage or GND. The pull-up voltage is either the BAT voltage (When a shunt is installed on JP3) an external 3.3V power source (when the shunt on JP3 is removed and a +3.3V supply is connected to the upper pin of JP3). If there is no shunt installed on JP1, the EN pin is internally pulled down to logic LOW, which enables the charger. If a shunt is installed across the two jumper pins labeled as “Enable”, the EN pin is driven to logic LOW, the charger is enabled, same as floating. If the shunt is installed across the two jumper pins labeled as “Disable” and the pull-up voltage is above 2V, the EN pin is driven to logic HIGH, which disables the charger. JP4 - Parallels an additional 487k resistor to the IMIN pin, such that the End-of-Charge Current will be increased to 43mA (RIMIN is 487k and the EOC current is 20mA without the shunt). JP5 - Parallels an additional 48.7k resistor to the IREF pin, such that the Cradle charge current will be increased by 0.25A (RIREF is 48.7k and the charge current is 250mA if the shunts on both JP5 and JP7 are removed). JP6 - A shunt installed on JP6 connects the BAT pin to the output connector J2 if output current measurement is not needed. The shunt can be replaced by a current meter if output current measurement is needed. JP7 - Parallels an additional 48.7k resistor to the IREF pin, such that the Cradle charge current will be increased by another 0.25A. TABLE 1. JUMPER SETTINGS JUMPER JP1 JP2 - A shunt installed on JP2 connects the input source from connector J1 to the circuit if input current measurement is not needed. The shunt can be replaced by a current meter if input current measurement is needed. JP3 - Selects the power source for logic pull-up and the LEDs supply. If a shunt is installed, the BAT voltage is selected as the power source. If the shunt is removed, an external power supply of +3.3V can be connected from the upper pin to GND to provide the pull-up and LEDs supply. This purpose is to exclude the extra current through the charger when characterizing small currents such as EOC and quiescent currents. 3 POSITION FUNCTION EN = HIGH Charger disabled EN = GND Charger enabled Shunt not installed Charger enabled JP2 Shunt installed Connect input source to VIN JP3 Shunt installed Select BAT as the pull-up source JP4 Shunt installed Set EOC current to 43mA JP5 Shunt installed Add 0.25A to charging current JP6 Shunt installed Connects BAT to J2 JP7 Shunt installed Add 0.25A to charging current AN1169.1 November 28, 2006 Application Note 1169 Board Layout Information VIN GND1 2 1 C1 4.7µF R1 470 D2 RED EN R2 470 C6 47µF 2 1 ENABLE J2 2 CHG PPR C2 C4 0.1µF 1µF 1 2 3 4 U1 VIN PPR CHG EN BAT IREF IMIN GND 8 7 6 5 IMIN IREF 1 DFN/2x3/ISL6294 R3 487k R4 48.7k JP5 1 JP4 DISABLE JP1 2 C7 47µF R5 487k 2 D1 GREEN C8 1µF JP3 C5 47µF JP6 JP6 1 1 C3 10µF 2 JP2 V_BAT 2 1 1 2 1 2 3 J1 GND2 R6 48.7k R7 48.7k FIGURE 2. SCHEMATIC OF PCB BOARD 4 AN1169.1 November 28, 2006 Application Note 1169 TABLE 2. ISL6294EVAL1Z BILL OF MATERIALS (BOM) ITEM QTY REFERENCE PART DESCRIPTION 1 1 U1 2 2 R1, R2 470Ω, 5%, 1/8Ω Resistor 3 1 R3 4 1 5 ISL6294 Charger PCB FOOTPRINT 2x3 DFN PART NUMBER VENDOR ISL6294 Intersil 0805 ERJ-6GEYJ471V Panasonic 487k, 1%, 1/16Ω Resistor 0402 ERJ-2RKF4873X Panasonic R4 48.7k,1%, 1/16Ω Resistor 0402 ERJ-2RKF4872X Panasonic 1 R5 487k, 1%, 1/8Ω Resistor 0805 ERJ-6ENF4873V Panasonic 6 1 R6 48.7k, 1% 1/8Ω Resistor 0805 ERJ-6ENF4872V Panasonic 8 1 C1 4.7µF, 35V, Tantalum ECS-T1VC475R Panasonic 9 1 C2 0.1µF, 50V, X7R Ceramic 0603 C1608X7R1H104K TDK 10 1 C3 10µF, 6.3V, Tantalum 0603 ECS-T0JY106R Panasonic 11 2 C4, C8 1.0µF, 6.3V, X5R Ceramic 0603 ECJ-1VB0J105K Panasonic 12 3 C5, C6, C7 47µF, 6.3V, X5R Ceramic 1210 ECJ-4YB0J476M Panasonic 13 2 J1, J2 2.54mm Center Header, 2 CKT 22-11-2022 Molex 14 3 VIN, VBAT Test point, Red 5010 Keystone 15 5 5014 Keystone 16 3 GND1, GND2, GND3 Test point, Black 5011 Keystone 17 5 JP2, JP3, JP4, JP5, JP6 2.54mm header, 2 CKT 22-28-4020 Molex 18 2 JP1 2.54mm header, 3 CKT 22-28-4030 Molex 19 1 D1 Green LED 0805 SML-LXT0805GW-TR Lumex Opto 20 1 D2 Red LED 0805 SML-LXT0805IW-TR Lumer Opto EN, CHG, PPR, IREF, IMIN Test point, Yellow 5 AN1169.1 November 28, 2006 Application Note 1169 PCB Layout SILK LAYER TOP LAYER 6 AN1169.1 November 28, 2006 Application Note 1169 = BOTTOM LAYER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 7 AN1169.1 November 28, 2006