ISL6299AEVAL1 Evaluation Board Application Manual ® Application Note August 16, 2005 AN1170.1 Description Features The ISL6299AEVAL1 is an evaluation tool for the ISL6299A single-cell Li-ion battery charger. The evaluation tool provides a complete evaluation platform addressing all datasheet specifications and functionality. The jumpers on the board facilitate the programming of the charge current, different charging conditions, and can be used to make other necessary connections, such as current measurement. • A Complete Evaluation Platform for the ISL6299A Charger The ISL6299A is a dual input, fully integrated single-cell Li-ion battery charger. The ISL6299A charger accepts two input sources: one from a USB port and the other from a desktop cradle. The cradle input accepts input voltages ranging from 4.5V up to 28V. Due to the high voltage capability, the components associated with the cradle input circuit on the evaluation board are good for a 28V supply. The charger’s USB input and the associated components on the evaluation board are good for a maximum 6V input. • USB Port On Board Accepts Power Directly From USB Cable The components assembled in the center square constitute a complete charger, indicating the space saving advantage of the typical ISL6299A installation in space-limited applications. • On-Board LEDs for Input PPR and CHG State Indication Ordering Information • Power supplies: 1) PS1: DC 30V/2A 2) PS2: DC 10V/2A 3) PS3: DC 10V/2A • DC Electronic load: 20V/2A PART # DESCRIPTION ISL6299AEVAL1 Evaluation Board for ISL6299A Pinout • The Center Square Suggesting the Space Saving Advantage of the Typical Components Assembly • Cradle Input Accepts Voltage up to 28V • Flexible Power Connectors Each with a Hook and a Solder Pad Providing Variety to Users • Convenient Jumpers for Programming the Charge Current, Charge Mode, and for Current Measurement • 3.5 x 2.5 Square Inches Board Size Handy for Evaluation • Thermal Vias in the Thermal Pad Similar To Customers’ Thermally Enhanced Environment What is Needed The following instruments will be needed to perform testing: • Multimeters • Function generator CRDL 1 10 BAT USB 2 9 ICDL PPR 3 8 GND CHG 4 7 USBON EN 5 6 IMIN 1 • Oscilloscope • Cables and wires CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1170 Quick Setup Guide (Refer to Figure 1) DO NOT APPLY POWER UNTIL STEP 5 For Cradle Input: For USB Input: Step 1: Connect a 5V supply PS1 to CRDL input (J1, upper +) with the current limit set at 1.3A Step 1: Connect a 5V supply PS2 to USB with the current limit set at 0.7A Step 2: Connect a 3.7V supply PS3 to BAT output (J2, upper +) with the current limit set at 1.3A Step 2: Connect a 3.7V supply PS3 to BAT (upper +) with the current limit set at 0.7A Step 3: Connect a current meter to JP6 as shown in Figure 1 Step 3: Connect the dc electronic load of 0.6A to BAT (upper +) Step 4: Connect the dc electronic load of 1.2A to BAT (J2, upper +) Step 4: Install a jumper shunt on JP 8 to USBON position Step 5: Insert a jumper shunt on JP2 and JP3, all other jumper shunts are not installed Step 5: Step 6: Turn on Power Supplies and dc electronic load, adjust the power supply PS3 such that the voltmeter V2 reads 3.7V Turn on Power Supplies and dc electronic load, adjust the power supply PS3 such that the voltmeter V2 reads 3.7V Step 6: Both the red and the green LEDs should be on, indicating power on and charging condition Step 7: Both the red and the green LEDs should be on, indicating power on and charging condition Step 7: The current meter I2 should read about 0.38A charging current Step 8: The current meter I2 should read about 0.26A as the charging current Step 8: Step 9: Insert a jumper shunt on JP5 and the current meter I2 should read about 0.55A charging current Remove the jumper shunt on JP3 and apply a 3.3V supply, positive to pin 1 (at the right) of JP3, negative to GND Step 9: Slowly reduce the electronic load current until the green LED turns off, the current meter I2 should read about 75mA EOC current Step 10: Insert a jumper shunt on both JP5 and JP7, the current meter I2 should read about 0.95A charging current Step 11: Remove the jumper shunt on JP3 and apply a 3.3V supply, positive to pin 1 (at the right) of JP3, negative to GND Step 12: Slowly reduce the dc electronic load current until the green LED turns off, the current meter I2 should read about 84mA EOC current Step 13: Insert a jumper shunt on JP4 and repeat Step 11, the current meter I2 should read 40mA EOC current 2 AN1170.1 August 16, 2005 Application Note 1170 I1 I2 PS1 - PS3 + + - PS2 - + + - E -lo a d FIGURE 1. CONNECTION OF INSTRUMENTS 3 AN1170.1 August 16, 2005 Application Note 1170 Description of Jumper Settings JP1 - Connects the EN pin to a pull-up voltage or GND. The pull-up voltage is either the BAT voltage (When a shunt is installed on JP3) or an external 3.3V power source (when the shunt on JP3 is removed and a +3.3V supply is connected to pin 1(at the right) of JP3. If there is no shunt installed on JP1, the EN pin is internally pulled down to logic LOW, which enables the charger. If a shunt is installed across the two jumper pins labeled as “Enable”, the EN pin is driven to logic LOW, the charger is enabled, same as floating. If the shunt is installed across the two jumper pins labeled as “Disable” and the pull-up voltage is above 2V, the EN pin is driven to logic HIGH, which disables the charger. JP2 - A shunt installed on JP2 connects the input source from connector J1 to the circuit if input current measurement is not needed. The shunt can be replaced by a current meter if input current measurement is needed, as shown in Figure 1. JP7 - Parallels an additional 57.6K resistor to the ICDL pin (total RICDL = 19.2K), such that the cradle charge current will be increased to 0.95A. JP8 - ON/OFF control for USB input. Install a jumper shunt on USB OFF position to turn off the USB charge but has no impact on the cradle input charge. JP9 - A shunt installed on JP9 connects the input source from the USB port connector to the USB pin if a USB port is used for the evaluation. TABLE 1. JUMPER SETTING SUMMARY JUMPER JP1 POSITION FUNCTION Shunt on Disable Charger disabled Shunt on Enable Charger enabled Shunt not installed Charger enabled Shunt installed Connects input source at J1 to CRDL pin JP2 JP3 - Selects the power source for logic pull-up and the LED supply. If a shunt is installed, the BAT voltage is selected as the power source. If the shunt is removed, an external power supply of +3.3V can be connected from Pin1 (at the right) to GND to provide the pull-up and LED supply power. The purpose is to exclude the extra current through the charger when characterizing small currents such as EOC and quiescent currents. JP3 Shunt installed Select BAT as the pull-up source JP4 Shunt installed Sets CRDL EOC current to 84mA Shunt installed Sets CRDL charging current to 0.55A, if shunt on JP7 is not installed Shunt installed Connects BAT to J2 Shunt installed JP4 - Parallels an additional 316K resistor to the IMIN pin (total RIMIN = 158K), such that the End-of-Charge Current will be increased to 84mA (RIMIN is 316K and the EOC current is 40mA without the shunt). JP7 Sets CRDL charging current to 0.95A, if shunt on JP5 is also installed JP5 - Parallels an additional 57.6K resistor to the ICDL pin (total RICDL = 28.8K), such that the cradle charge current will be increased to 0.55A (RIREF is 57.6K and the charge current is 0.26A if the shunts on both JP5 and JP7 are removed). JP5 JP6 Shunt on USB OFF Turns off USB charge JP8 Shunt on USB ON Turns on USB charge Shunt not installed Turns off USB charge JP9 Shunt installed Connects input source from USB port connector to USB pin JP6 - A shunt installed on JP6 connects the BAT pin to the output connector J2 if output current measurement is not needed. The shunt can be replaced by a current meter if output current measurement is needed as shown in Figure 1. 4 AN1170.1 August 16, 2005 Application Note 1170 Board Design CRDL GND1 GND2 VBAT 1 1 1 1 Schematic JP6 JP2 J1 1 2 1 2 2 C1 4.7uF C3 10uF C2 C5 47uF C6 47uF 1 2 1 J2 C7 47uF C4 USB 1 0.1uF JP9 1 0.1uF JP3 IMIN 3 4 5 D1 D2 CRDL 10 BAT USB ICDL PPR GND CHG 9 8 7 USBON EN 6 IMIN ISL6299A/3x3C DFN 1uF JP4 JP5 JP7 R3 R4 R5 R6 R7 57.6K 316K 316K 57.6K 57.6K 1 2 3 USBON 1 500 PPR 1 2 3 R2 500 CHG 1 R1 EN 1 PWR 1 CHG 1 2 2 1 1 U1 C8 ICDL 2 1 1 USB Type B 2 C10 4.7uF 1 2 2 1 2 3 4 1 J3 1uF C9 JP1 JP8 DISABLE ENABLE USB ON USB OFF FIGURE 2. SCHEMATIC 5 AN1170.1 August 16, 2005 Application Note 1170 TABLE 2. ISL6299AEVAL1 BILL OF MATERIALS ITEM QTY REFERENCE 1 1 U1 2 2 R1, R2 3 1 4 PART DESCRIPTION ISL6299A Charger IC PCB FOOTPRINT 3x3C DFN PART NUMBER VENDOR ISL6299A Intersil 470Ω, 5%, 1/8W Resistor 0805 ERJ-6GEYJ471V Panasonic R3 57.6K, 1%, 1/16W Resistor 0402 ERJ-2RKF5762X Panasonic 1 R4 316K,1%, 1/16W Resistor 0402 ERJ-2RKF3163X Panasonic 5 1 R5 316K, 1%, 1/8W Resistor 0805 ERJ-6ENF3163V Panasonic 6 2 R6, R7 57.6K, 1% 1/8W Resistor 0805 ERJ-6ENF5762V Panasonic 7 2 C1, C10 4.7µF, 35V, Tantalum 6032 ECS-T1VC475R Panasonic 8 2 C2, C9 0.1µF, 50V, X7R Ceramic 0603 C1608X7R1H104K TDK 9 1 C3 10µF, 6.3V, Tantalum 0603 ECS-T0JY106R Panasonic 10 2 C4, C8 1.0µF, 6.3V, X5R Ceramic 0603 ECJ-1VB0J105K Panasonic 11 3 C5, C6, C7 47µF, 6.3V, X5R Ceramic 1210 ECJ-4YB0J476M Panasonic 12 2 J1, J2 2.54mm Center Header, 2ckt 22-11-2022 Molex 13 3 CRDL, USB, VBAT Test point, Red 5010 Keystone 14 6 EN, CHG, PPR, IMIN, USBON, ICDL Test point, Yellow 5014 Keystone 15 4 GND1, GND2, GND3, GND4 Test point, Black 5011 Keystone 16 7 JP2, JP3, JP4, JP5, JP6, JP7, JP9 2.54mm header, 2ckt 22-28-4020 Molex 17 2 JP1, JP8 2.54mm header, 3ckt 22-28-4030 Molex 18 1 D1 Green LED 0805 SML-LXT0805GW-TR Lumex Opto 19 1 D2 Red LED 0805 SML-LXT0805IW-TR Lumex Opto 20 1 J3 Type B, Female, USB 787780-1 Tyco Elec 6 AN1170.1 August 16, 2005 Application Note 1170 PCB Layout SILK LAYER TOP LAYER 7 AN1170.1 August 16, 2005 Application Note 1170 = BOTTOM LAYER All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 AN1170.1 August 16, 2005