ISL9105EVAL1Z Evaluation Board Application Manual ® Application Note August 3, 2007 AN1346.0 Description Features The ISL9105EVAL1Z is an evaluation kit for the ISL9105 1.6MHz 600mA low quiescent current, high efficiency integrated step-down regulator. The ISL9105 is capable of delivering up to 600mA output current with an output voltage range of 0.8V to ~VIN. The output voltage is set by two voltage divider resistors of R2 and R3 on the board. The default output voltage is set to be 1.6V on the evaluation board and can be modified by changing the R2 value. • A Complete Evaluation Platform for ISL9105 The complete ISL9105 regulator is located at the center of the board. On the left side of the board are the connectors for the input power source (J1 VIN; J2 GND). The output connectors are located on the right side (J4 VO; J5 GND). The other two test points are for the POR (J3) and RSI (J6) signals respectively, as labelled on the board. The RSI input needs either be driven to a low or a high logic input (Please refer to the ISL9105 datasheet, FN6415 for more details regarding RSI function). Do not leave the RSI input signal floating. The open-drain POR signal is pulled up to the VIN through a 100kΩ resistor (R1). Jumper JP1 allows the user to enable or disable the IC. Jumper JP2 is the mode selection input. Do not leave the EN or the MODE signal floating. The evaluation board also offers one oscilloscope probe tip connector connected to PHASE pin to minimize the switching noise during the evaluation. One test point (labeled as FB) is connected to the FB pin on the board in order to monitor the FB voltage. • Power supplies: DC 10V/1A The evaluation board schematic, layout and bill-of-materials (BOM) can be found at the end of this application note. NOTE: The output voltage can be set to other values by changing the R2 value, VOUT = 0.8V*(1+R2/R3). ISL9105EVAL1Z • Pb-Free Plus Anneal Available (RoHS Compliant) What is Needed The following instruments will be needed to perform testing: • DC Electronic load: 10V/1A • Multimeters • Function generator • Oscilloscope • Cables and wires Specifications Table 1 shows the recommended operation conditions for using the ISL9105EVAL1Z. TABLE 1. RECOMMENDED OPERATION CONDITIONS PARAMETER Input Voltage Output Voltage (Note) Maximum Output Current MIN TYP MAX UNIT 2.7 - 5.5 V - 1.6 - V 600 - - mA The following are steps for setting up the evaluation board: DESCRIPTION Evaluation Board for ISL9105 Pinout ISL9105 8 LD DFN TOP VIEW VIN 1 8 PHASE EN 2 7 GND POR 3 6 FB MODE 4 5 RSI 1 • 2.0x1.6 Square Inches Board Size Handy for Evaluation Evaluation Board Setup Ordering Information PART NUMBER • Convenient Jumpers for Enable/Disable, Operation Mode Selection 1. Connect Jumper JP1 at the position of “Enable” to enable the device. Connect JP1 at the position of “Disable“ will disable the device. 2. Connect Jumper JP2 either at the position of “SKIP” or “Forced PWM”. With JP2 connected at the position of “SKIP”, the device enters skip mode under light load condition; with JP2 connected at the position of “FORCED PWM”, the device always operates under PWM mode regardless of the load condition. 3. Connect the RSI input to either ground or VIN. Do not leave it floating. Please refer to the ISL9105 datasheet, FN6415 for more details regarding the function of RSI. 4. Connect a DC power supply with voltage range of 2.7V to ~ 5.5V to VIN (J1) and GND (J2) connectors. Make sure the power supply has enough supply current capability. Do not adjust the VIN higher than the recommended maximum supply voltage (5.5V). 5. Connect the output to a load (resistor or electronic load). 6. Turn on the input power supply and evaluate the device. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1346 PS A1 ENABLE A2 E-LOAD V2 V1 DISABLE SKIP FORCED PWM FIGURE 1. ISL9105EVAL1Z PCB ISL9105EVAL1Z Schematic TP1 PHASE U1 VDD 1 VIN 2 C1 10µF/6.3V 100k EN R1 3 GND POR 4 FB MODE RSI L1 8 J4 VO 4.7µH 7 6 TP2 FB C2 4.7µF/6.3V R2 100k C3 5 R3 100k VDD 1 ISL9105 3 J3 POR PHASE J5 GND 2 2 JP2 JP1 1 3 J1 VIN J6 RSI J2 GND FIGURE 2. ISL9105EVAL1Z SCHEMATIC 2 AN1346.0 August 3, 2007 Application Note 1346 ISL9105EVAL1Z Bill of Materials (BOM) PART DESCRIPTION PCB FOOTPRINT ITEM QTY REFERENCE PART NUMBER 1 1 U1 ISL9105 2 1 C1 Capacitor, SMD, 10µF/6.3V, 10%, X5R 0603 GRM188R60J106 Murata 3 1 C2 Capacitor, SMD, 4.7µF/6.3V, 10%, X5R 0603 GRM188R60J475K Murata 4 1 C3 Capacitor, not populated 0603 N/A N/A 5 3 R1, R2, R3 100kΩ,1%, SMD Resistor 0603 RC0603FR-07100KL Yageo 6 1 L1 7 6 J1-J6 8 1 9 10 2x3 8 Ld DFN ISL9105 VENDOR Intersil Inductor, 4.7µH - LPS3015-472ML Coilcraft Turrent Terminal Pin - 3156-1-00-15-00-00-08-0 Mill-Max TP1 Scope Probe Test Point - 131503100 Tektronix 1 TP2 Test Point, Yellow - 5014 Keystone Electronics 2 JP1, JP2 Connect Header, 1X3 - 68000-236-1X3 BERG/FCI PCB Layout FIGURE 3. SILK LAYER FIGURE 4. TOP LAYER FIGURE 5. BOTTOM LAYER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 3 AN1346.0 August 3, 2007