CCD area image sensors S7033/S7034 series Back-thinned FFT-CCD The S7033/S7034 series are families of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications. The S7033/S7034 series feature large full-well capacity in horizontal CCD register. By using the binning operation, the S7033/S7034 series can be used as a linear image sensor having a long height. This makes the S7033/S7034 series suited for use in spectrophotometry. The binning operation offers significant improvement in S/N and signal processing speed compared with conventional methods by which signals are digitally added by an external circuit. The S7033/S7034 series have an effective pixel size of 24 × 24 μm and are available in image areas ranging from 12.288 (H) × 2.928 (V) mm2 (S7033-0907, S7034-0907S) up to a large image area of 24.576 (H) × 2.928 (V) mm2 (S7033-1007, S7034-1007S). Either one-stage or two-stage thermoelectric cooler is built into the package (S7034/S7035 series). At room temperature operation, the device can be cooled down to -10 °C by one-stage cooler and -30 °C by two-stage cooler respectively without using any other cooling technique. In addition since both the CCD chip and the thermoelectric cooler are hermetically sealed, no dry air is required, thus allowing easy handling. Features Applications Line, pixel binning Fluorescence spectrometer, ICP Greater than 90 % quantum efficiency at peak sensitivity wavelength Wide spectral range Industrial inspection requiring Wide dynamic range Semiconductor inspection DNA sequencer Low-light-level detection MPP operation Built-in thermoelectric cooler (S7034/S7035 series) Selection guide Type No. S7033-0907 S7033-1007 S7034-0907S S7034-1007S Cooling Non-cooled One-stage TE-cooled Number of total pixels 532 × 128 1044 × 128 532 × 128 1044 × 128 Number of active pixels 512 × 122 1024 × 122 512 × 122 1024 × 122 Active area Suitable multichannel [mm (H) × mm (V)] detector head 12.288 × 2.928 C7043 24.576 × 2.928 12.288 × 2.928 C7044 24.576 × 2.928 Note: Two-stage TE-cooled type (S7035 series) is also available. General ratings Parameter Pixel size Vertical clock phase Horizontal clock phase Output circuit Package Built-in cooler Window *1 S7033 series S7034 series 24 (H) × 24 (V) μm 2 phase 2 phase One-stage MOSFET source follower 24 pin ceramic DIP (refer to dimensional outlines) One-stage Quartz glass AR-coated sapphire *1: Temporary window type (e.g. S7033-0907N) is available upon request. www.hamamatsu.com 1 CCD area image sensors S7033/S7034 series Absolute maximum ratings (Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Operating temperature *2 Topr -50 +50 °C Storage temperature Tstg -50 +70 °C OD voltage VOD -0.5 +25 V RD voltage VRD -0.5 +18 V ISV voltage VISV -0.5 +18 V ISH voltage VISH -0.5 +18 V IGV voltage VIG1V, VIG2V -10 +15 V IGH voltage VIG1H, VIG2H -10 +15 V SG voltage VSG -10 +15 V OG voltage VOG -10 +15 V RG voltage VRG -10 +15 V TG voltage VTG -10 +15 V Vertical clock voltage VP1V, VP2V -10 +15 V Horizontal clock voltage VP1H, VP2H -10 +15 V *2: Chip temperature Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings. Operating conditions (MPP mode, Ta=25 °C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Substrate voltage Test point (vertical input source) Test point (horizontal input source) Test point (vertical input gate) Test point (horizontal input gate) High Vertical shift register clock voltage Low High Horizontal shift register clock voltage Low High Summing gate voltage Low High Reset gate voltage Low High Transfer gate voltage Low External load resistance Symbol VOD VRD VOG VSS VISV VISH VIG1V, VIG2V VIG1H, VIG2H VP1VH, VP2VH VP1VL, VP2VL VP1HH, VP2HH VP1HL, VP2HL VSGH VSGL VRGH VRGL VTGH VTGL RL Min. 18 11.5 1 -9 -9 4 -9 4 -9 4 -9 4 -9 4 -9 20 Typ. 20 12 3 0 VRD VRD -8 -8 6 -8 6 -8 6 -8 6 -8 6 -8 22 Max. 22 12.5 5 0 0 8 -7 8 -7 8 -7 8 -7 8 -7 24 Unit V V V V V V V V Typ. 0.25 1500 3000 260 300 30 30 60 80 0.99999 15 2 13 Max. 1 18 3 14 Unit MHz V V V V V kΩ Electrical characteristics (Ta=25 °C) Parameter Signal output frequency Symbol fc Min. S703*-0907(S) CP1V, CP2V Vertical shift register capacitance S703*-1007(S) S703*-0907(S) Horizontal shift register CP1H, CP2H capacitance S703*-1007(S) Summing gate capacitance CSG Reset gate capacitance CRG S703*-0907(S) Transfer gate capacitance CTG S703*-1007(S) Charge transfer efficiency *3 CTE 0.99995 Vout 12 DC output level *4 Zo Output impedance *4 P Power consumption *4 *5 *3: Charge transfer efficiency per pixel, measured at half of the full well capacity *4: The values depend on the load resistance. (Typ. VOD=20 V, Load resistance=22 kΩ) *5: Power consumption of the on-chip amplifier plus load resistance pF pF pF pF pF V kΩ mW 2 CCD area image sensors S7033/S7034 series Electrical and optical characteristics (Ta=25 °C, unless otherwise noted) Parameter Saturation output voltage Symbol Vsat Vertical Horizontal *6 Full well capacity Fw CCD node sensitivity Sv 25 °C 0 °C Dark current *7 (MPP mode) DS Nr Readout noise *8 Line binning Area scanning Dynamic range *9 Photo response non-uniformity Spectral response range Point defect *11 Blemish DR PRNU λ *10 White spot Black spot - Cluster defect *12 column defect *13 Min. 240 2700 0.5 90000 8000 - Typ. Fw × Sv 320 3400 0.6 100 10 30 113300 10700 ±3 200 to 1100 - Max. 1000 100 45 ±10 0 10 3 0 Unit V keμV/ee-/pixel/s e- rms % nm - *6: The linearity is ±1.5 %. *7: Dark current nearly doubles for every 5 to 7 °C increase in temperature. *8: Operating frequency is 150 kHz. *9: Dynamic range (DR)=Full well/Readout noise *10: Measured at the half of the full well capacity output. Photo response non-uniformity (PRNU) = Fixed pattern noise (peak to peak) Signal × 100 [%] *11: White spots Pixels whose dark current is higher than 1 ke- after one-second integration at 0 °C. Black spots Pixels whose sensitivity is lower than one-half of the average pixel output. (Measured with uniform light producing one-half of the saturation charge) *12: 2 to 9 contiguous defective pixels *13: 10 or more contiguous defective pixels Spectral response (without window) *14 (Typ. Ta=25 °C) 100 90 Back-thinned CCD Quantum efficiency (%) 80 70 60 50 40 30 20 Front-illuminated CCD (UV coated) Front-illuminated CCD 10 0 200 400 600 800 1000 1200 Wavelength (nm) KMPDB0058EB *14: Spectral response with quartz glass or sapphire are decreased by the transmittance. 3 CCD area image sensors S7033/S7034 series Spectral transmittance characteristics of window material (Typ. Ta=25 °C) 100 90 80 Transmittance (%) Quartz window 70 AR-coated sapphire 60 50 40 30 20 10 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 Wavelength (nm) KMPDB0101EA Window material S7033 series S7034 series S7035 series (two-stage TE-cooled type) *15: Resin sealing *16: Hermetic sealing Window material Quartz glass *15 (option: window-less) AR-coated sapphire *16 (option: window-less) AR-coated sapphire *16 (option: window-less) (Typ.) 1000 100 Dark current (e-/pixel/s) Type No. Dark current vs. temperature 10 1 0.1 0.01 -50 -40 -30 -20 -10 0 10 20 30 Temperature (°C) KMPDB0256EA 4 CCD area image sensors S7033/S7034 series Device structure (conceptual drawing of top view in dimensional outlines) Effective pixels Thinning Effective pixels 23 21 15 20 13 14 24 1 n H 2 5 4 3 2 12345 4-bevel Thinning V signal out 2-bevel 22 12 2 Horizontal shift register 3 4 5 4 blank pixels 8 2 n 11 V=122 H=512, 1024 10 9 4 blank pixels signal out Horizontal shift register 6-bevel 6-bevel Note: When viewed from the direction of the incident light, the horizontal shift register is covered with a thick silicon layer (dead layer). However, long-wavelength light passes through the silicon dead layer and may possibly be detected by the horizontal shift register. To prevent this, provide light shield on that area as needed. KMPDC0076EB 5 CCD area image sensors S7033/S7034 series Timing chart Line binning Integration period (Shutter must be open.) Vertical binning period (Shutter must be closed.) Tpwv 1 2 3..126 P1V 127 Readout period (Shutter must be closed.) 128← 122 + 6 (BEVEL) Tovr P2V, TG 1 532 : S703*-0907 1044: S703*-1007 4..530 531 4..1042 1043 Tpwh, Tpws P1H 2 3 P2H, SG Tpwr RG OS D1 D2 S1..S512 D19 D3..D10, S1..S1024, D11..D18 D20: S703*-0907 : S703*-1007 KMPDC0128EA P1V, P2V, TG *17 P1H, P2H *17 SG RG TG–P1H Parameter Pulse width Rise and fall time Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Overlap time Symbol Tpwv Tprv, Tpfv Tpwh Tprh, Tpfh Tpws Tprs, Tpfs Tpwr Tprr, Tpfr Tovr Min. 6 *18 10 500 10 500 10 100 5 3 Typ. 8 2000 50 2000 50 - Max. - Unit μs ns ns ns % ns ns % ns ns μs *17: Symmetrical clock pulses should be overlapped at 50 % of maximum amplitude. *18: In case of the S7033-1007, S7034-1007S 6 CCD area image sensors S7033/S7034 series Area scanning (large full well mode) Integration period (Shutter must be open.) Readout period (Shutter must be closed.) Tpwv 1 2 4..127 128←122 + 6 (Bevel) 3 P1V P2V, TG P1H P2H, SG RG OS Tovr P2V, TG Enlarged view Tpwh, Tpws P1H P2H, SG Tpwr RG OS D1 D2 D3 S1..S512 D4 D18 D5..D10, S1..S1024, D11..D17 D19 D20: S703*-0907 : S703*-1007 KMPDC0130EA P1V, P2V, TG *19 P1H, P2H *19 SG RG TG-P1H Parameter Pulse width Rise and fall time Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Overlap time Symbol Tpwv Tprv, Tpfv Tpwh Tprh, Tpfh Tpws Tprs, Tpfs Tpwr Tprr, Tpfr Tovr Min. 6 *20 10 500 10 500 10 100 5 3 Typ. 8 2000 50 2000 50 - Max. - Unit μs ns ns ns % ns ns % ns ns μs *19: Symmetrical pulses should be overlapped at 50 % of maximum amplitude. *20: In case of the 7033-1007, S7034-1007S 7 CCD area image sensors S7033/S7034 series Dimensional outlines (unit: mm) S7033-1007 Window 28.6 * Active area 12.288 Active area 24.576 22.4 ± 0.3 8.2 * 22.4 ± 0.3 8.2 * 22.9 ± 0.3 2.928 2.928 Window 16.3 * 2.54 ± 0.13 2.54 ± 0.13 44.0 ± 0.34 34.0 ± 0.34 Index mark 1st pin Index mark 1st pin 22.9 ± 0.3 S7033-0907 Photosensitive surface 4.8 ± 0.49 4.4 ± 0.44 3.8 ± 0.44 (24 ×) 0.5 ± 0.05 2.4 ± 0.15 4.8 ± 0.49 4.4 ± 0.44 3.8 ± 0.44 * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph KMPDA0081EC KMPDA0080EC S7034-1007S Window 28.6 * Active area 12.288 Active area 24.576 4.0 19.0 8.2 * 22.9 ± 0.3 22.4 ± 0.3 4.0 19.0 8.2 * 2.928 2.928 Window 16.3 * 2.54 2.54 44.0 ± 0.44 42.0 52.0 50.0 ± 0.3 60.0 ± 0.3 7.7 1.0 3.0 7.7 ± 0.68 7.3 ± 0.63 6.7 ± 0.63 (24 ×) 0.5 ± 0.05 4.8 ± 0.15 TE-cooler 1.0 3.0 TE-cooler Photosensitive surface 7.3 Index mark 1st pin 6.7 Photosensitive surface 4.8 34.0 ± 0.34 Index mark 1st pin 22.9 ± 0.3 S7034-0907S 22.4 ± 0.3 (24 ×) 0.5 ± 0.05 2.4 ± 0.15 3.0 3.0 Photosensitive surface (24 ×) 0.5 ± 0.05 * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph KMPDA0083ED KMPDA0082ED 8 CCD area image sensors S7033/S7034 series Pin connections S7033 series S7034 series Pin No. Symbol Function Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 RD OS OD OG SG P2H P1H IG2H IG1H ISH TG *21 P2V P1V SS ISV IG2V IG1V RG Reset drain Output transistor source Output transistor drain Output gate Summing gate RD OS OD OG SG P2H P1H IG2H IG1H ISH TG *21 P2V P1V Th1 Th2 PP+ SS ISV IG2V IG1V RG Reset drain Output transistor source Output transistor drain Output gate Summing gate CCD horizontal register clock-2 CCD horizontal register clock-1 Test point (horizontal input gate-2) Test point (horizontal input gate-1) Test point (horizontal input source) Transfer gate CCD vertical register clock-2 CCD vertical register clock-1 Substrate (GND) Test point (vertical input source) Test point (vertical input gate-2) Test point (vertical input gate-1) Reset gate Remark (standard operation) +12 V RL=22 kΩ +20 V +3 V Same pulse as P2H CCD horizontal register clock-2 CCD horizontal register clock-1 Test point (horizontal input gate-2) Test point (horizontal input gate-1) Test point (horizontal input source) Transfer gate CCD vertical register clock-2 CCD vertical register clock-1 Thermistor Thermistor TE-coolerTE-cooler+ Substrate (GND) Test point (vertical input source) Test point (vertical input gate-2) Test point (vertical input gate-1) Reset gate -8 V -8 V Connect to RD Same pulse as P2V GND Connect to RD -8 V -8 V *21: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V. Specifications of built-in TE-cooler (Typ.) Parameter Internal resistance Maximum current *22 Maximum voltage Maximum heat absorption *25 Maximum temperature of heat radiating side Symbol Condition Rint Ta=25 °C Imax Tc *23=Th *24=25 °C Vmax Tc *23=Th *24=25 °C Qmax - S7034-0907S 2.5 1.5 3.8 3.4 S7034-1007S 1.2 3.0 3.6 5.1 Unit Ω A V W 70 70 °C *22: If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable operation, the supply current should be less than 60 % of this maximum current. *23: Temperature of the cooling side of thermoelectric cooler *24: Temperature of the heat radiating side of thermoelectric cooler *25: This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum current is supplied to the unit. 9 CCD area image sensors S7033/S7034 series S7034-0907S (Typ. Ta=25 °C) Voltage vs. current CCD temperature vs. current Voltage (V) 6 30 20 5 10 4 0 3 -10 2 -20 1 -30 0 0 0.5 1.0 1.5 Current (A) CCD temperature (°C) 7 -40 2.0 KMPDB0178EA S7034-1007S (Typ. Ta=25 °C) Voltage vs. current CCD temperature vs. current Voltage (V) 6 30 20 5 10 4 0 3 -10 2 -20 1 -30 0 0 1 2 3 4 CCD temperature (°C) 7 -40 Current (A) KMPDB0179EA 10 CCD area image sensors S7033/S7034 series Specifications of built-in temperature sensor A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation between the thermistor resistance and absolute temperature is expressed by the following equation. Resistance The characteristics of the thermistor used are as follows. R298=10 kΩ B298/323=3450 K (Typ. Ta=25 °C) 1 MΩ RT1 = RT2 × exp BT1/T2 (1/T1 - 1/T2) RT1: resistance at absolute temperature T1 [K] RT2: resistance at absolute temperature T2 [K] BT1/T2: B constant [K] 100 kΩ 10 kΩ 220 230 240 250 260 270 280 290 300 Temperature (K) KMPDB0111EA Precaution for use (electrostatic countermeasures) Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. O Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. O Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. O Ground the tools used to handle these sensors, such as tweezers and soldering irons. O It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Element cooling/heating temperature incline rate Element cooling/heating temperature incline rate should be set at less than 5 K/min. 11 CCD area image sensors S7033/S7034 series Multichannel detector head C7043, C7044 Features C7043: for S7033 series C7044: for S7034 series Area scanning or full line-binnng operation Readout frequency: 250 kHz Readout noise: 60 e- rms ΔT=50 °C (ΔT changes by cooling method.) Input Master start Symbol VD1 VA1+ VA1VA2 VD2 Vp VF φms Master clock φmc Supply voltage Value +5 Vdc, 200 mA +15 Vdc, +100 mA -15 Vdc, -100 mA +24 Vdc, 30 mA +5 Vdc, 30 mA (C7044) +5 Vdc, 2.5 A (C7044) +12 Vdc, 100 mA (C7044) HCMOS logic compatible HCMOS logic compatible, 1 MHz Information described in this material is current as of February, 2014. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix "(Z)" which means developmental specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Thorshamnsgatan 35 16440 Kista, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 China: Hamamatsu Photonics (China) Co., Ltd.: 1201 Tower B, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866 Cat. No. KMPD1029E12 Feb. 2014 DN 12