LTM8055 36VIN, 8.5A Buck-Boost µModule Regulator FEATURES DESCRIPTION Complete Buck-Boost Switch Mode Power Supply n V OUT Equal, Greater, Less Than VIN n Wide Input Voltage Range: 5V to 36V n12V/3A Output from 6V IN n12V/6A Output from 12V IN n12V/8.5A Output from 24V IN n Up to 97.5% Efficient n Adjustable Input and Output Average Current Limits n Input and Output Current Monitors n Parallelable for Increased Output Current n Wide Output Voltage Range: 1.2V to 36V n Selectable Switching Frequency: 100kHz to 800kHz n Synchronization from 200kHz to 700kHz n15mm × 15mm × 4.92mm BGA Package The LTM ®8055 is a 36V IN, buck-boost µModule ® (micromodule) regulator. Included in the package are the switching controller, power switches, inductor and support components. A resistor to set the switching frequency, a resistor divider to set the output voltage, and input and output capacitors are all that are needed to complete the design. Other features such as input and output average current regulation may be implemented with just a few components. The LTM8055 operates over an input voltage range of 5V to 36V, and can regulate output voltages between 1.2V and 36V. The SYNC input and CLKOUT output allow easy synchronization. n APPLICATIONS n High Power Battery-Operated Devices Industrial Control Solar Powered Voltage Regulator Solar Powered Battery Charging Buck-Boost Selection Table L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. LTM8054 LTM8055 LTM8056 VIN (Operation) 36 36 58 VIN Abs Max 40 40 60 VOUT Abs Max 40 40 60 IOUT (Peak) 24VIN, 12VOUT 5.4 8.5 5.5 Package TYPICAL APPLICATION VIN LTM8055 4.7µF 50V ×2 36.5k 600kHz RUN CTL SS SYNC COMP RT LL MODE 10 VOUT VOUT 12V IOUT GND 96 8 68µF 100k CLKOUT IINMON IOUTMON FB 98 EFFICIENCY 22µF 25V OUTPUT CURRENT 6 94 92 90 4 88 2 11.0k 8055 TA01a EFFICIENCY (%) SVIN IIN 15 × 15mm × 4.92mm BGA Pin and Function Compatible Maximum Output Current and Efficiency vs VIN 12VOUT from 5VIN to 36VIN Buck-Boost Regulator VIN 5V TO 36V 15 × 11.25mm × 3.42mm BGA OUTPUT CURRENT (A) n n n The LTM8055 is housed in a compact overmolded ball grid array (BGA) package suitable for automated assembly by standard surface mount equipment. The LTM8055 is RoHS compliant. 0 86 0 10 20 VIN (V) 30 40 84 8055 TA01b 8055fa For more information www.linear.com/LTM8055 1 LTM8055 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) VIN, SVIN, VOUT, RUN, IIN, IOUT Voltage......................40V FB, SYNC, CTL, MODE Voltage....................................6V IINMON, IOUTMON Voltage..............................................6V LL Voltage..................................................................15V Maximum Junction Temperature (Notes 2, 3)........ 125°C Storage Temperature.............................. –55°C to 125°C Peak Solder Reflow Body Temperature.................. 245°C TOP VIEW SVIN BANK 3 VIN 11 10 BANK 1 GND IIN 9 8 7 6 5 BANK 2 VOUT 4 RUN 3 IINMON 2 IOUTMON 1 GND A B C D IOUT E F G H J K L LL RT FB SS CLKOUT MODE SYNC CTL COMP BGA PACKAGE 121-LEAD (15mm × 15mm × 4.92mm) TJMAX = 125°C, θJA = 17.1°C/W, θJCbottom = 7.8°C/W, θJCtop = 17.5°C/W, θJB = 7.1°C/W, WEIGHT = 2.8g, θ VALUES DETERMINED PER JEDEC JESD51-9, 51-12 ORDER INFORMATION PART NUMBER TERMINAL FINISH PART MARKING* DEVICE FINISH CODE PACKAGE TYPE MSL RATING TEMPERATURE RANGE (SEE NOTE 2) LTM8055EY#PBF SAC305 (RoHS) LTM8055Y e1 BGA 3 –40°C to 125°C LTM8055IY#PBF SAC305 (RoHS) LTM8055Y e1 BGA 3 –40°C to 125°C LTM8055IY SnPb(63/37) LTM8055Y e0 BGA 3 –40°C to 125°C LTM8055MPY#PBF SAC305 (RoHS) LTM8055Y e1 BGA 3 –55°C to 125°C LTM8055MPY SnPb(63/37) LTM8055Y e0 BGA 3 –55°C to 125°C Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. • Recommended LGA and BGA PCB Assembly and Manufacturing Procedures: www.linear.com/umodule/pcbassembly • Terminal Finish Part Marking: www.linear.com/leadfree • LGA and BGA Package and Tray Drawings: www.linear.com/packaging 2 8055fa For more information www.linear.com/LTM8055 LTM8055 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. RUN = 1.5V unless otherwise noted. (Note 2) PARAMETER Minimum Input Voltage Output DC Voltage Output DC Current Quiescent Current Into VIN (Tied to SVIN) Output Voltage Line Regulation Output Voltage Load Regulation Output RMS Voltage Ripple Switching Frequency CONDITIONS VIN = SVIN FB = VOUT Through 100k RFB = 100k/3.40k VIN = 6V, VOUT = 12V VIN = 24V, VOUT = 12V RUN = 0.3V (Disabled) No Load, MODE = 0.3V (DCM) No Load, MODE = 1.5V (FCM) 5V < VIN < 36V, IOUT = 1A VIN = 12V, 0.1A < IOUT < 6A VIN = 12V, IOUT = 3A RT = 453k RT = 24.9k MIN 1.2 36 3 8.5 0.1 8 45 0.5 0.5 25 100 800 Voltage at FB Pin l RUN Falling Threshold RUN Hysteresis RUN Low Threshold RUN Pin Current IIN Bias Current Input Current Sense Threshold (IIN-VIN) IOUT Bias Current Output Current Sense Threshold (VOUT-IOUT) LTM8055 Stops Switching LTM8055 Starts Switching LTM8055 Disabled RUN = 1V RUN = 1.6V l 1.188 1.176 1.15 MAX 5.0 1 30 100 1.212 1.220 1.25 25 2 3 0.3 5 100 90 l 44 56 20 VCTL = Open l IINMON Voltage IOUTMON Voltage CTL Input Bias Current SS Pin Current CLKOUT Output High CLKOUT Output Low SYNC Input Low Threshold SYNC Input High Threshold SYNC Bias Current MODE Input Low Threshold MODE Input High Threshold TYP l LTM8055 in Input Current Limit LTM8055 in Output Current Limit VCTL = 0V VSS = 0V 10k to GND 10k to 5V 54.5 53 0.96 1.14 61.5 63 1.04 1.26 22 35 4 0.7 0.3 1.5 SYNC = 1V 11 0.3 1.5 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8055E is guaranteed to meet performance specifications from 0°C to 125°C internal. Specifications over the full –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM8055I is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. The LTM8055MP is guaranteed to meet specifications over the full –55°C to 125°C internal UNITS V V V A A µA mA mA % % mV kHz kHz V V V mV V µA nA µA mV µA mV mV V V µA µA V V V V µA V V operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: The LTM8055 contains overtemperature protection that is intended to protect the device during momentary overload conditions. The internal temperature exceeds the maximum operating junction temperature when the overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 8055fa For more information www.linear.com/LTM8055 3 LTM8055 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Output Current (3.3VOUT) 100 0 2 4 6 8 OUTPUT CURRENT (A) 60 40 5VIN 12VIN 24VIN 36VIN 20 20 10 0 2 4 6 8 OUTPUT CURRENT (A) 100 40 Efficiency vs Output Current (18VOUT) 3 6 OUTPUT CURRENT (A) 20 9 Efficiency vs Output Current (36VOUT) EFFICIENCY (%) 0 2 4 6 OUTPUT CURRENT (A) 5VIN 12VIN 24VIN 36VIN 50 0 1 2 3 4 OUTPUT CURRENT (A) 8055 G07 0 1 2 3 4 5 OUTPUT CURRENT (A) 10 5VIN 12VIN 24VIN 36VIN 5 7 5VIN 12VIN 24VIN 36VIN 8 4 3 2 0 6 Input Current vs Output Current (5VOUT) 6 4 2 1 5 5VIN 12VIN 24VIN 36VIN 8055 G06 INPUT CURRENT (A) INPUT CURRENT (A) EFFICIENCY (%) 60 20 8 Input Current vs Output Current (3.3VOUT) 6 70 10 60 40 5VIN 12VIN 24VIN 36VIN 7 80 4 6 8 OUTPUT CURRENT (A) Efficiency vs Output Current (24VOUT) 8055 G05 90 4 100 60 8055 G04 100 2 80 40 5VIN 12VIN 24VIN 36VIN 0 0 8055 G03 80 EFFICIENCY (%) EFFICIENCY (%) 80 40 20 10 5VIN 12VIN 24VIN 36VIN 8055 G02 100 60 60 40 5VIN 12VIN 24VIN 36VIN 8055 G01 Efficiency vs Output Current (12VOUT) Efficiency vs Output Current (8VOUT) 80 EFFICIENCY (%) EFFICIENCY (%) EFFICIENCY (%) 40 20 100 80 60 0 Efficiency vs Output Current (5VOUT) 100 80 TA = 25°C, unless otherwise noted. 0 2 4 6 8 OUTPUT CURRENT (A) 10 8055 G08 0 0 2 4 6 8 OUTPUT CURRENT (A) 10 8055 G09 8055fa For more information www.linear.com/LTM8055 LTM8055 TYPICAL PERFORMANCE CHARACTERISTICS 10 6 4 6 4 2 4 6 8 OUTPUT CURRENT (A) 0 10 0 3 6 OUTPUT CURRENT (A) Input Current vs Output Current (24VOUT) 4 6 5 4 3 5VIN 12VIN 24VIN 36VIN 1 2 4 OUTPUT CURRENT (A) 0 6 0 1 2 3 4 OUTPUT CURRENT (A) 8055 G13 10 100 8 80 6 4 12VOUT 18VOUT 24VOUT 36VOUT 2 0 0 10 20 VIN (V) 30 40 8055 G16 8 6 4 5 3.3VOUT 5VOUT 8VOUT 0 10 20 VIN (V) 8055 G14 TEMPERATURE RISE (°C) OUTPUT CURRENT (A) Maximum Output Current vs VIN Maximum Output Current vs VIN 10 2 0 8 8055 G12 7 2 0 2 4 6 OUTPUT CURRENT (A) 8 INPUT CURRENT (A) INPUT CURRENT (A) 6 0 Input Current vs Output Current (36VOUT) 9 5VIN 12VIN 24VIN 36VIN 8 5VIN 12VIN 24VIN 36VIN 8055 G11 8055 G10 10 4 0 9 OUTPUT CURRENT (A) 0 6 2 Temperature Rise vs Output Current (3.3VOUT) 100 5VIN 12VIN 24VIN 36VIN 60 40 20 0 0 2 4 6 8 OUTPUT CURRENT (A) 30 40 8055 G15 Temperature Rise vs Output Current (5VOUT) TEMPERATURE RISE (°C) 0 8 2 2 Input Current vs Output Current (18VOUT) 10 5VIN 12VIN 24VIN 36VIN 8 INPUT CURRENT (A) INPUT CURRENT (A) 10 5VIN 12VIN 24VIN 36VIN 8 Input Current vs Output Current (12VOUT) INPUT CURRENT (A) Input Current vs Output Current (8VOUT) TA = 25°C, unless otherwise noted. 10 8055 G17 5VIN 12VIN 24VIN 36VIN 80 60 40 20 0 0 2 4 6 8 OUTPUT CURRENT (A) 10 8055 G18 8055fa For more information www.linear.com/LTM8055 5 LTM8055 TYPICAL PERFORMANCE CHARACTERISTICS Temperature Rise vs Output Current (8VOUT) TA = 25°C, unless otherwise noted. Temperature Rise vs Output Current (12VOUT) Temperature Rise vs Output Current (18VOUT) 80 80 80 60 40 5VIN 12VIN 24VIN 36VIN 20 0 0 2 4 6 8 OUTPUT CURRENT (A) 60 40 5VIN 12VIN 24VIN 36VIN 20 0 10 0 2 4 6 OUTPUT CURRENT (A) 8055 G19 40 0 8 40 5VIN 12VIN 24VIN 36VIN 20 0 2 4 OUTPUT CURRENT (A) TEMPERATURE RISE (°C) 60 0 2 4 6 OUTPUT CURRENT (A) 6 Output Voltage Ripple, Unmodified DC2017A Demo Board 12VOUT 24VIN 6A LOAD (BUCK) 100mV/DIV 80 MEASURED WITH HP461N 150MHz AMPLIFIER 12VIN 6A LOAD (BUCK-BOOST) 100mV/DIV 60 40 6VIN 3A LOAD (BOOST) 100mV/DIV 5VIN 12VIN 24VIN 36VIN 20 0 8 8055 G21 100 80 5VIN 12VIN 24VIN 36VIN 20 Temperature Rise vs Output Current (36VOUT) 100 TEMPERATURE RISE (°C) 60 8055 G20 Temperature Rise vs Output Current (24VOUT) 0 TEMPERATURE RISE (°C) 100 TEMPERATURE RISE (°C) 100 TEMPERATURE RISE (°C) 100 0 8055 G22 1 2 3 4 OUTPUT CURRENT (A) 0.5µs/DIV 5 8055 G24 8055 G23 Maximum Output Current vs CTL Voltage, Unmodified DC2017A, 12VIN Start-Up Behavior, DC2017A, 24VIN, 3A Resistive Load 8 NO CSS OUTPUT CURRENT (A) 2V/DIV 7 CSS = 0.022µF CSS = 0.22µF 6 5 4 3 2 1 500µs/DIV 8055 G25 0 0 0.2 0.4 0.6 0.8 1 CTL VOLTAGE (V) 1.2 1.4 8055 G26 6 8055fa For more information www.linear.com/LTM8055 LTM8055 PIN FUNCTIONS GND (Bank 1, Pin L1): Tie these GND pins to a local ground plane below the LTM8055 and the circuit components. In most applications, the bulk of the heat flow out of the LTM8055 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Return the RFB1/RFB2 feedback divider to this net. MODE (Pin G2): Switching Mode Input. The LTM8055 operates in forced continuous mode when MODE is open, and can operate in discontinuous switching mode when MODE is low. In discontinuous switching mode, the LTM8055 will block reverse inductor current. This pin is normally left open or tied to LL. This pin may be tied to GND for the purpose of blocking reverse current if no output current sense resistor is used. VOUT (Bank 2): Power Output Pins. Apply output filter capacitors between these pins and GND pins. RT (Pin H1): Timing Resistor. The RT pin is used to program the switching frequency of the LTM8055 by connecting a resistor from this pin to ground. The range of oscillation is 100kHz to 800kHz. The Applications Information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. Minimize capacitance at this pin. VIN (Bank 3): Input Power. The VIN pin supplies current to the LTM8055’s internal power switches and to one terminal of the optional input current sense resistor. This pin must be locally bypassed with an external, low ESR capacitor; see Table 1 for recommended values. IOUT (Pin D1): Output Current Sense. Tie this pin to the output current sense resistor. The output average current sense threshold is 58mV, so the LTM8055 will regulate the output current to 58mV/RSENSE, where RSENSE is the value of the output current sense resistor in ohms. The load is powered through the sense resistor connected at this pin. Tie this pin to VOUT if no output current sense resistor is used. Keep this pin within ±0.5V of VOUT under all conditions. SYNC (Pin H2): External Synchronization Input. The SYNC pin has an internal pull-down resistor. See the Synchronization section in Applications Information for details. Tie this pin to GND when not used. LL (Pin F1): Light Load Indicator. This pin indicates that the output current, as sensed through the resistor connected between VOUT and IOUT, is approximately equivalent to 10mV or less. Its state is meaningful only if a current sense resistor is applied between VOUT and IOUT. This is useful to change the switching behavior of the LTM8055 in light load conditions. COMP (Pin J2): Compensation Pin. The LTM8055 is equipped with internal compensation that works well with most applications. In some cases, the performance of the LTM8055 can be enhanced by modifying the control loop compensation by applying a capacitor or RC network to this pin. SVIN (Pins F10, F11): Controller Power Input. Apply a separate voltage above 5V if the LTM8055 is required to operate when the main power input (VIN) is below 5V. Bypass these pins with a high quality, low ESR capacitor. If a separate supply is not used, connect these pins to VIN. CLKOUT (Pin G1): Clock Output. Use this pin as a clock source when synchronizing other devices to the switching frequency of the LTM8055. When this function is not used, leave this pin open. FB (Pin J1): Output Voltage Feedback. The LTM8055 regulates the FB pin to 1.2V. Connect the FB pin to a resistive divider between the output and GND to set the output voltage. See Table 1 for recommended FB divider resistor values. SS (Pin K1): Soft-Start. Connect a capacitor from this pin to GND to increase the soft-start time. Soft-start reduces the input power source’s surge current by gradually increasing the controller’s current limit. Larger values of the soft-start capacitor result in longer soft-start times. If no soft-start is required, leave this pin open. CTL (Pin K2): Current Sense Adjustment. Apply a voltage below 1.2V to reduce the current limit threshold of IOUT. Drive CTL to less than 50mV to stop switching. The CTL pin has an internal pull-up resistor to 2V. If not used, leave open. 8055fa For more information www.linear.com/LTM8055 7 LTM8055 PIN FUNCTIONS IOUTMON (Pin L2): Output Current Monitor. This pin produces a voltage that is proportional to the voltage between VOUT and IOUT. IOUTMON will equal 1.2V when VOUT – IOUT = 58mV. This feature is generally useful only if a current sense resistor is applied between VOUT and IOUT. IINMON (Pin L3): Input Current Monitor. This pin produces a voltage that is proportional to the voltage between IIN and VIN. IINMON will equal 1V when IIN – VIN = 50mV. This feature is generally useful only if a current sense resistor is applied between VIN and IIN. RUN (Pin L4): LTM8055 Enable. Raise the RUN pin voltage above 1.2V for normal operation. Above 1.2V (typical), but below 6V, the RUN pin input bias current is less than 1μA. Below 1.2V and above 0.3V, the RUN pin sinks 3μA so the user can define the hysteresis with the external resistor selection. This will also reset the soft-start function. If RUN is 0.3V or less, the LTM8055 is disabled and the SVIN quiescent current is below 1μA. IIN (Pin L9): Input Current Sense. Tie this pin to the input current sense resistor. The input average current sense threshold is 50mV, so the LTM8055 will regulate the input current to 50mV/RSENSE, where RSENSE is the value of the input current sense resistor in ohms. Tie to VIN when not used. Keep this pin within ±0.5V of VIN under all conditions. BLOCK DIAGRAM VIN VOUT SVIN IOUT 4.7µH IIN 0.47µF 50V 0.2µF RUN GND 2V SS 100k FB 100k CLKOUT BUCK-BOOST CONTROLLER 0.1µF IINMON IOUTMON CTL MODE COMP LL RT SYNC 8055 BD 8 8055fa For more information www.linear.com/LTM8055 LTM8055 OPERATION The LTM8055 is a standalone nonisolated buck-boost switching DC/DC power supply. The buck-boost topology allows the LTM8055 to regulate its output voltage for input voltages both above and below the magnitude of the output. The maximum output current depends upon the input voltage. Higher input voltages yield higher maximum output current. This converter provides a precisely regulated output voltage programmable via an external resistor divider from 1.2V to 36V. The input voltage range is 5V to 36V, but the LTM8055 may be operated at lower input voltages if SVIN is powered by a voltage source above 5V. A simplified block diagram is given on the previous page. The LTM8055 contains a current mode controller, power switching elements, power inductor and a modest amount of input and output capacitance. The LTM8055 is a fixed frequency PWM regulator. The switching frequency is set by connecting the appropriate resistor value from the RT pin to GND. The output voltage of the LTM8055 is set by connecting the FB pin to a resistor divider between VOUT and GND. In addition to regulating its output voltage, the LTM8055 is equipped with average current control loops for both the input and output. Add a current sense resistor between IIN and VIN to limit the input current below some maximum value. The IINMON pin reflects the current flowing though the sense resistor between IIN and VIN. A current sense resistor between VOUT and IOUT allows the LTM8055 to accurately regulate its output current to a maximum value set by the value of the sense resistor. When the resistor is present, the IOUTMON pin reflects the output current flowing through VOUT. In general, the LTM8055 should be used with an output sense resistor to limit the maximum output current, as buck-boost regulators are capable of delivering large currents when the output voltage is lower than the input, if demanded. Furthermore, while the LTM8055 does not require an output sense resistor to operate, it uses information from the sense resistor to optimize its performance. If an output sense resistor is not used, the efficiency or output ripple may degrade, especially if the current through the integrated inductor is discontinuous. In some cases, an output sense resistor is required to adequately protect the LTM8055 against output overload or short-circuit. A voltage less than 1.2V applied to the CTL pin reduces the maximum output current. Drive CTL to about 50mV to stop switching. The current flowing through the sense resistor is reflected by the output voltage of the IOUTMON pin. Driving the SYNC pin will synchronize the LTM8055 to an external clock source. The CLKOUT pin sources a signal that is the same frequency but approximately 180° out of phase with the internal oscillator. If more output current is required than a single LTM8055 can provide, multiple devices may be operated in parallel. Refer to the Parallel Operation section of Applications Information for more details. An internal regulator provides power to the control circuitry and the gate driver to the power MOSFETs. This internal regulator draws power from the SVIN pin. The RUN pin is used to place the LTM8055 in shutdown, disconnecting the output and reducing the input current to less than 1μA. The LTM8055 is equipped with a thermal shutdown that inhibits power switching at high junction temperatures. The activation threshold of this function is above 125°C to avoid interfering with normal operation, so prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 8055fa For more information www.linear.com/LTM8055 9 LTM8055 APPLICATIONS INFORMATION For most applications, the design process is straight forward, summarized as follows: 1. Look at Table 1 and find the row that has the desired input range and output voltage. 2. Apply the recommended CIN, COUT, RFB1/RFB2 and RT values. 3. Apply the output sense resistor to set the output current limit. The output current is limited to 58mV/RSENSE, where RSENSE is the value of the output current sense resistor in ohms. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Bear in mind that the maximum output current is limited by junction temperature, the relationship between the input and output voltage magnitude and other factors. Please refer to the graphs in the Typical Performance Characteristics section for guidance. The maximum frequency (and attendant RT value) at which the LTM8055 should be allowed to switch is given in Table 1 in the fMAX column, while the recommended frequency (and RT value) for optimal efficiency over the given input condition is given in the fOPTIMAL column. There are additional conditions that must be satisfied if the synchronization function is used. Please refer to the Synchronization section for details. Note that Table 1 calls out both ceramic and electrolytic output capacitors. Both of the capacitors called out in the table must be applied to the output. The electrolytic capacitors in Table 1 are described by voltage rating, value and ESR. The voltage rating of the capacitor may be increased if the application requires a higher voltage stress derating. The LTM8055 can tolerate variation in the ESR; other capacitors with different ESR may be used, but the user must verify proper operation over line, load and environmental conditions. Table 2 gives the description and part numbers of electrolytic capacitors used in the LTM8055 development testing and design validation. Table 1. Recommended Component Values and Configuration (TA = 25°C) VIN RANGE 5V to 24V VOUT CIN COUT RFB1/RFB2 fOPTIMAL (kHz) RT(OPTIMAL) fMAX (kHz) RT(MAX) 3.3V 2 × 4.7µF, 50V, X5R, 0805 22µF, 6.3V, X5R, 0805 100k/56.2k 600 36.5k 800 24.9k 100µF, 6V, 75mΩ, Electrolytic 5V to 28V 5V 2 × 4.7µF, 50V, X5R, 0805 22µF, 6.3V, X5R, 0805 100k/31.6k 550 39.2k 800 24.9k 100µF, 6V, 75mΩ, Electrolytic 5V to 31V 8V 2 × 4.7µF, 50V, X5R, 0805 47µF, 10V, X5R, 1206 100k/17.4k 500 45.3k 800 24.9k 100µF, 16V, 100mΩ, Electrolytic 5V to 36V 12V 2 × 4.7µF, 50V, X5R, 1210 22µF, 25V, X5R, 0805 100k/11k 600 36.5k 800 24.9k 68µF, 16V, 200mΩ, Electrolytic 5V to 36V 18V 2 × 4.7µF, 50V, X7R, 1210 2 x 22µF, 25V, X5R, 1210 100k/6.98k 500 45.3k 800 24.9k 47µF, 25V, 900mΩ, Electrolytic 5V to 36V 24V 2 × 4.7µF, 50V, X7R, 1210 22µF, 25V, X5R, 1210 100k/5.23k 650 31.6k 800 24.9k 33µF, 35V 300mΩ, Electrolytic 5.5V to 36V 36V 2 × 4.7µF, 50V, X7R, 1210 10µF, 50V, X5R, 1206 100k/3.40k 650 31.6k 800 24.9k 10µF, 50V 120mΩ, Electrolytic Notes: An input bulk capacitor is required. The output capacitance uses a combination of a ceramic and electrolytic in parallel. Other combinations of resistor values for the RFB network are acceptable. Table 2. Electrolytic Caps Used in LTM8055 Testing DESCRIPTION 100µF, 6V, 75mΩ, Tantalum C Case 100µF, 16V, 100mΩ, Tantalum Y Case 68µF, 16V, 200mΩ, Tantalum C Case 47µF, 25V, 900mΩ, Tantalum D Case 33µF, 35V, 300mΩ, Tantalum D Case 10µF, 50V, 120mΩ, Aluminum 6.3 × 6mm case 10 MANUFACTURER AVX AVX AVX AVX AVX Suncon PART NUMBER TPSC107M006R0075 TPSY107M016R0100 TPSC686M016R0200 TAJD476M025R TPSD336M035R0300 50HVP10M 8055fa For more information www.linear.com/LTM8055 LTM8055 APPLICATIONS INFORMATION Capacitor Selection Considerations Table 3. Switching Frequency vs RT Value The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However, not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8055. A ceramic input capacitor combined with trace or cable inductance forms a high Q (underdamped) tank circuit. If the LTM8055 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily avoided; see the Hot-Plugging Safely section. Frequency Selection The LTM8055 uses a constant frequency PWM architecture that can be programmed to switch from 100kHz to 800kHz by tying a resistor from the RT pin to ground. Table 3 provides a list of RT resistor values and their resultant frequencies. FREQUENCY RT VALUE (kΩ) 100 453 200 147 300 84.5 400 59 500 45.3 600 36.5 700 29.4 800 24.9 An external resistor from RT to GND is required. Do not leave this pin open, even when synchronizing to an external clock. When synchronizing the switching of the LTM8055 to an external signal source, the frequency range is 200kHz to 700kHz. Operating Frequency Trade-Offs It is recommended that the user apply the optimal RT value given in Table 1 for the input and output operating condition. System level or other considerations, however, may necessitate another operating frequency. While the LTM8055 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. A frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8055 if the output is overloaded or short circuited. A frequency that is too low can result in a final design that has too much output ripple, too large of an output capacitor or is unstable. Parallel Operation Two or more LTM8055s may be combined to provide increased output current by configuring them as a master and a slave, as shown in Figure 1. Each LTM8055 is equipped with an IOUTMON and a CTL pin. The IOUTMON pin’s 0 to 1.2V signal reflects the current passing through the output sense resistor, while a voltage less than 1.2V applied to the CTL pin will limit the current passing through the output sense resistor. By applying the voltage of the master’s IOUTMON pin to the slave’s CTL pin, the two units 8055fa For more information www.linear.com/LTM8055 11 LTM8055 APPLICATIONS INFORMATION will source the same current to the load, assuming each LTM8055 output current sense resistor is the same value. MASTER OUTPUT CURRENT SENSE RESISTOR TO LOAD VOUT IOUT IOUTMON UNITY GAIN BUFFER Paralleled LTM8055s should normally be allowed to switch in discontinuous mode to prevent current from flowing from the output of one unit into another; that is, the MODE pin should be tied to LL. In some cases, operating the master in forced continuous (MODE open) and the slaves in discontinuous mode (MODE = LL) is desirable. If so, current from the output can flow into the master’s input. Please refer to Input Precaution in this section for a discussion of this behavior. Minimum Input Voltage and RUN CTL SLAVE VOUT OUTPUT CURRENT SENSE RESISTOR IOUT 8055 F01 Figure 1. Two or More LTM8055s May Be Connected in a Master/Slave Configuration for Increased Output Current The design of a master-slave configuration is straight forward: 1.Apply the FB resistor network to the master, choosing the proper values for the desired output voltage. Suggested values for popular output voltages are provided in Table 1. 2.Apply a FB resistor network to the individual slaves so that the resulting output is higher than the desired output voltage. 3.Apply the appropriate output current sense resistors between VOUT and IOUT. If the same value is used for the master and slave units, they will share current equally. The LTM8055 needs a minimum of 5V for proper operation, but system parameters may dictate that the device operate only above some higher input voltage. For example, a LTM8055 may be used to produce 12VOUT, but the input power source may not be budgeted to provide enough current if the input supply voltage is below 8V. The RUN pin has a typical falling voltage threshold of 1.2V and a typical hysteresis of 25mV. In addition, the pin sinks 3µA below the RUN threshold. Based upon the above information and the circuit shown in Figure 2, the VIN rising (turn-on) threshold is: VIN = ( 3µA •R1) +1.225V and the VIN falling turn-off threshold is: VIN = 1.2 R1+R2 R2 LTM8055 VIN 4.Connect the master IOUTMON to the slaves’ CTL pin through a unity gain buffer. The unity gain buffer is required to isolate the output impedance of the LTM8055 from the integrated pull-up on the CTL pins. 5.Tie the outputs together. Note that this configuration does not require the inputs to be tied together, making it simple to power a single heavy load from multiple input sources. Ensure that each input power source has sufficient voltage and current sourcing capability to provide the necessary power. Please refer to the Maximum Output Current vs VIN and Input Current vs Output Current curves in the Typical Performance Characteristics section for guidance. 12 R1+R2 R2 R1 RUN R2 8055 F02 Figure 2. This Simple Resistor Network Sets the Minimum Operating Input Voltage Threshold with Hysteresis Minimum Input Voltage and SVIN The minimum input voltage of the LTM8055 is 5V, but this is only if VIN and SVIN are tied to the same voltage source. If SVIN is powered from a power source at or above 5VDC, VIN can be allowed to fall below 5V and the LTM8055 can 8055fa For more information www.linear.com/LTM8055 LTM8055 APPLICATIONS INFORMATION still operate properly. Some examples of this are provided in the Typical Applications section. Soft-Start Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current. As indicated in the Block Diagram, the LTM8055 has an internal softstart RC network. Depending upon the load and operating conditions, the internal network may be sufficient for the application. To increase the soft-start time, simply add a capacitor from SS to GND. Output Current Limit (IOUT) The LTM8055 features an accurate average output current limit set by an external sense resistor placed between VOUT and IOUT as shown in Figure 3. VOUT and IOUT internally connect to a differential amplifier that limits the current when the voltage VOUT-IOUT reaches 58mV. The current limit is: IOUT(LIM) = 58mV RSENSE where RSENSE is the value of the sense resistor in ohms. Most applications should use an output sense resistor as shown in Figure 3, if practical. The internal buck-boost power stage is current limited, but is nonetheless capable of delivering large amounts of current in an overload condition, especially when the output voltage is much lower than the input and the power stage is operating as a buck converter. LTM8055 VOUT IOUT tying the LL and MODE pins together can improve performance—see Switching Mode in this section. In high step-down voltage regulator applications, the internal current limit can be quite high to allow proper operation. This can potentially damage the LTM8055 in overload or short-circuit conditions. Apply an output current sense resistor to set an appropriate current limit to protect the LTM8055 against these fault conditions. Output Current Limit Control (CTL) Use the CTL input to reduce the output current limit from the value set by the external sense resistor applied between VOUT and IOUT. The typical control range is between 0V and 1.2V. The CTL pin does not directly affect the input current limit. If this function is not used, leave CTL open. Drive CTL to less than about 50mV to stop switching. The CTL pin has an internal pull-up resistor to 2V. Input Current Limit (IIN) Some applications require that LTM8055 draw no more than some predetermined current from the power source. Current limited power sources and power sharing are two examples. The LTM8055 features an accurate input current limit set by an external sense resistor placed between IIN and VIN as shown in Figure 4. VIN and IIN internally connect to a differential amplifier that limits the current when the voltage IIN-VIN reaches 50mV. The current limit is: IIN(LIM) = 50mV RSENSE where RSENSE is the value of the sense resistor in ohms. If input current limiting is not required, simply tie IIN to VIN. RSENSE LOAD POWER SOURCE 8055 F03 Figure 3. Set The LTM8055 Output Current Limit with an External Sense Resistor RSENSE LTM8055 VIN IIN 8055 F04 When the voltage across the output sense resistor falls to about 1/10th of full scale, the LL pin pulls low. If there is no output sense resistor, and IOUT is tied to VOUT, LL will be active low. Applying an output sense resistor and Figure 4. Set the LTM8055 Input Current Limit with an External Sense Resistor 8055fa For more information www.linear.com/LTM8055 13 LTM8055 APPLICATIONS INFORMATION Input Current Monitor (IINMON) The IINMON pin produces a voltage equal to approximately 20 times the voltage of IIN – VIN. Since the LTM8055 input current limit engages when IIN – VIN = 50mV, IINMON will be 1V at maximum input current. Output Current Monitor (IOUTMON) The IOUTMON pin produces a voltage proportional to the voltage of VOUT – IOUT. Since the LTM8055 output current limit engages when VOUT – IOUT = 58mV, IOUTMON will be 1.2V at maximum output current. Synchronization The LTM8055 switching frequency can be synchronized to an external clock using the SYNC pin. Driving SYNC with a 50% duty cycle waveform is a good choice, otherwise maintain the duty cycle between about 10% and 90%. When synchronizing, a valid resistor value (that is, a value that results in a free-running frequency of 100kHz to 800kHz) must be connected from RT to GND. While an RT resistor is required for proper operation, the value of this resistor is independent of the frequency of the externally applied SYNC signal. Be aware, however, that the LTM8055 will switch at the frequency prescribed by the RT value if the SYNC signal terminates, so choose an appropriate resistor value. CLKOUT The CLKOUT signal reflects the internal switching clock of the LTM8055. It is phase shifted by approximately 180° with respect to the leading edge of the internal clock. If CLKOUT is connected to the SYNC input of another LTM8055, the two devices will switch about 180° out of phase. Input Precaution In applications where the output voltage is deliberately pulled up above the set regulation voltage or the FB pin is abruptly driven to a new voltage, the LTM8055 may attempt to regulate the voltage by removing energy from the load for a short period of time after the output is pulled up. 14 Since the LTM8055 is a synchronous switching converter, it delivers this energy to the input. If there is nothing on the LTM8055 input to consume this energy, the input voltage may rise. If the input voltage rises without intervention, it may rise above the absolute maximum rating, damaging the part. Carefully examine the input voltage behavior to see if the application causes it to rise. In many cases, the system load on the LTM8055 input bus will be sufficient to absorb the energy delivered by the μModule regulator. The power required by other devices will consume more than enough to make up for what the LTM8055 delivers. In cases where the LTM8055 is the largest or only power converter, this may not be true and some means may need to be devised to prevent the LTM8055’s input from rising too high. Figure 5a shows a passive crowbar circuit that will dissipate energy during momentary input overvoltage conditions. The break-down voltage of the Zener diode is chosen in conjunction with the resistor R to set the circuit’s trip point. The trip point is typically set well above the maximum VIN voltage under normal operating conditions. This circuit does not have a precision threshold, and is subject to both part-to-part and temperature variations, so it is most suitable for applications where the maximum input voltage is much less than the 40VIN absolute maximum. As stated earlier, this type of circuit is best suited for momentary overvoltages. Figure 5a is a crowbar circuit, which attempts to prevent the input voltage from rising above some level by dumping energy to GND through a power device. In some cases, it is possible to simply turn off the LTM8055 when the input voltage exceeds some threshold. An example of this circuit is shown in Figure 5b. When the power source on the output drives VIN above a predetermined threshold, the comparator pulls down on the RUN pin and stops switching in the LTM8055. When this happens, the input capacitance needs to absorb the energy stored within the LTM8055’s internal inductor, resulting in an additional voltage rise. This voltage rise depends upon the input capacitor size and how much current is flowing from the LTM8055 output to input. 8055fa For more information www.linear.com/LTM8055 LTM8055 APPLICATIONS INFORMATION LOAD CURRENT VIN ZENER DIODE Q VOUT LTM8055 GND SOURCING LOAD R 8055 F05a Figure 5a. The MOSFET Q Dissipates Momentary Energy to GND. The Zener Diode and Resistor Are Chosen to Ensure That the MOSFET Turns On Above the Maximum VIN Voltage Under Normal Operation LOAD CURRENT VIN VOUT LTM8055 RUN 10µF – + GND SOURCING LOAD EXTERNAL REFERENCE VOLTAGE buck, buck-boost or boost operating modes, especially at lighter loads. In such a case, it can be desirable to operate in forced continuous mode except when the internal inductor current is about to reverse. If so, apply a current sense resistor between VOUT and IOUT and tie the LL and MODE pins together. The LL pin is low when the current through the output sense resistor is about one-tenth the full-scale maximum. When the output current falls to this level, the LL pin will pull the MODE pin down, putting the LTM8055 in discontinuous mode, preventing reverse current from flowing from the output to the input. In the case where MODE and LL are tied together, a small capacitor (~0.1µF) from these pins to GND may improve the light load transient response by delaying the transition from the discontinuous to forced continuous switching modes. MODE may be tied to GND for the purpose of blocking reverse current if no output current sense resistor is used. FB Resistor Divider and Load Regulation 8055 F05b Figure 5b. This Comparator Circuit Turns Off the LTM8055 if the Input Rises Above a Predetermined Threshold. When the LTM8055 Turns Off, the Energy Stored in the Internal Inductor Will Raise VIN a Small Amount Above the Threshold Switching Mode The MODE pin allows the user to select either discontinuous mode or forced continuous mode switching operation. In forced continuous mode, the LTM8055 will not skip cycles, even when the internal inductor current falls to zero or even reverses direction. This has the advantage of operating at the same fixed frequency for all load conditions, which can be useful when designing to EMI or output noise specifications. Forced continuous mode, however, uses more current at light loads, and allows current to flow from the load back into the input if the output is raised above the regulation point. This reverse current can raise the input voltage and be hazardous if the input is allowed to rise uncontrollably. Please refer to Input Precautions in this section for a discussion of this behavior. Forced continuous operation may provide improved output regulation when the LTM8055 transitions from The LTM8055 regulates its FB pin to 1.2V, using a resistor divider to sense the output voltage. The location at which the output voltage is sensed affects the load regulation. If there is a current sense resistor between VOUT and IOUT, and the output is sensed at VOUT, the voltage at the load will drop by the value of the current sense resistor multiplied by the output current. If the output voltage can be sensed at IOUT, the load regulation may be improved. PCB Layout Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8055. The LTM8055 is nevertheless a switching power supply, and care must be taken to minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 6 for a suggested layout. Ensure that the grounding and heat sinking are acceptable. A few rules to keep in mind are: 1.Place the RFB and RT resistors as close as possible to their respective pins. 8055fa For more information www.linear.com/LTM8055 15 LTM8055 APPLICATIONS INFORMATION 2.Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8055. board. Pay attention to the location and density of the thermal vias in Figure 6. The LTM8055 can benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum number of thermal vias depends upon the printed circuit board design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. 3.Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8055. 4.Minimize the trace resistance between the optional output current sense resistor, ROUT, and VOUT. Minimize the loop area of the IOUT trace and the trace from VOUT to ROUT. 5.Minimize the trace resistance between the optional input current sense resistor, RIN and VIN. Minimize the loop area of the IIN trace and the trace from VIN to RIN. 6.Place the CIN and COUT capacitors such that their ground current flow directly adjacent or underneath the LTM8055. 7.Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8055. 8.Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8055. However, these capacitors can cause problems if the LTM8055 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8055 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8055’s rating and damaging the part. If the input supply is poorly controlled or the LTM8055 is hot-plugged into an energized supply, the input network should be designed CIN GND SVIN VIN GND/THERMAL VIAS RIN INPUT SENSE IIN COUT INPUT RUN VOUT SIGNAL VIA VOUT MODE SYNC IOUT IOUT LL RT FB ROUT OUTPUT SENSE GND VOUT SIGNAL VIA 8055 F06 Figure 6. Layout Showing Suggested External Components, GND Plane and Thermal Vias 16 8055fa For more information www.linear.com/LTM8055 LTM8055 APPLICATIONS INFORMATION to prevent this overshoot. This can be accomplished by installing a small resistor in series with VIN, but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the VIN net. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. Thermal Considerations The LTM8055 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The temperature rise curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by a LTM8055 mounted to a 58cm2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. The thermal resistance numbers listed in the Pin Configuration of the data sheet are based on modeling the µModule package mounted on a test board specified per JESD 51-9 (Test Boards for Area Array Surface Mount Package Thermal Measurements). The thermal coefficients provided on this page are based on JESD 51-12 (Guidelines for Reporting and Using Electronic Package Thermal Information). For increased accuracy and fidelity to the actual application, many designers use FEA to predict thermal performance. To that end, the Pin Configuration of the data sheet typically gives four thermal coefficients: θJA – Thermal resistance from junction to ambient. θJCbottom – Thermal resistance from junction to the bottom of the product case. θJCtop – Thermal resistance from junction to top of the product case. While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD 51-12, and are quoted or paraphrased below: θJA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as “still air” although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. θJCbottom is the thermal resistance between the junction and bottom of the package with all of the component power dissipation flowing through the bottom of the package. In the typical µModule converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don’t generally match the user’s application. θJCtop is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical µModule converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the user’s application. θJB is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the µModule converter and into the board, and is really the sum of the θJCbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a 2-sided, 2-layer board. This board is described in JESD 51-9. Given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a µModule converter. Thus, none θJB – Thermal resistance from junction to the printed circuit board. 8055fa For more information www.linear.com/LTM8055 17 LTM8055 APPLICATIONS INFORMATION JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) CASE (TOP)-TO-AMBIENT RESISTANCE JUNCTION-TO-CASE (TOP) RESISTANCE JUNCTION JUNCTION-TO-BOARD RESISTANCE AMBIENT JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD (BOTTOM) RESISTANCE RESISTANCE BOARD-TO-AMBIENT RESISTANCE 8055 F07 µMODULE CONVERTER Figure 7 of them can be individually used to accurately predict the thermal performance of the product. Likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the product’s data sheet. The only appropriate way to use the coefficients is when running a detailed thermal analysis, such as FEA, which considers all of the thermal resistances simultaneously. A graphical representation of these thermal resistances is given in Figure 7. The die temperature of the LTM8055 must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8055. The bulk of the heat flow out of the LTM8055 is through the bottom of the μModule converter and the BGA pads into the printed circuit board. Consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to the PCB Layout section for printed circuit board design suggestions. The blue resistances are contained within the µModule converter, and the green are outside. 18 8055fa For more information www.linear.com/LTM8055 LTM8055 TYPICAL APPLICATIONS 12VOUT Fan Power from 3VIN to 36VIN with Analog Current Control and 2A Input Current Limiting Maximum Output Current vs CTL Voltage 1µF 50V 0.022Ω VIN SVIN LTM8055 VOUT 36.5k 600kHz GND CLKOUT IINMON IOUTMON FB 22µF 25V + FAN 68µF 25V 11.0k 8055 TA02a 0.2V TO 1.2V CONTROL RANGE 0.8 0.6 0.4 0.2 0 FAN CONTROL DAC 12VIN 1.0 100k RUN COMP SS SYNC CTL RT LL MODE 1.2 VOUT 12V MAX IOUT IIN 10µF 50V 0.05Ω OUTPUT CURRENT (A) VIN 3V TO 36V 0 0.2 0.4 0.6 0.8 CTL VOLTAGE (V) 1 1.2 8055 TA02b 24VOUT from 7VIN to 36VIN with 2.1A Accurate Current Limit Output Voltage vs Output Current VIN VIN 7V TO 36V LTM8055 VOUT 0.027Ω IOUT SVIN 25 VOUT 24V 12VIN IIN 36.5k 600kHz RUN COMP SS SYNC CTL RT LL MODE 100k GND CLKOUT IINMON IOUTMON FB 22µF 25V + 33µF 35V 5.23k 8055 TA03a OUTPUT VOLTAGE (V) 10µF 50V 20 15 10 5 0 0 0.5 1 1.5 2 OUTPUT CURRENT (A) 2.5 8055 TA03b 8055fa For more information www.linear.com/LTM8055 19 LTM8055 TYPICAL APPLICATIONS 3.3VOUT from 9VIN to 24VIN with 5A Accurate Current Limit and Output Current Monitor Output Voltage vs Output Current VIN VIN 9V TO 24V 4.0 0.011Ω VOUT LTM8055 VOUT 3.3V IOUT SVIN 3.5 10µF 50V 36.5k 600kHz RUN CTL SS SYNC COMP RT LL 100k MODE GND CLKOUT IINMON IOUTMON FB 22µF 6.3V OUTPUT CURRENT MONITOR 56.2k + OUTPUT VOLTAGE (V) IIN 100µF 6.3V 8055 TA04a 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1 2 3 4 OUTPUT CURRENT (A) 5 6 8055 TA04b Two LTM8055s Paralleled to Get More Output Current. The Two µModules Are Synchronized and Switching 180° Out Of Phase VIN VIN 7V TO 36V SVIN LTM8055 (MASTER) VOUT 0.008Ω IOUT IOUTMON Voltage vs Output Current for Each Channel, 12VIN VOUT 12V IIN 47pF IINMON IOUTMON FB 22µF 25V 100k + 11k GND + 1.0 68µF 25V LT1636 VIOUTMON (V) 36.5k 600kHz 1.2 RUN CTL SS SYNC COMP RT CLKOUT LL MODE – 10µF 50V 0.8 0.6 0.4 0.2 VIN SVIN LTM8055 (SLAVE) VOUT 0.008Ω 0 IOUT IIN 10µF 50V 36.5k 600kHz 47pF RUN COMP SS SYNC RT LL MODE GND CTL CLKOUT IINMON IOUTMON FB MASTER SLAVE 22µF 25V + 0 5 10 15 COMBINED CURRENTS OF BOTH CHANNELS (A) 8055 TA05b 68µF 25V 100k 9.31k 8055 TA05a 20 8055fa For more information www.linear.com/LTM8055 LTM8055 TYPICAL APPLICATIONS Two LTM8055s Powered from Different Input Sources to Run a Single Load. Each LTM8055 Draws No More Than 1.8A from Its Respective Power Source, and Are Synchronized 180° Out Of Phase with Each Other 0.025Ω SUPPLY 1 6V TO 36VIN VIN LTM8055 SVIN IOUT IIN 10µF 50V 36.5k 600kHz RUN CTL SS SYNC COMP RT CLKOUT LL MODE 47pF 0.025Ω SUPPLY 2 6V TO 36VIN VIN VOUT IINMON IOUTMON FB 11k VOUT IOUT SVIN IIN 10µF 50V 100k RUN CTL SS SYNC COMP RT LL MODE 47pF 22µF 25V GND CLKOUT IINMON IOUTMON FB 11k 8055 TA06a Input Current and Output Voltage vs Output Current 12VIN 14 2.5 12 2.0 10 1.5 8 6 1.0 0.5 0 0 VOUT (V) INPUT CURRENT (A) 36.5k 600kHz 68µF 35V 100k GND LTM8055 + 22µF 25V 3A MAX VOUT 12V 4 VOUT INPUT CURRENT, REGULATOR 1 2 INPUT CURRENT, REGULATOR 2 0 1 2 3 4 OUTPUT CURRENT (A) 8055 TA06b 8055fa For more information www.linear.com/LTM8055 21 LTM8055 PACKAGE DESCRIPTION Table 4. LTM8055 Pin Assignment (Arranged by Pin Number) PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION A1 VOUT B1 VOUT C1 VOUT D1 IOUT E1 GND F1 LL A2 VOUT B2 VOUT C2 VOUT D2 GND E2 GND F2 GND A3 VOUT B3 VOUT C3 VOUT D3 GND E3 GND F3 GND A4 VOUT B4 VOUT C4 VOUT D4 GND E4 GND F4 GND A5 VOUT B5 VOUT C5 VOUT D5 GND E5 GND F5 GND A6 VOUT B6 VOUT C6 VOUT D6 GND E6 GND F6 GND A7 GND B7 GND C7 GND D7 GND E7 GND F7 GND A8 GND B8 GND C8 GND D8 GND E8 GND F8 GND A9 GND B9 GND C9 GND D9 GND E9 GND F9 GND A10 GND B10 GND C10 GND D10 GND E10 GND F10 SVIN A11 GND B11 GND C11 GND D11 GND E11 GND F11 SVIN PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION G1 CLKOUT H1 RT J1 FB K1 SS L1 GND G2 MODE H2 SYNC J2 COMP K2 CTL L2 IOUTMON G3 GND H3 GND J3 GND K3 GND L3 IINMON G4 GND H4 GND J4 GND K4 GND L4 RUN G5 GND H5 GND J5 GND K5 GND L5 GND G6 GND H6 GND J6 GND K6 GND L6 GND G7 GND H7 GND J7 GND K7 GND L7 GND G8 GND H8 GND J8 GND K8 GND L8 GND G9 GND H9 GND J9 GND K9 GND L9 IIN G10 VIN H10 VIN J10 VIN K10 VIN L10 VIN G11 VIN H11 VIN J11 VIN K11 VIN L11 VIN 22 8055fa For more information www.linear.com/LTM8055 LTM8055 PACKAGE PHOTO 8055fa For more information www.linear.com/LTM8055 23 0.635 ±0.025 Ø 121x PACKAGE TOP VIEW 2.540 SUGGESTED PCB LAYOUT TOP VIEW 1.270 4 0.3175 0.000 0.3175 PIN “A1” CORNER E 1.270 aaa Z 2.540 D X For more information www.linear.com/LTM8055 6.350 5.080 3.810 2.540 1.270 0.000 1.270 2.540 3.810 5.080 6.350 Y aaa Z SYMBOL A A1 A2 b b1 D E e F G H1 H2 aaa bbb ccc ddd eee H1 SUBSTRATE NOM 4.92 0.60 4.32 0.78 0.635 15.00 15.00 1.27 12.70 12.70 0.32 4.00 A A2 MAX 5.12 0.70 4.42 0.85 0.660 NOTES DETAIL B PACKAGE SIDE VIEW 0.37 4.05 0.15 0.10 0.20 0.30 0.15 TOTAL NUMBER OF BALLS: 121 0.27 3.95 MIN 4.72 0.50 4.22 0.71 0.610 b1 DIMENSIONS ddd M Z X Y eee M Z DETAIL A Øb (121 PLACES) DETAIL B H2 MOLD CAP ccc Z A1 (Reference LTC DWG# 05-08-1891 Rev A) // bbb Z 24 Z Z BGA Package 121-Lead (15.00mm × 15.00mm × 4.92mm) F 11 10 9 7 6 5 4 PACKAGE BOTTOM VIEW 8 G 3 2 1 DETAIL A DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 4 L K J H G F E D C B A 7 TRAY PIN 1 BEVEL ! PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX µModule 7 SEE NOTES PIN 1 BGA 121 1112 REV A PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY 6. SOLDER BALL COMPOSITION CAN BE 96.5% Sn/3.0% Ag/0.5% Cu OR Sn Pb EUTECTIC 5. PRIMARY DATUM -Z- IS SEATING PLANE BALL DESIGNATION PER JESD MS-028 AND JEP95 3 2. ALL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 e COMPONENT PIN “A1” b 3 SEE NOTES LTM8055 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTM8055#packaging for the most recent package drawings. 8055fa 6.350 5.080 3.810 3.810 5.080 6.350 LTM8055 REVISION HISTORY REV DATE DESCRIPTION A 01/16 Added Buck-Bost Selection Table PAGE NUMBER 1 8055fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTM8055 25 LTM8055 TYPICAL APPLICATION 14.4V, 3A Lead-Acid Battery Charger Input Current Limited to 2.1A Input Current vs Input Voltage, IOUT = 3A 2.5 1µF 50V 0.022Ω VIN SVIN 0.02Ω VOUT LTM8055 IOUT IIN 36.5k 600kHz RUN CTL SS SYNC COMP RT LL MODE GND VOUT 14.4V + 100k 10µF 50V CLKOUT IINMON IOUTMON FB INPUT CURRENT (A) 2.0 VIN 3V TO 36V 47µF 25V 1.5 1.0 0.5 22µF 25V 9.09k 0 8055 TA07a 0 10 20 30 INPUT VOLTAGE (V) 40 8055 TA07b DESIGN RESOURCES SUBJECT DESCRIPTION µModule Design and Manufacturing Resources Design: • Selector Guides • Demo Boards and Gerber Files • Free Simulation Tools µModule Regulator Products Search 1. Sort table of products by parameters and download the result as a spread sheet. Manufacturing: • Quick Start Guide/Demo Manual • PCB Design, Assembly and Manufacturing Guidelines • Package and Board Level Reliability 2. Search using the Quick Power Search parametric table. TechClip Videos Quick videos detailing how to bench test electrical and thermal performance of µModule products. Digital Power System Management Linear Technology’s family of digital power supply management ICs are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature EEPROM for storing user configurations and fault logging. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTM4605 Higher Power Buck-Boost (Up to 60W) External Inductor, Synchronous Switching Buck-Boost; Up to 36VIN, 0.8V ≤ VOUT ≤ 16V LTM4607 Higher Power Buck-Boost (Up to 60W) External Inductor, Synchronous Switching Buck-Boost; Up to 36VIN, 0.8V ≤ VOUT ≤ 24V LTM4609 Higher Power Buck-Boost (Up to 60W) External Inductor, Synchronous Switching Buck-Boost; Up to 36VIN, 0.8V ≤ VOUT ≤ 34V LTM8045 Smaller, Lower Power SEPIC and Inverting; 700mA, 6.25mm × 11.25mm × 4.92mm BGA LTM8046 Isolated, Lower Power Flyback Topology, 550mA (5VOUT, 24VIN), UL60950, 2kVAC 26 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTM8055 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTM8055 8055fa LT 0116 REV A • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015