LTC2966 - 100V Micropower Dual Voltage Monitor

LTC2966
100V Micropower Dual
Voltage Monitor
FEATURES
DESCRIPTION
Wide Operating Range: 3.5V to 100V
n Wide Monitoring Range: 1.75V to 98V
n Quiescent Current: 7µA
n Adjustable Threshold Range
n Internal High Value Resistive Dividers
n ±1.4% (Max) Threshold Accuracy Over Temperature
n Polarity Selection
n100V Rated Outputs
n Selectable Built-In Hysteresis
n20-Lead SW and 16-Lead 3mm × 3mm QFN
Packages
The LTC®2966 is a low current, high voltage dual channel
voltage monitor. Internal high value resistors sense the
input monitor pins providing a compact and low power
solution for voltage monitoring. Each channel includes
two comparator reference inputs (INH/INL) to allow configuration of a high and low threshold using an external
resistive divider biased from the on-chip reference. Range
selection pins are provided for each channel to set the
internal resistive dividers for 5x, 10x, 20x and 40x scaling.
The thresholds are scaled according to the range selection
settings. Additionally, either INH or INL can be grounded
to enable built-in hysteresis. Polarity selection pins allow
each output to be inverted. The outputs are 100V capable
and include a 500k pull-up resistor to an internal supply.
n
APPLICATIONS
n
n
n
n
Portable Equipment
Battery-Powered Equipment
Telecom Systems
Automotive/Industrial Electronics
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Dual Undervoltage Monitor
RANGE
VIN MONITOR RANGE SELECTION
48V
24V
5V
REF
VINA
VINB
100k
200k
INHA
91k
OUTA
909k
48V UNDERVOLTAGE
5V
SYS
LTC2966
INLA
INHB
OUTB
5x
3.5V to 24.5V
10x
7V to 49V
20x
14V to 98V
40x
100k
*Requires either VINA or VINB > 3.5V
24V UNDERVOLTAGE
Supply Current vs VINA(B)
INLB
12
PSA RS1A RS2A PSB RS1B RS2B GND
10
8
IVA(B) (µA)
THRESHOLD
CONFIGURATION
1.75V* to 12.25V
POLARITY AND RANGE SELECTION
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
RANGE
CHANNEL
A
B
40.03V 20.0V
36.4V 18.2V
3.6V
1.8V
20x
10x
6
4
RANGE = 40x
OUTA(B) = LOW
VINB(A) = GND
IREF = 0µA
2
2966 TA01a
0
0
20
40
60
VINA (V)
–45°C
25°C
90°C
125°C
80
100
2966 TA01b
2966fb
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1
LTC2966
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Input Voltages
VINA, VINB............................................. –0.3V to 140V
PSA, PSB, RS1A, RS1B, RS2A, RS2B....... –0.3V to 6V
INHA, INHB, INLA, INLB........................... –0.3V to 6V
Output Voltages
OUTA, OUTB......................................... –0.3V to 140V
Average Currents
VINA, VINB.........................................................–20mA
OUTA, OUTB.......................................................±5mA
REF.....................................................................±5mA
INHA, INHB, INLA, INLB.....................................–1mA
Operating Ambient Temperature Range
LTC2966C................................................. 0°C to 70°C
LTC2966I..............................................–40°C to 85°C
LTC2966H........................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
PIN CONFIGURATION
TOP VIEW
VINA 1
OUTB
VINB
VINA
OUTA
TOP VIEW
16 15 14 13
REF 1
INHA 2
17
GND
INLA 3
6
7
8
RS2A
PSA
PSB
RS2B
18 OUTB
12 GND
NC 4
11 INHB
REF 5
16 GND
INHA 6
15 INHB
INLA 7
14 INLB
RS1A 8
13 RS1B
RS2A 9
12 RS2B
9
5
19 NC
OUTA 3
10 INLB
RS1A 4
20 VINB
NC 2
RS1B
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
17 NC
PSA 10
11 PSB
SW PACKAGE
20-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 68°C/W
EXPOSED PAD (PIN 17) PCB GND CONNECTION OPTIONAL
TJMAX = 150°C, θJA = 35°C/W
ORDER INFORMATION
(http://www.linear.com/product/LTC2966#orderinfo)
LEAD FREE FINISH
TUBE
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2966CUD#PBF
LTC2966CUD#TRPBF
LGMG
16-Lead (3mm × 3mm) Plastic QFN
0°C to 70°C
LTC2966IUD#PBF
LTC2966IUD#TRPBF
LGMG
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LTC2966HUD#PBF
LTC2966HUD#TRPBF
LGMG
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC2966CSW#PBF
LTC2966CSW#TRPBF
LTC2966SW
20-Lead Plastic Small Outline (Wide .300 Inch) 0°C to 70°C
LTC2966ISW#PBF
LTC2966ISW#TRPBF
LTC2966SW
20-Lead Plastic Small Outline (Wide .300 Inch) –40°C to 85°C
LTC2966HSW#PBF
LTC2966HSW#TRPBF
LTC2966SW
20-Lead Plastic Small Outline (Wide .300 Inch) –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
2966fb
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LTC2966
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VINA = VINB = 12V, RS1/RS2 = GND, PS = GND,
INH = 1.2V, INL = GND (Notes 1, 2).
SYMBOL
VIN
VMON
IVA
PARAMETER
Input Supply Operating Range
VIN Monitor Range
VINA Input Supply Current
IVB
VINB Input Supply Current
Undervoltage Lockout
Undervoltage Lockout Hysteresis
Comparator Reference Input: INHA, INHB, INLA, INLB
Comparator Common Mode Voltage
VCM
VIN Error Voltage at 96V
VERR
VUVLO
VIN Error Voltage at 48V
VIN Error Voltage at 24V
VIN Error Voltage at 12V
VOS
AVERR
VHYS
Comparator Offset Voltage
Internal Resistive Divider Range Error
Comparator Built-in Hysteresis
VHYTH
tPD
Built-in Hysteresis Enable Threshold
VIN to OUT Comparator Propagation Delay
IIN(LKG)
Input Leakage Current (INH, INL)
Reference: REF
Reference Output Voltage
VREF
Noise
Reference Output Noise
Control Inputs: RS1A, RS2A, RS1B, RS2B, PSA, PSB
Select Input Threshold
VTH
Input Leakage Current
ILKG
Status Outputs: OUTA, OUTB
Voltage Output Low
VOL
VOH
Voltage Output High
IOH
IO(LKG)
Output Current High
Leakage Current, Output High
CONDITIONS
VINA or VINB
(Note 3)
VINA = 100V, VINB = GND, 40x
VINA = GND, VINB = 100V, 40x
VINB = 100V, VINA = GND, 40x
VINB = GND, VINA = 100V, 40x
VINB = 100V, VINA = 5V, 40x
VINA or VINB Rising
VINA and VINB Falling
l
l
l
l
l
l
l
IREF ≤ 100µA, VIN ≥ 3.5V
100Hz to 100kHz
7
2
0.35
UNITS
V
V
µA
nA
µA
nA
µA
V
mV
V
mV
mV
mV
mV
mV
mV
mV
mV
mV
%
mV
mV
mV
µs
nA
nA
l
40
2.45
±1360
±400
±630
±150
±315
±75
±155
±35
±3
±0.4
30
–14
175
80
l
l
±0.1
±0.1
±1
±10
2.402
140
2.426
V
µVRMS
1.4
±100
V
nA
100
400
2.75
4
–5
±250
mV
mV
V
V
µA
nA
±250
±250
±100
±100
±35
±35
±15
±15
±1.9
l
l
l
l
l
l
l
l
l
l
l
l
14
–30
100
l
2.378
l
0.4
V = 2.4V
l
VIN = 1.25V, I = 10µA
VIN = 3.5V, I = 500µA
VIN = 3.5V, I = –1µA
VIN ≥ 4.5V, I = –1µA
V = GND, VIN = 3.5V
V = 100V, VIN = 6V
l
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
3
7
MAX
100
98
15
±50
15
±50
4
3
70
l
Overdrive = 10%, OUT Falling, 10x
INH = GND, INL = 1.2V
V = 1.2V, I-Grade
V = 1.2V, H-Grade
TYP
l
l
INH = VREF, 40x
0.35V ≤ INH ≤ 2.4V, 40x
INH = VREF, 20x
0.35V ≤ INH ≤ 2.4V, 20x
INH = VREF, 10x
0.35V ≤ INH ≤ 2.4V, 10x
INH = VREF, 5x
0.35V ≤ INH ≤ 2.4V, 5x
INH = 0.35V, 10x
INH = 2.4V, Range = 5x, 10x, 20x, 40x
INH = GND, INL Rising
INL = GND, INH Falling
MIN
3.5
1.75
3
l
l
l
l
2
2.5
–15
22
–22
2.375
3
–7.5
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: Requires either VINA or VINB >3.5V.
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LTC2966
TYPICAL PERFORMANCE CHARACTERISTICS
VINB Pin Current vs VINB
Supply Current vs VINA(B)
12
2.5
10
RANGE = 40x
OUTA(B) = LOW
VINA = 5V
IREF = 0µA
2.0
1.5
VREF (V)
IVB (µA)
1.0
2.396
4
RANGE = 40x
OUTA(B) = LOW
VINB(A) = GND
IREF = 0µA
2
0
20
40
60
VINA (V)
–45°C
25°C
90°C
125°C
–45°C
25°C
90°C
125°C
0.5
0
100
80
20
0
60
40
VINB (V)
80
2966 G01
VREF vs Load Current
2.450
VIN = 3.5V
VREF (V)
VREF (V)
2.375
0
0.4
1.2
1.6
0.8
LOAD CURRENT (mA)
2.0
% Range Error vs Temperature
25°C
2.400
2.350
2.7
3.0
3.5
3.2
VINA (V)
3.7
–500
–1000
–1500
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
2966 G07
4
125
PROPAGATION DELAY, tPD (µs)
VOS (µV)
0
4.0
–0.4
–50 –25
5x
10x
20x
40x
0
25 50 75 100 125 150
TEMPERATURE (°C)
2966 G06
VIN Falling Propagation Delay
vs % Overdrive
VINH(L) = 1.2V
500
0
2966 G05
Comparator VOS vs Temperature
1000
0.2
–0.2
1µA
100µA
1mA
2966 G04
1500
25 50 75 100 125 150
TEMPERATURE (°C)
0.4
2.375
–45°C
25°C
90°C
125°C
0
2966 G03
VREF vs VINA(B)
2.425
2.400
2.388
–50 –25
2966 G02
2.425
2.350
100
2.392
RANGE ERROR, AVERR (%)
2.450
2.400
Built-In Hysteresis
vs Temperature
VINL = 1.2V
VINH = GND
VIN = 12V
100
75
50
–45°C
25°C
90°C
125°C
25
0
0.1
1
10
% OVERDRIVE (%)
100
2966 G08
28
|BUILT-IN HYSTERESIS| VHYS (mV)
6
0
I = –10µA
2.408
2.404
8
IVA(B) (µA)
VREF vs Temperature
2.412
VINH(L) = 1.2V
26
24
22
20
18
16
–50
0
50
100
TEMPERATURE (°C)
150
2966 G09
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LTC2966
TYPICAL PERFORMANCE CHARACTERISTICS
Voltage Output High vs Pull-Down
Current (OUTA/OUTB)
4
Voltage Output Low vs Pull-Up
Current (OUTA/OUTB)
1.50
VIN = 12V
Voltage Output High
vs Input Voltage
3.5
VIN = 12V
1.25
3.2
1.00
2.9
I = –1µA
2
VOH (V)
VOL (V)
VOH (V)
3
0.75
2.3
0.50
1
0
–45°C
25°C
90°C
125°C
0
–6
–9
–3
PULL-DOWN CURRENT (µA)
–45°C
25°C
90°C
125°C
0.25
–12
0
2.6
0
1
5
2
3
4
PULL-UP CURRENT (mA)
2966 G10
2.0
1.7
3
4
5
6
7
8
VIN (V)
2966 G11
2966 G12
PIN FUNCTIONS
Exposed Pad (UD16 Only): Exposed pad may be left floating or connected to device ground.
GND: Device Ground.
INHA: Channel A High Comparator Reference Input . Voltage
on this pin is multiplied by the configured range setting
to set the VINA high or rising threshold. Keep within valid
voltage range, VCM, or tie to GND to configure built-in
hysteresis where high threshold for VINA becomes INLA
+ VHYS scaled according to the RS pin configuration.
INHB: Channel B High Comparator Reference Input . Voltage
on this pin is multiplied by the configured range setting
to set the VINB high or rising threshold. Keep within valid
voltage range, VCM, or tie to GND to configure built-in
hysteresis where high threshold for VINB becomes INLB
+ VHYS scaled according to the RS pin configuration.
INLA: Channel A Low Comparator Reference Input. Voltage
on this pin is multiplied by the configured range setting
to set the VINA low or falling threshold. Keep within valid
voltage range, VCM, or tie to GND to configure built-in
hysteresis where low threshold becomes INHA – VHYS
scaled according to the RS pin configuration. Otherwise,
INHA-INLA sets the hysteresis of the Channel A comparator. Oscillation will occur if INLA > INHA unless built-in
hysteresis is enabled.
INLB: Channel B Low Comparator Reference Input . Voltage
on this pin is multiplied by the configured range setting
to set the VINB low or falling threshold. Keep within valid
voltage range, VCM, or tie to GND to configure built-in
hysteresis where low threshold becomes INHB – VHYS
scaled according to the RS pin configuration. Otherwise,
INHB-INLB sets the hysteresis of the Channel B comparator. Oscillation will occur if INLB > INHB unless built-in
hysteresis is enabled.
OUTA: Channel A Comparator Output. OUTA consists
of a high voltage active pull-down and a gated, resistive
(500kΩ) pull-up to an internally generated supply between
3.5V and 5V depending on input supply voltage. Blocking
circuitry at the pin allows the pin to be resistively pulled
up to voltages as high as 100V without back conducting
onto the internal supply of the part. Polarity with respect
to the VINA pin is configured using the polarity select pin,
PSA. OUTA pulls low when the part is in UVLO.
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LTC2966
PIN FUNCTIONS
OUTB: Channel B Comparator Output. OUTB consists
of a high voltage active pull-down and a gated, resistive
(500kΩ) pull-up to an internally generated supply between
3.5V and 5V depending on input supply voltage. Blocking
circuitry at the pin allows the pin to be resistively pulled
up to voltages as high as 100V without back conducting
onto the internal supply of the part. Polarity with respect
to the VINB pin is configured using the polarity select pin,
PSB. OUTB pulls low when the part is in UVLO.
PSA: Channel A Polarity Selection. Connect to REF or a
voltage >VTH to configure comparator output to be inverting with respect to VINA. Otherwise connect pin to GND
to configure comparator output to be noninverting with
respect to VINA.
PSB: Channel B Polarity Selection. Connect to REF or a
voltage >VTH to configure comparator output to be inverting with respect to VINB. Otherwise connect pin to GND
to configure comparator output to be noninverting with
respect to VINB.
6
REF: Reference Output. VREF with respect to GND. Use a
maximum of 1nF to bypass unless damping resistor is used.
RS1A-RS2A: Channel A Range Select Input. RS1A-RS2A
select 5x, 10x, 20x or 40x range for Channel A. Connect
to REF or GND to configure the pin. (See Table 1)
RS1B-RS2B: Channel B Range Select Input. RS1B-RS2B
select 5x, 10x, 20x or 40x range for Channel B. Connect
to REF or GND to configure the pin. (See Table 1)
VINA, VINB: Voltage Monitor and Supply Inputs. An internal
high value resistive divider is connected to the pin. The
greater of VINA and VINB is used to generate an internal
voltage rail with priority given to VINA. If both VINA and
VINB fall below the UVLO threshold minus hysteresis, the
outputs are pulled low. If VINB < VINA < 1.2V, the logic
state of the outputs cannot be guaranteed.
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LTC2966
BLOCK DIAGRAM
REF
1X
VINA
VREF
VINB
VIN
PRIORITIZER
GND
70M
VINT
+
–
VHYTH
INHA
–+
INHB
70M
+
VHYS
VINT
VHYS
500k
–
+–
OUTA
INLA
OUTB
INLB
VHYTH
–
+
PSA
RS1A
5x/10x/20x/40x
RS2A
PSB
RS1B
RS2B
CHANNEL A
CHANNEL B
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7
LTC2966
OPERATION
The LTC2966 is a micropower dual channel voltage monitor
with a 100V maximum operating voltage. Each channel is
comprised of an internal high value resistive divider and a
comparator with a high voltage output. A reference voltage
is provided to allow the thresholds of each channel to be
set independently. This configuration has the advantage
of being able to monitor very high voltages with very little
current draw while threshold configuration is done using
low value resistors at low voltages.
The two channels of the LTC2966 provide independent
monitoring capabilities for multiple voltages or work in
conjunction to set up an undervoltage/overvoltage monitor.
Integration of a resistive divider for high voltage sensing
makes the LTC2966 a compact and low power solution for
generating voltage status signals to a monitoring system.
A built-in buffered reference gives the monitor flexibility to
operate independently from a high voltage supply without
the requirement of additional low voltage biasing. The reference provides an accurate voltage from which a resistive
divider to ground configures the threshold voltage for the
internal comparators. In addition, the REF pin can be used
as a logic high voltage for the range and polarity select pins.
The input voltage threshold at VIN is determined by the
voltage on the INH and INL pins which are scaled by the
attenuation internal resistive divider. In the LTC2966 the
attenuation of the internal divider is configured using two
range select pins, RS1 and RS2 to select 5x, 10x, 20x or
40x for each channel. Use Table 1 to determine the correct
configuration for a desired range setting. The polarity select
pins, (PSA/PSB), configure the corresponding OUT pin to
be inverting or noninverting with respect to VIN allowing
the part to be configured for monitoring overvoltage and
undervoltage conditions with either polarity output.
8
Table 1.
VIN MONITOR
RANGE
RANGE
SELECTION
1.75V* to 12.25V
5x
3.5V to 24.5V
10x
7V to 49V
20x
14V to 98V
40x
*Requires either VINA or VINB > 3.5V.
RS1
RS2
L
H
L
H
L
L
H
H
The INH pin determines the high or rising edge threshold
for VIN in each channel. If the monitored voltage connected
to VINA rises to the scaled INHA voltage then the OUT pin
is pulled high assuming PSA is ground. Likewise, the INL
pin determines the low or falling edge threshold for VIN in
each channel. If VINA falls to the scaled INLA voltage then
the OUT pin is pulled low assuming PSA is ground. The
amount of hysteresis referred to VIN is the difference in
voltage between INH and INL scaled according to the RS
pin configuration. INH and INL have an allowable voltage
range, VCM. Figure 1 shows the allowable monitor voltage
at VIN for each range as a function of comparator reference
input voltage (INL, INH).
Typically, an external resistive divider biased from REF is
used to generate the INH and INL pin voltages. A built-in
hysteresis feature requiring only two resistors can be
enabled on either the VIN rising edge by grounding INH
or on the falling edge by grounding INL. For example, it
is appropriate to ground INH to activate rising edge hysteresis if an accurate falling voltage threshold is required
for undervoltage detection. Conversely, it is appropriate
to ground INL for falling edge built-in hysteresis if an accurate overvoltage threshold is required. Do not ground
both INH and INL. Oscillation occurs if VINL > VINH unless
INH built-in hysteresis is enabled.
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LTC2966
OPERATION
Supply current is drawn from the higher of VINA or VINB
with priority given to VINA. If both VIN pins fall below the
UVLO threshold then both OUT pins are pulled low regardless of the PS pin state.
100
40x
MONITOR THRESHOLD, VIN (V)
The high voltage OUT pins have the capability to be pulled
up to a user defined voltage as high as 100V with an
external resistor. The LTC2966 also includes an internal
500k pull-up resistor to an internal voltage between 3.5V
and 5V depending on input supply voltage. (See VOH in
Electrical Characteristics) Wire-OR functionality is implemented by connecting OUTA and OUTB with appropriate
monitor configuration.
20x
10x
5x
10
1
0.5
1
1.5
2
2.5
COMPARATOR REFERENCE INPUT (INL, INH) (V)
2966 F01
Figure 1. Monitor Threshold Threshold vs
Comparator Reference Inputs
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LTC2966
APPLICATIONS INFORMATION
Threshold Configuration
The closest 1% value is 909kΩ. R2 can be determined from:
Each LTC2966 channel (A/B) monitors the voltage applied
to the corresponding VIN input. A comparator senses the
VIN pin on one of its inputs through the internal resistive
divider. The other input is connected to INH/INL that is
in turn biased with external resistive dividers off of the
REF pin as shown in Figure 2a and 2b. The VIN rising and
falling thresholds are determined by:
VIN(RISE) = RANGE • VINH
R2 =
=
( VINH •RSUM ) –R1
VREF
(2V •1.2MΩ ) – 909kΩ = 90.2kΩ
2.402V
The closest 1% value is 90.9kΩ. R3 can be determined
from RSUM:
R3 = RSUM – R1 – R2 = 1.2MΩ – 909kΩ – 90.9kΩ
= 200.1kΩ
VIN(FALL) = RANGE • VINL
Where RANGE is the configured range of the internal
resistive divider. In order to set the threshold for the
LTC2966, choose an appropriate range setting for the
desired VIN voltage threshold such that the INH and INL
voltages are within the specified common mode range,
VCM. For example, if a falling threshold of 18V is desired
for monitoring a 24V power supply then a range greater
than 10x is allowed. However, to maximize the accuracy
of the VIN threshold the smallest acceptable range is used,
10x in this case. To implement 2V of hysteresis referred
to VIN this means:
VINH = 2V, VINL = 1.8V
With 10x range the VIN thresholds are:
VIN(RISE) = 20V, VIN(FALL) = 18V
One possible way to configure the thresholds is by using three resistors to set the voltages on INH and INL.
See Figure 2a. The solution for R1, R2 and R3 provides
three equations and three unknowns. Maximum resistor
size is governed by maximum input leakage current. The
maximum input leakage current below 85°C is 1nA. For
a maximum error of 1% due to both input currents, the
resistive divider current should be at least 100 times the
sum of the leakage currents, or 0.2µA.
If in this example, a leakage current error of 0.1% is desired
then the total divider resistance is 1.2MΩ which results in
a current of 2µA through this network. For RSUM = 1.2MΩ
The closest 1% value is 200kΩ. Plugging the standard
values back into the equations yields the design values
for the VINH and VINL voltages:
VINH = 2.001V, VINL = 1.819V
The corresponding threshold voltages are:
VIN(RISE) = 20.01V, VIN(FALL) = 18.19V
Another possible way to configure the thresholds is with
independent dividers using two resistors per threshold to
set the voltages on INH and INL. See Figure 2b. Care must
be taken such that the thresholds are not set too close to
each other, otherwise the mismatch of the resistors may
cause the voltage at INL to be greater than the voltage at
INH which may cause the comparator to oscillate.
As in the previous example, if RSUM = 1.2MΩ is chosen
and the target for VINL is 1.8V:
RSUM = R1+R2
R1=
( VINL •RSUM ) = (1.8V •1.2MΩ ) = 899.5kΩ
VREF
2.402V
The closest 1% value is 909kΩ. R2 can be determined by:
R1
VINL
(909kΩ ) = 304kΩ
= ( 2.402V – 1.8V ) •
1.8V
R2 = ( VREF – VINL ) •
RSUM = R1+R2+R3
R1=
10
( VINL •RSUM ) = (1.8V •1.2MΩ ) = 899.5kΩ
VREF
2.402V
2966fb
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LTC2966
APPLICATIONS INFORMATION
The closest 1% value is 301kΩ. Plugging the standard
values back into the equation for VINL yields the design
voltage for VINL:
(R1• VREF ) = (909kΩ • 2.402V ) = 1.804V
VINL =
(R1+R2) (301kΩ + 909kΩ )
At this point in the independent divider example only the
values required to set the voltage at INL have been found.
Repeat the process for the INH input by substituting the
above equations with VINH for VINL, R3 for R1, R4 for R2
and VINH = 2.0V.
R3
VIN
VIN
VINA
REF
OUTA
1/2 LTC2966
RS1A
VINA
REF
OUTA
1/2 LTC2966
RS1A
INHA
R1
R4
INHA
RS2A
R2
INLA
R2
PSA
GND
INLA
R1
R3
VIN(RISE) = RANGE • (INL + VHYS)
VIN(FALL) = RANGE • INL
Figure 3b introduces built-in hysteresis on the falling edge
because INL is pulled to ground. Similarly, a two-resistor
network, R3 and R4, is used to set the voltage on INH using:
R4 VREF
=
–1
R3 VINH
Using built-in hysteresis the VIN thresholds are:
VIN(RISE) = RANGE • INH
VIN(FALL) = RANGE • (INH – VHYS)
RS2A
PSA
GND
2966 F02ab
Figure 2a. Three-Resistor
Threshold Configuration
Using built-in hysteresis, the VIN thresholds are:
Figure 2b. Two-Resistor
Threshold Configuration
Consider VINH = 2V with built-in hysteresis activated on
the falling edge. For 10x range, 1.1% falling hysteresis is
obtained. If a larger percentage of hysteresis is desired
then VINH is alternatively set to 1V and the range is selected
to be 20x to obtain the same VIN threshold but with 2.2%
falling hysteresis. The amount of built-in hysteresis is
scaled according to Table 2. If more hysteresis is needed
then it is implemented in the external resistive divider as
described in the Threshold Configuration section.
Using Built-In Hysteresis
The LTC2966 has the capability of simplifying the threshold
configuration such that only two resistors per channel are
required. The device pins can be configured to select a
built-in hysteresis voltage, VHYS, which can be applied to
either the rising or falling threshold depending on whether
the INH or INL pin is grounded. Note that the hysteresis
voltage at each range setting remains at a fixed value.
Figure 3 introduces examples of each configuration. For
example, if INH is biased from an external divider and the
INL pin is grounded, then hysteresis is enabled on the
low or falling threshold. The low threshold is then –VHYS
relative to the high threshold determined by INH. Figure 3a
introduces built-in hysteresis on the rising edge because
INH is pulled to ground. A two-resistor network, R1 and
R2, is used to set the voltage on INL using:
R2 VREF
=
–1
R1 VINL
VIN
VIN
VINA
OUTA
REF
1/2 LTC2966
RS1A
VINA
OUTA
REF
1/2 LTC2966
RS1A
R2
RS2A
INHA
RS2A
INH
PSA
INLA
R1
R4
PSA
INL
R3
GND
GND
2966 F03ab
Figure 3a. Rising Edge
Built-In Hysteresis by
Grounding INH
Figure 3b. Falling Edge
Built-In Hysteresis by
Grounding INL
Table 2. Built-In Hysteresis Voltage vs Range
RANGE
VIN REFERRED BUILT-IN HYSTERESIS
5x
110mV
10x
220mV
20x
440mV
40x
880mV
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11
LTC2966
APPLICATIONS INFORMATION
Error Analysis
VIN thresholds are subject to the following errors:
• REF Voltage Variation (∆VREF)
• Comparator Offset (VOS)
• Internal Divider Range Error (AVERR)
• External Resistive Divider Error (AXERR)
The effect these errors have on the VIN threshold is
expressed by:
VINH(L)
⎡
⎤
VERR = RANGE • ⎢ ±VOS ± ∆VREF •
± VINH(L) • A XERR ⎥
VREF
⎣
⎦
±RANGE • A VERR • VINH(L)
A XERR = 2 •
TOLERANCE ⎛ VINH(L) ⎞
• ⎜ 1–
⎟
⎝
100
VREF ⎠
External divider error is determined by the percentage tolerance values of the resistors. If 1% tolerance resistors are
used in the external divider then there is a 2% worst-case
voltage error associated with it. The effects of comparator
offset and VREF voltage are uncorrelated with each other.
Therefore, a Root-Sum-Square can be applied to the error
voltage referred to VIN. Using the example from Threshold
Configuration and assuming 1% resistors implement the
external resistive divider, the falling VIN threshold of approximately 18V has an error tolerance of:
VERR(REF)
Improving Threshold Accuracy
The biggest threshold error terms are:
• External Resistive Divider Accuracy
• REF Voltage Variation
Even using 1% tolerance resistors, external resistive divider
accuracy still accounts for as much as ±2% threshold error
while REF voltage variation accounts for ±1% threshold
error. In order to minimize these threshold error terms,
an external reference can be used to set the thresholds for
INH/INL as shown in Figure 4. An LT6656-2.048 has an
initial accuracy of 0.05% and provides bias via the 0.1%
resistive divider network for INH and INL. It is biased off
of the LTC2966 REF pin. The threshold error tolerance
is calculated using the method described in the Typical
Applications section with ∆VREF = ±1.024mV given the
initial accuracy of the LT6656 2.048V output and using
0.1% tolerance resistors for the external divider.
⎛
V ⎞
VERR(REF) = (RANGE ) ⎜ ±∆VREF • INL ⎟
VREF ⎠
⎝
1.8V ⎞
⎛
= (10 ) • ⎜ ±1.024mV •
⎟ = ±9mV
⎝
2.048V ⎠
⎛
⎛ V ⎞⎞
VERR(EXT) = (RANGE ) ⎜ ±VINL • 2 • 0.001• ⎜ 1– INL ⎟ ⎟
⎝ VREF ⎠ ⎠
⎝
⎛
V ⎞
= (RANGE ) ⎜ ±∆VREF • INL ⎟
V
⎝
REF ⎠
1.8V ⎞
⎛
= (10 ) • ⎜ ±24mV •
⎟ = ±180mV
⎝
2.402V ⎠
⎛
⎛ V ⎞⎞
VERR(EXT) = (RANGE ) ⎜ ±VINL • 2 • 0.01• ⎜ 1– INL ⎟ ⎟
⎝ VREF ⎠ ⎠
⎝
= (10 ) • ( ±1.8V • 0.005) = ±90mV
VERR(VOS) = (RANGE ) ( ±∆VOS ) = (10 ) • ( ±16mV ) = ±160mV
= (10 ) • ( ±1.8V • 0.0005) = ±9mV
VERR(VOS) = (RANGE ) ( ±∆VOS ) = (10 ) • ( ±1.6mV ) = ±16mV
VERR(RS) = (RANGE ) ( ±A VERR ) ( ±VINL )
= (10 ) • ( ±0.004) • (1.8V ) = ±72mV
2
2
2
2
VERR = VERR(REF)
+ VERR(EXT)
+ VERR(VOS)
+ VERR(RS)
=
VERR(RS) = (RANGE ) ( ±A VERR ) ( ±VINL )
= (10 ) • ( ±0.004) • (1.8V ) = ±72mV
2
2
2
2
VERR = VERR(REF)
+ VERR(EXT)
+ VERR(VOS)
+ VERR(RS)
=
The actual VIN falling threshold has an error tolerance of
±267mV or ±1.48%.
( ±180mV )2 + ( ±90mV )2 + ( ±160mV )2 + ( ±72mV )2
( ±9mV )2 + ( ±9mV )2 + ( ±16mV )2 + ( ±72mV )2
= ±75mV
The resulting VIN threshold error is reduced to ±0.42%
from ±1.48% in the previous error analysis example.
= ±267mV
12
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LTC2966
APPLICATIONS INFORMATION
VIN
R3
47.5k
0.1%
1µF
R4
10k
LT6656-2.048
OUT
IN
GND
REF
VIN
LTC2966
INH
R2
200k
0.1%
INL
R1
1.8M
0.1%
GND
2966 F04
Figure 4. Reducing VIN Threshold Error
Disabling a Channel
Figure 5 shows the proper technique for disabling a channel. Table 4 summarizes the correct connections. Correctly
disabling an unused channel prevents its comparator
output from chattering and introducing unwanted noise
in the system.
Table 4. Disabling a Channel
PIN
CONNECT TO
VIN
GND
INH
REF
INL
GND
RS1
GND or REF
RS2
GND or REF
PS
GND or REF
OUT
Open
OPEN
VINA
REF
OUTA
1/2 LTC2966
INHA
RS1A
INLA
OPEN
RS2A
PSA
GND
2966 F05
Figure 5. Disabling a Channel
Output Configuration with Polarity Selection
The OUT pin may be used with a wide range of user-defined
voltages up to 100V with an external resistor. Select a
resistor compatible with desired output rise time and load
current specifications. When the status outputs are low,
power is dissipated in the pull-up resistors. An internal
pull-up is present if the OUT pins are left floating or if
low power consumption is required. The internal pull-up
resistor does not draw current if an external resistor pulls
OUT up to a voltage greater than VOH.
If PS is connected to ground, the comparator output is
noninverting. This means that OUT pulls low when VIN
falls below the scaled INL voltage. OUT is released after
VIN rises above the scaled INH voltage. Likewise, if PS
is connected to REF or a voltage >VTH, the comparator
output is inverting. This means that OUT pulls low when
VIN rises above the scaled INH voltage and is released
when VIN falls below the scaled INL voltage.
If both VIN pins fall below the UVLO threshold minus hysteresis, the outputs are pulled to ground. The outputs are
guaranteed to stay low for VINA ≥ VINB ≥ 1.25V regardless
of the output logic configuration.
It is recommended that circuit board traces associated
with the OUT pin be located on a different layer than those
associated with the INH/INL and REF pins where possible
to avoid capacitive coupling.
Hot Swap Events
The LTC2966 can withstand high voltage transients up
to 140V. However, when a supply voltage is abruptly
connected to the input resonant ringing can occur as a
result of series inductance. The peak voltage could rise
to 2x the input supply, but in practice can reach 2.5x if
a capacitor with a strong voltage coefficient is present.
Circuit board trace inductances of as little as 10nH can
produce significant ringing. Ringing beyond the absolute
maximum specification can be destructive to the part and
should be avoided whenever possible. One effective means
to eliminate ringing seen at the VIN pins and to protect the
part is to include a 1kΩ to 5kΩ resistance between the
monitored voltage and the VIN pin as shown in Figure 6.
This provides damping for the resonant circuit. If there
is a decoupling capacitor on the VINA/VINB pins the time
constant formed by the RC network should be considered.
2966fb
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13
LTC2966
APPLICATIONS INFORMATION
VIN
REF
RS
1k
REF
LTC2966
RS
VINA/VINB
INH
CREF
LTC2966
INL
LTC2966
RS
INH
CREF
INL
GND
2966 F06
7a
Figure 6. Hot Swap Protection
7b
Appropriate spacing between component lead traces is
critical to avoid flashover between conductors. There
are multiple industry and safety standards that have
different spacing requirements depending on factors such
as operating voltage, presence of conformal coat, elevation, etc. The LTC2966 is available in a 20-lead SW package which offers pin-to-pin clearance of at least 0.76mm
(0.03in) to satisfy high voltage external component lead
specifications for standards such as the UL60950 and
IPC2221. The package incorporates unconnected pins
between all adjacent high voltage and low voltage pins to
maximize PC board trace clearance. For voltages >30V the
SW should be used, otherwise the smaller QFN is sufficient
when clearance is not an issue. For more information, refer
to the printed circuit board design standards described in
IPC2221 and UL60950.
Voltage Reference
The REF pin is a buffered reference with a voltage of VREF
referenced to GND. A bypass capacitor up to 1000pF
in value can be driven by the REF pin directly. Larger
capacitances require a series resistance to dampen the
transient response as shown in Figure 7A. If a resistive
divider is already present then the bypass capacitor can
be connected to the INH or INL pin as shown in Figure 7B.
Figure 7C shows the resistor value required for different
capacitor values to achieve critical damping. Bypassing the reference can help prevent false tripping of the
comparators by preventing glitches on the INH/INL pins.
Figure 8 shows the reference load transient response.
Figure 9 shows the reference line transient response. If
there is a decoupling capacitor on the INH/INL pin the time
constant formed by the RC network should be considered.
Use a capacitor with a compatible voltage rating.
RESISTANCE VALUE (kΩ)
100
High Voltage Pin Creepage/Clearance Options
14
GND
2966 F07ab
GND
10
1
0.1
0.001
0.01
0.1
CAPACITANCE VALUE (µF)
1
2966 F07c
7c
Figure 7. Using Series Resistance to Dampen REF
Transient Response
1nF
10nF + 4.3kΩ
0.1µF + 1.5kΩ
1µF + 600Ω
2.4V
50mV/DIV
100µA
VREF
LOAD CURRENT
10µA
2966 F08
100µs/DIV
Figure 8. VREF Load Transient
1nF
1µF + 600Ω
2.4V
10mV/DIV
8V
VREF
VINA
1V/DIV
3.5V
2966 F09
10µs/DIV
Figure 9. VREF Line Transient
2966fb
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LTC2966
TYPICAL APPLICATIONS
48V UV/OV Monitor
±15V Undervoltage Monitor
The circuit in Figure 10 monitors a single 48V supply
and is configured for UV/OV window detection. Channel
A is used to monitor undervoltage conditions where the
36V threshold is determined by 1.8V at INLA scaled by
20x. Channel B is used to monitor overvoltage conditions
where the 72V threshold is determined by the same 1.8V
at INHB with 40x range. UV is pulled high to indicate an
undervoltage condition when the supply drops below the
UV threshold. Therefore PSA is pulled to REF to obtain
the correct polarity on OUTA. OV is pulled high when the
supply rises above the OV threshold which means PSB is
pulled to ground to obtain the appropriate output polarity.
Connecting INHA and INLB to ground enables internal
hysteresis for each channel in the appropriate direction
and reduces the number of external components.
The LTC2966 can be used to monitor a positive and a
negative supply simultaneously. In the circuit shown in
Figure 11, Channel B is used to monitor the –15V supply
by connecting VINB’s internal resistor divider to REF and
configuring to 5x range. The voltage at the VIN sensing
input of the Channel B comparator is fixed at 480mV. When
the –15V supply is undervoltage INHB > 480mV and OUTB
is pulled low because PSB is connected to ground. As the
negative supply comes into regulation the comparator
monitors the INHB pin to detect when its voltage crosses
480mV corresponding to –14.3V. UVB is released indicating
that there is no longer an undervoltage condition. As the
negative supply drops out of regulation the comparator
monitors the INLB pin to detect when its voltage crosses
480mV, corresponding to –13.6V due to the external divider
48V OV/UV MONITOR
CHANNEL
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
RANGE
A
36.6V
36.0V
0.6V
20x
B
72.2V
71.2V
1.0V
40x
48V
5V
VINA
C1
1000pF
10V
VINB
R3
100k
REF
R2
294k
INHA
INLA
R1
887k
OUTA
R4
100k
UV
LTC2966
5V
SYS
INHB
INLB
OUTB
OV
PSA RS1A RS2A PSB RS1B RS2B GND
2966 F10
Figure 10. Use Range Selection and Built-In Hysteresis to Minimize External Components
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15
LTC2966
TYPICAL APPLICATIONS
gain. UVB is pulled low after the comparator detects the
threshold crossing to indicate an undervoltage condition.
Channel A is configured to monitor for an undervoltage
condition on the 15V supply by pulling UVA low when the
positive supply drops below 13.6V.
OV thresholds, where channel A and B are configured
similarly to the 48V UV/OV monitor circuit in Figure 10.
Hysteresis for each comparator is implemented by the
external resistor network. High voltage OUT pins allow a
pair of 4N25 opto-couplers to be used in translating the
status signals for the 5V system. R5, R6, R7 and R8 set the
maximum current through the optos to be approximately
4.2mA. If an exposed pad is present it should be tied to
the GND pin or left open.
–48V UV/OV Voltage Monitor
In the circuit shown in Figure 12, the LTC2966 is configured
as a –48V UV/OV monitor by referencing the GND pin to
the negative supply. R1 through R4 configure the UV and
±15V UV MONITOR
CHANNEL
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
RANGE
A
14.3V
13.5V
0.8V
10x
B
–14.4V
–13.6V
–0.8V
5x
15V
5V
VINA
RS
600
C1
1µF
10V
REF
R3
162k
R7
100k
INHA
R2
12.4k
R1
226k
VINB
R4
182k
R5
8.6k
R6
1.4M
INLA
INHB
OUTA
R8
100k
UVA
LTC2966
5V
SYS
OUTB
UVB
INLB
PSA RS1A RS2A PSB RS1B RS2B GND
RTN
–15V
2965 F11
Figure 11. Dual Polarity Voltage Monitoring
16
2966fb
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LTC2966
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC2966#packaging for the most recent package drawings.
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)
0.70 ±0.05
3.50 ±0.05
1.45 ±0.05
2.10 ±0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ±0.05
15
PIN 1
TOP MARK
(NOTE 6)
16
0.40 ±0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ±0.05
0.50 BSC
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17
LTC2966
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC2966#packaging for the most recent package drawings.
SW Package
20-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 ±.005
.030 ±.005
TYP
.496 – .512
(12.598 – 13.005)
NOTE 4
N
20
18
17
16
15
14
13
12
11
N
.325 ±.005
.420
MIN
19
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.005
(0.127)
RAD MIN
.009 – .013
(0.229 – 0.330)
NOTE:
1. DIMENSIONS IN
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029 × 45°
(0.254 – 0.737)
1
2
3
4
5
6
7
8
.093 – .104
(2.362 – 2.642)
9
10
.037 – .045
(0.940 – 1.143)
0° – 8° TYP
NOTE 3
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.356 – 0.482)
TYP
.004 – .012
(0.102 – 0.305)
S20 (WIDE) 0502
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
18
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LTC2966
REVISION HISTORY
REV
DATE
DESCRIPTION
A
09/15
Fixed typos
PAGE NUMBER
B
03/16
Added ABS Max Rating for INHA, INHB, INLA and INLB pins
1, 3, 10, 11,
12, 15
2
2966fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more
www.linear.com/LTC2966
tion that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
19
LTC2966
TYPICAL APPLICATION
–48V UV/OV MONITOR
CHANNEL
A
RISING THRESHOLD
–40.0V
FALLING THRESHOLD –36.0V
HYSTERESIS
–4.0V
RANGE
20x
5V
R9
100k
B
–72.0V
–56.0V
–16.0V
40x
OV
4.2mA
AT –48V
RTN
R8
1k
4N25
C1
1000pF
10V
R3
33.2k
R2
66.5k
REF
VINA
4N25
VINB
OUTA
INHA
INLA
5V
SYS
4.2mA
AT –48V
R6
1k
R4
66.5k
R10
100k UV
R5
10k
LTC2966
INHB
OUTB
R7
10k
INLB
PSA RS1A RS2A PSB RS1B RS2B GND
R1
232k
2966 F12
–48V
Figure 12. Monitoring Negative Voltage with Isolation
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Micropower Triple Supply Monitor with Push-Pull Reset Output
LTC2900/LTC2901/ Programmable Quad Supply Monitor
LTC2902
Adjustable Reset, Watchdog Timer and Tolerance,
10-Lead MSOP and DFN Packages
LTC2903
6-Lead SOT-23 and DFN Packages
Precision Quad Supply Monitor
LTC2904/LTC2905/ Three-State Programmable Precision Dual Supply Monitor
LTC2906/LTC2907
8-Lead SOT-23 and DFN Packages
LTC2908
8-Lead TSOT-23 and DFN Packages
Precision Six-Supply Monitor (Four Fixed and Two Adjustable)
LTC2909/LTC2919 Precision Triple/Dual Input UV, OV and Negative Voltage Monitor
Shunt Regulated VCC Pin, Adjustable Threshold and Reset
LTC2910
Separate VCC Pin, Eight Inputs, Up to Two Negative Monitors
Adjustable Reset Timer, 16-Lead SSOP and DFN Packages
Octal Positive/Negative Voltage Monitor
LTC2912/LTC2913/ Single/Dual/Quad UV and OV Voltage Monitors
LTC2914
Separate VCC Pin, Adjustable Reset Timer
LTC2915/LTC2916/ Single Voltage Supervisors with 27 Pin-Selectable Thresholds
LTC2917/LTC2918
Manual Reset and Watchdog Functions, 8- and 10-Lead
TSOT-23, MSOP and DFN Packages
LTC2965
100V Micropower Single Voltage Monitor
3.5V to 98V Monitoring Range, 3.5V to 100V Operating Range,
7µA Quiescent Current
LTC2960
36V Nano-Current Two Input Voltage Monitor
36V, 850nA Quiescent Current, 2mm × 2mm 8-Lead DFN and
TSOT-23 Packages
LT6700
Micropower Dual Comparator with 400mV Reference
SOT-23, 2mm × 3mm DFN Package
20 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC2966
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2966
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LT 0316 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2015