UCT T R OD RODU C P E P T E E L T O U OBS UBSTIT 55290 L S S I E SIBL L55190, Data ISheet P OS S ® Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp The ISL55191 and ISL55291 are single and dual high speed operational amplifiers featuring low noise, low distortion, and rail-to-rail output drive capability. They are designed to operate with single and dual supplies from +5VDC (±2.5VDC) down to +3VDC (±1.5VDC). These amplifiers draw 6.1mA of quiescent supply current per amplifier. For power conservation, this family offers a low-power shutdown mode that reduces supply current to 21µA and places the amplifiers' output into a high impedance state. The ISL55191 ENABLE logic places the device in the shutdown mode with EN = 0 and the ISL55291 is placed in the shutdown mode with EN = 1. ISL55191, ISL55291 March 30, 2007 FN6263.1 Features • 1.3nV/√Hz input voltage noise, fO = 1kHz • Harmonic Distortion -94dBc, -104dBc, fO = 1MHz • Stable at gains as low as 10 • 800MHz gain bandwidth product (AV = 10) • 260V/µs slew rate • 6.1mA supply current (21µA in disable mode) • 800µV maximum offset voltage • 12µA input bias current • 3V to 5.5V single supply voltage range • Rail-to-rail output These amplifiers have excellent input and output overload recovery times and outputs that swing rail-to-rail. Their input common mode voltage range includes ground. The ISL55191 and ISL55291 are stable at gains as low as 10 with an input referred noise voltage of 1.3nV/√Hz and harmonic distortion products -94dBc (2nd) and -104dBc (3rd) below a 1MHz 2VP-P signal. The ISL55191 is available in space-saving 8 Ld DFN and 8 Ld SOIC packages. The ISL55291 is available in a 10 Ld MSOP package. ISL55191IBZ PART MARKING TAPE AND REEL 55191 IBZ - ISL55191IBZ-T13 55191 IBZ ISL55191IRZ ISL55291IUZ - • Low noise signal processing • ADC buffers • DAC output amplifiers • Radio systems PACKAGE (Pb-Free) 8 Ld SOIC TABLE 1. ENABLE LOGIC PKG. DWG. # ENABLE DISABLE ISL55191 EN = 1 EN = 0 ISL55291 EN = 0 EN = 1 MDP0027 8 Ld DFN L8.3x3D 13” 8 Ld DFN L8.3x3D (2,500 pcs) Tape and Reel 5291Z ISL55291IUZ-T13 5291Z • High speed pulse applications 13” 8 Ld SOIC MDP0027 (2,500 pcs) Tape and Reel 191Z ISL55191IRZ-T13 191Z Applications • Portable equipment Ordering Information PART NUMBER (Note) • Pb-free plus anneal available (RoHS compliant) - 10 Ld MSOP MDP0043 13” 10 Ld MSOP MDP0043 (2,500 pcs) Tape and Reel Coming Soon Evaluation Board ISL55191EVAL1Z Coming Soon Evaluation Board ISL55291EVAL1Z NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL55191, ISL55291 Pinouts ISL55191 (8 LD DFN) TOP VIEW ISL55191 (8 LD SOIC) TOP VIEW FEEDBACK 1 IN- 2 IN+ 3 + 8 EN EN 1 7 V+ FEEDBACK 2 6 OUT V- 4 IN- 3 IN+ 4 + 8 V+ 7 OUT 6 NC 5 V- 5 NC ISL55291 (10 LD MSOP) TOP VIEW OUT_A 1 IN-_A 2 IN+_A 3 V- 4 EN_A 5 2 10 V+ 9 OUT_B + + 8 IN-_B 7 IN+_B 6 EN_B FN6263.1 March 30, 2007 ISL55191, ISL55291 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V Thermal Resistance θJA (°C/W) 8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . TBD 8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . 110 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 115 Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER V+ = 5V, V- = GND, RL = 1kΩ, RG = 30Ω, RF = 270Ω. unless otherwise specified. Parameters are per amplifier. All values are at V+ = 5V, TA = +25°C. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 170 800 µV DC SPECIFICATIONS VOS Input Offset Voltage ΔV OS --------------ΔT Input Offset Drift vs Temperature IOS Input Offset Current 0.3 0.7 µA IB Input Bias Current -12 -19 µA VCM Common-Mode Voltage Range 3.8 V CMRR Common-Mode Rejection Ratio VCM = 0V to 3.8V 85 100 dB PSRR Power Supply Rejection Ratio V+ = 3V to 5V 70 77 dB AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 1kΩ 85 97 dB VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ connected to V+/2 -40°C to +85°C 0 Output high, RL = 1kΩ connected to V+/2 IS,ON Supply Current, Enabled 2.2 23 4.96 µV/°C 40 4.98 mV V ISL55191 6.1 9 mA ISL55291 12 18 mA 21 40 µA IS,OFF Supply Current, Disabled IO+ Short-Circuit Output Current RL = 10Ω connected to V+/2 110 132 mA IO- Short-Circuit Output Current RL = 10Ω connected to V+/2 110 132 mA VSUPPLY Supply Operating Range V+ to V- VINH ENABLE High Level VINL ENABLE Low Level IENH ENABLE Input High Current VEN = V+ ISL55191 (EN) ENABLE Input Low Current VEN = V- IENL 3 3 5 2 V V 0.8 V 20 80 nA ISL55291 (EN) 0.8 1.5 µA ISL55191 (EN) 5 6.2 µA ISL55291 (EN) 20 80 nA FN6263.1 March 30, 2007 ISL55191, ISL55291 Electrical Specifications PARAMETER V+ = 5V, V- = GND, RL = 1kΩ, RG = 30Ω, RF = 270Ω. unless otherwise specified. Parameters are per amplifier. All values are at V+ = 5V, TA = +25°C. DESCRIPTION CONDITIONS MIN TYP MAX UNIT AC SPECIFICATIONS GBW Gain Bandwidth Product AV = +10; VOUT = 100mVP-P; Rf/Rg = 909Ω/100Ω 800 MHz HD (4MHz) 2nd Harmonic Distortion AV = +10; VOUT = 2VP-P; Rf/Rg = 909Ω/100Ω -94 dBc 3rd Harmonic Distortion -104 dBc ISO Off-state Isolation; EN = 1 ISL55291; fO = 10MHz; AV = +10; VIN = 640mVP-P; EN = 0 ISL55191 Rf/Rg = 909Ω/100Ω; CL = 1.2pF -65 dB X-TALK ISL55291 Channel to Channel Crosstalk fO = 10MHz; AV = +10; VOUT (Driven Channel) = 640mVP-P; Rf/Rg = 909Ω/100Ω; CL = 1.2pF -75 dB VN Input Referred Voltage Noise fO = 1kHz 1.2 nV/√Hz IN Input Referred Current Noise fO = 10kHz 3.8 pA/√Hz 260 V/uS 6.6 ns 5.7 ns 5 ns 4 ns 3 ns 3 ns TRANSIENT RESPONSE SR Slew Rate 150 tr, tf Large Signal Rise Time, tr 10% to 90% Fall Time, tf 10% to 90% Rise Time, tr 10% to 90% Fall Time, tf 10% to 90% AV = +10; VOUT = 3.5VP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF AV = +10; VOUT = 1VP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF tr, tf, Small Signal Rise Time, tr 10% to 90% tpd Propagation Delay 10% VIN to 10% VOUT AV = +10; VOUT = 100mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF 1.6 ns tIOL Positive Input Overload Recovery Time, tIOL+; 10% VIN to 10% VOUT VS = ±2.5V; AV = +10; VIN = +VCM +0.5V; Rf/Rg = 909Ω/100Ω; CL = 1.2pF 50 ns Negative Input Overload Recovery Time, tIOL-; 10% VIN to 10% VOUT VS = ±2.5V; AV = +10; VIN = -V -0.5V; Rf/Rg = 909Ω/100Ω; CL = 1.2pF 30 ns Positive Output Overload Recovery VS = ±2.5V; AV = +10; VIN = 2.3VP-P; Time, tOOL+; 10% VIN to 10% VOUT Rf/Rg = 909Ω/100Ω; CL = 1.2pF 40 ns Negative Output Overload Recovery VS = ±2.5V; AV = +10; VIN = 2.3VP-P; Time, tOOL-; 10% VIN to 10% VOUT Rf/Rg = 909Ω/100Ω; CL = 1.2pF 30 ns tOOL tEN ISL55191 tEN ISL55291 Fall Time, tf 10% to 90% AV = +10; VOUT = 100mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF ENABLE to Output Turn-on Delay Time; 10% EN to 10% VOUT AV = +10; VIN = 500mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF 540 ns ENABLE to Output Turn-off Delay Time; 10% EN to 10% VOUT AV = +10; VIN = 500mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF 390 ns ENABLE to Output Turn-on Delay Time; 10% EN to 10% VOUT AV = +10; VIN = 500mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF 330 ns ENABLE to Output Turn-off Delay Time;10% EN to 10% VOUT AV = +10; VIN = 500mVP-P; Rf/Rg = 909Ω/100Ω CL = 1.2pF 50 ns 4 FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves 1 1 0 0 NORMALIZED GAIN (dB) -2 Rf = 249, Rg = 27.4 -3 Rf = 274, Rg = 30.1 NORMALIZED GAIN (dB) Rf = 133, Rg = 14.7 -1 Rf = 316, Rg = 34.8 -4 -5 Rf = 365, Rg = 40.2 -6 -7 AV = 10 RL = 1k VOUT = 100mVP-P -8 -9 .01 0.1 Rf = 2.74k, Rg = 301 Rf = 909, Rg = 100 1.0 10 FREQUENCY (MHz) 100 -1 -2 -3 -5 AV = 10 RL = 1k -6 CL = 1.3pF R = 909 -7 Rf = 100 g -8 0.1 1k -2 GAIN (dB) NORMALIZED GAIN (dB) -1 RL = 1k -4 -6 RL = 250 AV = 10 CL = 1.3pF VOUT = 100mVP-P -7 -8 RL = 100 -9 .01 0.1 1.0 10 1.0 100 1k 1k FREQUENCY (MHz) FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS RLOAD FIGURE 4. CLOSED LOOP GAIN vs FREQUENCY 2 4 VS = 1.2V 0 -1 -2 -3 -4 VS = 2.5V -5 Cg = 0.5pF Rf = 909 -6 R = 100 g -7 RL = 1k VOUT = 100mVP-P -8 .01 0.1 1.0 10 100 FREQUENCY (MHz) FIGURE 5. GAIN vs FREQUENCY vs VS 5 CL = 23.2pF 3 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 100 65 AV = 1000 Rf/Ri = 100k/100 60 55 50 45 AV = 10 Rf/Ri = 909/100 40 35 30 AV = 100 Rf/Ri = 10k/100 25 20 15 RL = 1k 10 CL = 2.2pF 5 V OUT = 100mVP-P 0 0.1 1.0 10 100 1k FREQUENCY (MHz) 1 10 FIGURE 2. GAIN vs FREQUENCY vs VOUT 0 RL = 500 VOUT = 1V FREQUENCY (MHz) 1 -5 VOUT = 200mV -4 FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS Rf vs Rg -3 VOUT = 100mV 1k CL = 13.2pF 2 CL = 8.0pF 1 0 CL = 1.2pF -1 CL = 2.2pF -2 -3 AV = 10 -4 V+ = 5V RL = 1k -5 V OUT = 100mVP-P -6 0.1 0.1 CL = 4.5pF 10 100 FREQUENCY (MHz) 1k FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS CLOAD FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves (Continued) 5 3 Cg = 9.0pF 2 Cg = 7.6pF 1 Cg = 5.5pF 0 Cg = 3.0pF -1 Rf = 909 -2 Rg = 100 A = 10 -3 V RL = 1k -4 VOUT = 100mVP-P VS = 5V -5 .01 0.1 1.0 Cg = 0.8pF 10 Cg = 8.7pF 4 Cg = 10.8pF NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 5 Cg = 12.8pF 4 100 1k Cg = 7.3pF 3 Cg = 5.2pF 2 Cg = 3.8pF 1 Cg = 2.7pF 0 Cg = 1.6pF -1 Rf = 909 -2 Rg = 100 AV = 10 -3 RL = 1k VOUT = 100mVP-P -4 VS = 5V -5 .01 0.1 1.0 FIGURE 7. ISL55191 GAIN vs FREQUENCY FOR VARIOUS Cg ENABLED INPUT IMPEDANCE (Ω) DISABLED INPUT IMPEDANCE (Ω) 10k 1k Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Rg= 100 VSOURCE = 500mVP-P RL = 1k 100 10 .01 0.1 1.0 10 100 100k 10k 1k Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Rg= 100 VSOURCE = 500mVP-P RL = 1k 100 10 1 1k .01 0.1 FREQUENCY (MHz) FIGURE 9. DISABLED INPUT IMPEDANCE vs FREQUENCY 1.0 10 FREQUENCY (MHz) 100 1k FIGURE 10. ENABLED INPUT IMPEDANCE vs FREQUENCY 100 OUTPUT IMPEDANCE (Ω) 10k IMPEDANCE (Ω) 1k 1M 100k 1k 10 100 FIGURE 8. ISL55291 GAIN vs FREQUENCY FOR VARIOUS Cg 1M 100 10 FREQUENCY (MHz) FREQUENCY (MHz) 1 Cg = 0.5pF Cg = 0.5pF Rf = 909 Rg = 100 AV = 10 VSOURCE = 1VP-P .01 0.1 1.0 10 100 FREQUENCY (MHz) FIGURE 11. DISABLED OUTPUT IMPEDANCE vs FREQUENCY 6 1k Cg = 0.5pF Rf = 909 Rg = 100 10 AV = 10 VSOURCE = 1VP-P 1 0.1 0.01 .01 0.1 1.0 10 100 1k FREQUENCY (MHz) FIGURE 12. ENABLED OUTPUT IMPEDANCE vs FREQUENCY FN6263.1 March 30, 2007 ISL55191, ISL55291 0 AV = 10 -10 Cg = 0.8pF R = 1k -20 L Rg = 100 -30 Rf = 909 = 1V V -40 P-P 0 PSRR (dB) CMRR (dB) Typical Performance Curves (Continued) -50 -60 A = 10 -10 CV = 0.8pF g -20 RL = 1k Rg = 100 -30 Rf = 909 -40 VP-P = 1V PSRR+ -50 -60 -70 -70 -80 -80 -90 -90 -100 .01 -100 .01 0.1 1.0 10 100 1k 0.1 FREQUENCY (MHz) 10 100 1k FIGURE 14. PSRR vs FREQUENCY 0 0 Cg = 1.6pF -20 CL = 1.2pF AV = 10 Rf = 909 -40 R = 100 i VIN = 640mVP-P -60 RL = 1k Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Ri = 100 VOUT (DRIVEN CHANNEL) = 640mVP-P RL = 1k -20 CROSSTALK (dB) OFF ISOLATION (dB) 1.0 FREQUENCY (MHz) FIGURE 13. CMRR vs FREQUENCY -80 -100 -40 -60 -80 -100 -120 -140 .01 0.1 1.0 10 FREQUENCY (MHz) 100 -120 .01 1k 10 100 1k 1000 INPUT NOISE CURRENT (pA/√Hz) AV = 100 Rf = 303 Rg = 3.3 Ri = 1k 10 1 1.0 FIGURE 16. ISL55291 CHANNEL TO CHANNEL CROSSTALK vs FREQUENCY 100 1 0.1 0.1 FREQUENCY (MHz) FIGURE 15. OFF ISOLATION vs FREQUENCY INPUT NOISE VOLTAGE (nV/√Hz) PSRR- 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 17. INPUT VOLTAGE NOISE vs FREQUENCY 7 100 10 AV = 100 Rf = 303 Rg = 3.3 RL = 1k 1 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 18. INPUT CURRENT NOISE vs FREQUENCY FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves (Continued) 0.6 0.2 VS = +2.5V AV = 10 RL = 1k Rg = 100 0.02 Rf = 909 0.04 SMALL SIGNAL (V) 0.4 0 -0.2 0 -0.02 -0.04 -0.4 0 20 40 60 80 -0.06 0 100 20 40 60 TIME (ns) TIME (ns) FIGURE 19. LARGE SIGNAL STEP RESPONSE VS = +2.5V AV = 10 RL = 1k Rg = 100 Rf = 909 45 OVERSHOOT (%) 40 35 VOUT = 0.1V 3.1 2.6 2.9 2.4 2.7 VOUT = 0.5V 30 VOUT = 1V 25 20 2.2 INPUT 2.0 2.5 2.3 VOUT = 3.5V 1.9 5 1.7 0 5 10 15 20 25 30 CL (pF) 35 40 45 0 50 -2.2 1.5 -2.3 1.0 -2.4 0.5 -2.5 0 -2.6 INPUT OUTPUT -2.7 -1.0 AV = 10 RL = 10k VS = ±2.5V Rg = 100 Rf = 909 VIN = -V-0.5V -2.8 -2.9 -3.0 -3.1 0 -0.5 20 40 60 80 100 120 140 160 180 200 TIME (ns) FIGURE 23. ISL55291 NEGATIVE INPUT RECOVERY RECOVERY 8 -1.5 -2.0 20 40 60 1.4 1.2 80 100 120 140 160 180 200 TIME (ns) 0.6 3 0.4 2 INPUT 1 0 0 OUTPUT AV = 10 RL = 10k VS = +2.5V Rg = 100 Rf = 909 VIN = 0.7VP-P -0.2 -0.4 -2.5 -3.0 1.6 FIGURE 22. ISL55291 POSITIVE INPUT RECOVERY TIME 0.2 OUTPUT (V) INPUT (V) FIGURE 21. PERCENT OVERSHOOT FOR VARIOUS CLOAD INPUT (V) 0 1.8 OUTPUT AV = 10 RL = 10k VS = ±2.5V Rg = 100 Rf = 909 VIN = VCM +0.5V 2.1 15 10 100 FIGURE 20. SMALL SIGNAL STEP RESPONSE INPUT (V) 50 80 OUTPUT (V) -0.6 -1 OUTPUT (V) LARGE SIGNAL (V) 0.06 VS = +2.5V AV = 10 RL = 1k Rg = 100 Rf = 909 -2 -0.6 -3 0 20 40 60 80 100 120 140 160 180 200 TIME (ns) FIGURE 24. OUTPUT OVERLOAD RECOVERY FN6263.1 March 30, 2007 ISL55191, ISL55291 6.0 280 2.5 5.0 270 OUTPUT 2.0 4.0 AV = 10 Rf = 909 Rg= 100 RL = 10k VIN = 280mV 1.5 1.0 0.5 3.0 2.0 1.0 ENABLE 0 -0.5 SLEW RATE (V/µs) 3.0 ENABLE (V) ENABLE/OUTPUT (V) Typical Performance Curves (Continued) 0.5 1 1.5 2 2.5 TIME (µs) 3 3.5 260 250 240 230 0 0 AV = 10 Rf = 909 RL = 10k Ri= 100 220 -1.0 3.0 4 3.5 4.0 4.5 5.0 5.5 VS (V) FIGURE 25. ENABLE TO OUTPUT DELAY FIGURE 26. ISL55291 POSITIVE SLEW RATE vs VS -260 SLEW RATE (V/µs) -270 -280 -290 -300 -310 -320 3.0 3.5 4.0 4.5 5.0 5.5 VS (V) FIGURE 27. ISL55291 NEGATIVE SLEW RATE vs VS 19 n = 2000 34 18 MAX MAX 30 16 CURRENT (µA) CURRENT (mA) 17 15 MEDIAN 14 13 12 11 -20 0 20 40 TEMPERATURE (°C) 60 22 MIN 80 FIGURE 28. SUPPLY CURRENT ENABLED vs TEMPERATURE VS = ±2.5V 9 MEDIAN 26 18 MIN 10 9 -40 n = 2000 14 -40 -20 0 20 40 TEMPERATURE (°C) 60 80 FIGURE 29. SUPPLY CURRENT DISABLED vs TEMPERATURE VS = ±2.5V FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves (Continued) 20 16 n = 2000 15 18 MAX MAX 16 13 CURRENT (µA) CURRENT (mA) 14 MEDIAN 12 11 MEDIAN 14 12 n = 2000 10 8 10 MIN 6 9 4 -40 8 -40 -20 0 20 40 TEMPERATURE (°C) 60 80 FIGURE 30. SUPPLY CURRENT ENABLED vs TEMPERATURE VS = ±1.5V 800 MIN -20 0 20 40 TEMPERATURE (°C) 500 n = 2000 n = 2000 300 MAX MAX 100 VOS (µV) 400 VOS (µV) 80 FIGURE 31. SUPPLY CURRENT DISABLED vs TEMPERATURE VS = ±1.5V 600 MEDIAN 200 -300 -200 -500 MIN MIN -20 0 20 40 TEMPERATURE (°C) 60 -700 -40 80 -10 n = 2000 -10.5 MAX 20 40 60 80 n = 2000 MAX -11 -11.5 IBIAS - (µA) -11.5 MEDIAN -12 -12.5 -13 -13.5 MEDIAN -12 -12.5 -13 -13.5 -14 -14 MIN -14.5 -15 -40 0 FIGURE 33. VIO vs TEMPERATURE VS = ±1.5V -10 -11 -20 TEMPERATURE (°C) FIGURE 32. VIO vs TEMPERATURE VS = ±2.5V -10.5 MEDIAN -100 0 -400 -40 IBIAS + (µA) 60 -20 0 20 40 60 80 TEMPERATURE (°C) FIGURE 34. IBIAS+ vs TEMPERATURE VS = ±2.5V 10 MIN -14.5 -15 -40 -20 0 20 40 60 80 TEMPERATURE (°C) FIGURE 35. IBIAS- vs TEMPERATURE VS = ±2.5V FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves (Continued) -10.0 -9 n = 2000 -10.5 n = 2000 -10 -11.0 MEDIAN IBIAS - (µA) IBIAS + (µA) MAX MAX -11.5 -12.0 -12.5 -13.0 -13.5 MIN -14.0 -11 -12 MEDIAN -13 -14 MIN -14.5 -15.0 -40 -20 0 20 40 TEMPERATURE (°C) 60 -15 -40 80 81 n = 2000 40 60 80 n = 2000 80 MAX 79 101 PSRR (dB) V+ = 5V 99 97 95 V+ = 3V MEDIAN 78 77 76 75 93 74 MIN 91 -40 -20 0 20 40 60 73 -40 80 -20 0 FIGURE 38. CMRR vs TEMPERATURE V+ = ±2.5V, ±1.5V 38 n = 2000 60 80 n = 2000 36 MAX 4.982 40 FIGURE 39. PSRR vs TEMPERATURE ±1.5V TO ±2.5V 4.986 4.984 20 TEMPERATURE (°C) TEMPERATURE (°C) MAX 34 32 MEDIAN VOUT (mV) VOUT (V) 20 FIGURE 37. IBIAS- vs TEMPERATURE VS = ±1.5V 103 CMRR (dB) 0 TEMPERATURE (°C) FIGURE 36. IBIAS+ vs TEMPERATURE VS = ±1.5V 105 -20 4.98 4.978 MIN 30 28 MEDIAN 26 24 4.976 22 4.974 MIN 20 4.972 -40 -20 0 20 40 TEMPERATURE (°C) 60 FIGURE 40. VOUT HIGH vs TEMPERATURE VS = ±2.5V, RL = 1K 11 80 18 -40 -20 0 20 40 60 80 TEMPERATURE (°C) FIGURE 41. VOUT LOW vs TEMPERATURE VS = ±2.5V, RL = 1k FN6263.1 March 30, 2007 ISL55191, ISL55291 Typical Performance Curves (Continued) 2.990 41 n = 2000 n = 2000 2.988 MAX 38 MAX 35 VOUT (V) VOUT (V) 2.986 MEDIAN 2.984 2.982 32 MEDIAN 29 2.980 MIN 2.978 26 2.976 -40 23 MIN -20 0 20 40 TEMPERATURE (°C) 60 80 FIGURE 42. VOUT HIGH vs TEMPERATURE VS = ±1.5V, RL = 1k 12 -40 -20 0 20 40 60 80 TEMPERATURE (°C) FIGURE 43. VOUT LOW vs TEMPERATURE VS = ±1.5V, RL = 1k FN6263.1 March 30, 2007 ISL55191, ISL55291 Pin Descriptions ISL55191 (8 LD SOIC) ISL55191 (8 LD DFN) 5 6 2 3 ISL55291 (10 LD MSOP) 2 (A) 8 (B) PIN NAME FUNCTION NC Not connected IN- Inverting input EQUIVALENT CIRCUIT V+ IN- IN+ VCircuit 1 3 4 3 (A) 7 (B) IN+ 4 5 4 V- 6 7 1 (A) 9 (B) OUT Non-inverting input (See circuit 1) Negative supply Output V+ OUT VCircuit 2 7 8 10 V+ Positive supply 5 (A) 6 (B) EN Enable pin with internal pulldown referenced to the -V pin; Logic “1” selects the disabled state; Logic “0” selects the enabled state. V+ EN VCircuit 3a 8 1 EN Enable pin with internal pulldown referenced to the -V pin; Logic “0” (-V) selects the disabled state; Logic “1” (+V) selects the enabled state. V+ EN VCircuit 3b 1 2 FEEDBACK Feedback pin to reduce INcapacitance V+ FEEDBACK OUT VCircuit 4 13 FN6263.1 March 30, 2007 ISL55191, ISL55291 Applications Information where: Product Description • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) The ISL55191 and ISL55291 are voltage feedback operational amplifiers designed for communication and imaging applications requiring very low voltage and current noise. Both parts features low distortion while drawing moderately low supply current. The ISL55191 and ISL55291 use a classical voltage-feedback topology which allows them to be used in a variety of applications where currentfeedback amplifiers are not appropriate because of restrictions placed upon the feedback element used with the amplifier. • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------RL (EQ. 2) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier Enable/Power-Down Both devices can be operated from a single supply with a voltage range of +3V to +5V, or from split ±1.5V to ±2.5V. The logic level input to the ENABLE pins are TTL compatible and are referenced to the -V terminal in both single and split supply applications. The following discussion assumes single supply operation. The ISL55191 uses a logic “0” (<0.8V) to disable the amplifier and the ISL55291 uses a logic “1” (>2V) to disable its amplifiers. In this condition, the output(s) will be in a high impedance state and the amplifier(s) current will be reduced to 21µA. The ISL55191 has an internal pull-up on the EN pin and is enabled by either floating or tying the EN pin to a voltage >2V. The ISL55291 has internal pull-downs on the EN pins and are enabled by either floating or tying the EN pins to a voltage <0.8V. The enable pins should be tied directly to their respective supply pins when not being used (EN tied to -V for the ISL55291 and EN tied to +V for the ISL55191). Current Limiting The ISL55191 and ISL55291 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) 14 (EQ. 1) • VS = Supply voltage • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Low impedance ground plane construction is essential. Surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7µF tantalum capacitor in parallel with a 0.01µF capacitor has been shown to work well when placed at each supply pin. For good AC performance, parasitic capacitance should be kept to a minimum, especially at the inverting input. When ground plane construction is used, it should be removed from the area near the inverting input to minimize any stray capacitance at that node. Carbon or Metal-Film resistors are acceptable with the Metal-Film resistors giving slightly less peaking and bandwidth because of additional series inductance. Use of sockets (particularly for the SOIC package) should be avoided if possible. Sockets add parasitic inductance and capacitance which will result in additional peaking and overshoot. For inverting gains, this parasitic capacitance has little effect because the inverting input is a virtual ground, but for noninverting gains, this capacitance (in conjunction with the feedback and gain resistors) creates a pole in the feedback path of the amplifier. This pole, if low enough in frequency, has the same destabilizing effect as a zero in the forward open-loop response. The use of large-value feedback and gain resistors exacerbates the problem by further lowering the pole frequency (increasing the possibility of oscillation.). FN6263.1 March 30, 2007 ISL55191, ISL55291 CURRENT INPUT +5VDC RF 10kΩ RGRT 100 PARASITIC L TO R RSENSE 0.01Ω RG+ 100Ω ISL55191 IN- V+ FEEDBACK VOUT OUT IN+ VRL RREF 10kΩ VREF +2.5V CURRENT INPUT FIGURE 44. GROUND SIDE CURRENT SENSE AMPLIFIER Current Sense Application Circuit The schematic in Figure 44 provides an example of utilizing the ISL55191 high speed performance with the ground sensing input capability to implement a single-supply, G = 10 differential low side current sense amplifier. The reference voltage applied to VREF (+2.5V) defines the amplifier output 0A current sense reference voltage at one half the supply voltage level (VS = +5VDC), and RSENSE sets the current sense gain and full scale values. In this example the current gain is 10A/V over a maximum current range of slightly less than ±25A with RSENSE = 0.01Ω. The amplifier VIO error (800µV max) and input bias offset current IIO error (0.7µA) together contribute less than 10mV (100mA) at the output for better than 0.2% full scale accuracy. The amplifier’s high slew rate and fast pulse response make this circuit suitable for low-side current sensing in PMWM and motor control applications. The excellent input overload recovery response enables the circuit to maintain performance in the presence of parasitic inductance that cause fast rise and falling edge spikes that can momentarily overload the input stage of the amplifier. 15 FN6263.1 March 30, 2007 ISL55191, ISL55291 Small Outline Package Family (SO) A D h X 45° (N/2)+1 N A PIN #1 I.D. MARK E1 E c SEE DETAIL “X” 1 (N/2) B L1 0.010 M C A B e H C A2 GAUGE PLANE SEATING PLANE A1 0.004 C 0.010 M C A B L b 0.010 4° ±4° DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL SO-14 SO16 (0.300”) (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - 16 20 24 28 Reference - N SO-8 SO16 (0.150”) 8 14 16 Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 16 FN6263.1 March 30, 2007 ISL55191, ISL55291 Package Outline Drawing L8.3x3D 8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (DFN) Rev 0, 9/06 PIN 1 INDEX AREA 3.00 1.45 A PIN 1 INDEX AREA B 0.075 C 4X 6X 0.50 BSC 3.00 1.50 REF 1.75 8X 0.25 0.10 M C A B 8X 0.40 2.20 TOP VIEW BOTTOM VIEW SEE DETAIL X'' (8X 0.60) (8X 0.25) 0.10 C 0.85 C (1.75) SEATING PLANE 0.08 C (6X 0.50 BSC) SIDE VIEW (1.45) (2.20) TYPICAL RECOMMENDED LAND PATTERN c 0.20 REF 5 0~0.05 DETAIL “X” NOTES: 1. Controlling dimensions are in mm. Dimensions in ( ) for reference only. 2. Unless otherwise specified, tolerance : Decimal ±0.05 Angular ±2° 3. Dimensioning and tolerancing conform to JEDEC STD MO220-D. 4. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 5. Tiebar shown (if present) is a non-functional feature. 17 FN6263.1 March 30, 2007 ISL55191, ISL55291 Mini SO Package Family (MSOP) 0.25 M C A B D MINI SO PACKAGE FAMILY (N/2)+1 N E MDP0043 A E1 MILLIMETERS PIN #1 I.D. 1 B (N/2) e H C SEATING PLANE 0.10 C N LEADS SYMBOL MSOP8 MSOP10 TOLERANCE NOTES A 1.10 1.10 Max. - A1 0.10 0.10 ±0.05 - A2 0.86 0.86 ±0.09 - b 0.33 0.23 +0.07/-0.08 - c 0.18 0.18 ±0.05 - D 3.00 3.00 ±0.10 1, 3 E 4.90 4.90 ±0.15 - E1 3.00 3.00 ±0.10 2, 3 e 0.65 0.50 Basic - L 0.55 0.55 ±0.15 - L1 0.95 0.95 Basic - N 8 10 Reference - 0.08 M C A B b Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. L1 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. A 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. c SEE DETAIL "X" A2 GAUGE PLANE L A1 0.25 3° ±3° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 FN6263.1 March 30, 2007