DATASHEET

HA-5101
T
UCT
R OD RODU C
P
E
P
T
E
E
OL
UT
OBS UBSTIT -2842
S
A
H
E
525,
SIBL Data
HA-2 Sheet
P OS
®
May 2003
FN2905.5
10MHz, Low Noise, Operational Amplifiers
Features
The HA-5101 is a dielectrically isolated operational amplifier
featuring low noise, (3.0nV/√Hz at 1kHz).
• Low Noise . . . . . . . . . . . . . . . . . . . . . 3.0nV/√Hz at 1kHz
DC characteristics of the HA-5101 assure accurate
performance. The 0.5mV offset voltage is externally adjustable and offset voltage drift is just 3µV/oC. An offset current
of only 30nA reduces input current errors and an open loop
voltage gain of 1 x 106V/V increases loop gain for low
distortion amplification.
The HA-5101 is ideal for audio applications, especially lowlevel signal amplifiers such as microphone, tape head and
phono cartridge preamplifiers. Additionally, it is well suited
for low distortion oscillators, low noise function generators
and high Q filters.
• Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10MHz
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V/µs
• Low Offset Voltage Drift . . . . . . . . . . . . . . . . . . . . 3µV/oC
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 x 106V/V
• High CMRR/PSRR . . . . . . . . . . . . . . . . . . . . . . . . . 100dB
• High Output Drive Capability . . . . . . . . . . . . . . . . . . 30mA
Applications
• High Quality Audio Preamplifiers
• High Q Active Filters
• Low Noise Function Generators
Pinout
• Low Distortion Oscillators
HA-5101(SOIC)
TOP VIEW
• Low Noise Comparators
• For Further Design Ideas, See Application Note AN554
BAL
1
-IN
2
-
8
COMP
7
V+
+
+IN
3
6
OUT
V-
4
5
BAL
1
Part Number Information
PART NUMBER
(BRAND)
HA9P5101-9
(H51019)
TEMP.
RANGE (oC)
-40 to 85
PACKAGE
8 Ld SOIC
PKG.
NO.
M8.15
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA-5101
Schematic
-IN
R25
R24
+IN
R23
R26
Q23
Q26
V+
R28
R60
Q47
Q28
Q24
Q25
R35
QL41
QL1
Q16
QL2
R34
Q14
Q45
R37
R36
Q37
Q43
Q36
R15
Q1A Q1B Q29
Q2B
Q46
Q44
R22
Q35
Q15
Q41
Q33
OUTPUT
Q30
Q38
Q2A
Q13
Q31
Q21
R17A
Q42
Q32
Q17
Q19B
R20
Q20
Q5
Q10
Q19A
Q11
Q27
C1
Q6
Q4
Q3
Q7
Q9
Q12
R58
Q34
R4A
R3A
R11
R10
R12
R27
R3B
Q8
Q18
Q49 Q50
Q39
R19A
C2
Q48
R4B
Q51
R18
V-
R19B
BAL
2
BAL
HA-5101
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY
Output Current . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . .
160
N/A
Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(Lead Tips Only)
Operating Conditions
Temperature Range
HA-5101-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain the maximum junction temperature below 150oC for the plastic
packages.
2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379
for details.
VSUPPLY = ±15V, RS = 100Ω, RL = 2kΩ, CL = 50pF, Unless Otherwise Specified
Electrical Specifications
TEMP (oC)
MIN
TYP
MAX
UNITS
25
-
0.5
3
mV
Full
-
-
4
mV
Offset Voltage Drift
Full
-
3
-
µV/oC
Bias Current
25
-
100
200
nA
Full
-
-
325
nA
25
-
30
75
nA
Full
-
-
125
nA
Input Resistance
25
-
500
-
kΩ
Common Mode Range
Full
±12
-
-
V
25
-
1000
-
kV/V
Full
100
250
-
kV/V
PARAMETER
TEST CONDITIONS
INPUT CHARACTERISTICS
Offset Voltage
Offset Current
TRANSFER CHARACTERISTICS
VOUT = ±10V
Large Signal Voltage Gain
Common Mode Rejection Ratio
VCM = ±10V
Full
80
100
-
dB
Small Signal Bandwidth
AV = 1
25
-
10
-
MHz
Full
1
-
-
V/V
RL = 10kΩ
Full
±12
±13
-
V
RL = 2kΩ
Full
±12
±13
-
V
VS = ±18V, RL = 600Ω
25
±15
-
-
V
Output Current (Note 3)
25
25
30
-
mA
Full Power Bandwidth (Note 4)
25
95
160
-
kHz
Output Resistance
25
-
110
-
Ω
Maximum Load Capacitance
25
-
800
-
pF
Rise Time
25
-
50
100
ns
Overshoot
25
-
20
35
%
Minimum Stable Gain
OUTPUT CHARACTERISTICS
Output Voltage Swing
TRANSIENT RESPONSE (Note 5)
3
HA-5101
VSUPPLY = ±15V, RS = 100Ω, RL = 2kΩ, CL = 50pF, Unless Otherwise Specified (Continued)
Electrical Specifications
TEMP (oC)
MIN
TYP
MAX
UNITS
25
6
10
-
V/µs
-
-
2.6
-
µs
f = 10Hz
25
-
5
7
nV/√Hz
f = 1kHz
25
-
3.0
4.0
nV/√Hz
f = 10Hz
25
-
4.0
9
pA/√Hz
-
0.6
2.5
pA/√Hz
25
-
0.870
-
µVRMS
Full
-
4
7
mA
Full
80
100
-
dB
PARAMETER
TEST CONDITIONS
Slew Rate
Settling Time (Note 6)
0.01%
NOISE CHARACTERISTICS (Note 7)
Input Noise Voltage
Input Noise Current
f = 1kHz
Broadband Noise Voltage
f = DC To 30kHz
POWER SUPPLY CHARACTERISTICS
Supply Current
∆VS = ±5V
Power Supply Rejection Ratio
NOTES:
3. Output current is measured with VOUT = ±15V with VSUPPLY = ±18V.
Slew Rate
4. Full power bandwidth is guaranteed by equation: Full power bandwidth = --------------------------- , V PEAK = 10V.
2πV P EAK
5. Refer to Test Circuits section of the data sheet.
6. Settling time is measured to 0.01% of final value for a 10V output step, and AV = -1.
7. The limits for these parameters are guaranteed based on lab characterization, and reflect lot-to-lot variation.
Test Circuits and Waveforms
2kΩ
2kΩ
IN
IN
-
OUT
+
+
OUT
-
2kΩ
50pF
50pF
1kΩ
FIGURE 1. LARGE SIGNAL RESPONSE CIRCUIT
4
FIGURE 2. SMALL SIGNAL RESPONSE CIRCUIT
HA-5101
Test Circuits and Waveforms
(Continued)
+5V
+100mV
0V
0V
-5V
-100mV
Ch. 1 = 2.5V/Div.
Timebase = 1.00µs/Div.
Ch. 1 = 50mV/Div.
Timebase = 100ns/Div.
FIGURE 3. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 4. SMALL SIGNAL TRANSIENT RESPONSE
+15V
2N4416
5kΩ
(NOTE 9)
TO
OSCILLOSCOPE
5kΩ
2kΩ
+15V
VOUT
+
VIN
(NOTE 9)
2kΩ
-15V
50pF
2kΩ
NOTES:
8. AV = -1.
9. Feedback and summing resistors should be 0.1% matched.
10. Clipping diodes are optional, HP5082-2810 recommended.
FIGURE 5. SETTLING TIME CIRCUIT
Application Information
The following is the recommended VIO adjust configuration:
Operation At ±5V Supply
+15V
The HA-5101 performs well at VS = ±5V exhibiting typical
characteristics as listed below:
ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBIAS. . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVOL (VO = ±3V) . . . . . . . . . . . . . . . . . .
VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . .
IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CMRR (∆VCM = ±2.5V) . . . . . . . . . . . . .
PSRR (∆VS = 0.5V) . . . . . . . . . . . . . . . .
Unity Gain Bandwidth . . . . . . . . . . . . . .
Slew Rate. . . . . . . . . . . . . . . . . . . . . . . .
3.7mA
0.5mV
56nA
106kV/V
3.7V
13mA
90dB
90dB
10MHz
7V/µs
7
3
(NOTE)
+
6
2
1
4
(NOTE)
5
RP
RP = 100kΩ
-15V
NOTE: Proper decoupling is always recommended, 0.1µF high quality
capacitor should be at or very near the device’s supply pins.
Input Protection
Offset Adjustment
The HA-5101 has built-in back-to-back protection diodes
which will limit the differential input voltage to approximately
5
HA-5101
7V. If the 5101 will be used in conditions where that voltage
may be exceeded, then current limiting resistors must be
used. No more than 25mA should be allowed to flow in the
HA-5101’s input.
If saturation cannot be avoided the HA-5101 recovers from a
25% overdrive in about 6.5µs (see photos).
Comparator Circuit
IN
V+
∆VIN
RLIM
∆VIN
RLIM
2
7
-
6
+
3
4
OUT
V-
( ∆V INMAX – 7V )
--------------------------------------------- ≤ 2R LIM
25mA
Choose RLIM Such That:
Top: Input
Bottom: Output, 5V/Div., 2µs/Div.
Output is overdriven negative and recovers in 6µs.
Output Saturation
When an op amp is overdriven, output devices can saturate
and sometimes take a long time to recover. Saturation can
be avoided (sometimes) by using circuits such as:
V+
R1
R2
+
R3
VSOURCE
R4
V-
Typical Performance Curves
1500
6
5
VOLTAGE
4
3
2
CURRENT
1
0
10
100
1K
10K
FREQUENCY (Hz)
FIGURE 6. NOISE SPECTRUM
6
100K
OFFSET VOLTAGE (µV)
7
INPUT NOISE CURRENT (pA/√Hz)
INPUT NOISE VOLTAGE (nV/√Hz)
8
1000
500
0
-50
-25
0
25
50
75
100
TEMPERATURE (oC)
FIGURE 7. OFFSET VOLTAGE vs TEMPERATURE
125
HA-5101
Typical Performance Curves
(Continued)
AV = 25000 VS = ±15V (2.25µVP-P RTO)
AV = 25000, VS = ±15V (12.89mVP-P RTO)
PEAK-TO-PEAK NOISE 0.1Hz TO 10Hz
PEAK-TO-PEAK TOTAL NOISE 0.1Hz TO 1MHz
250
200
0
BIAS CURRENT (nA)
-20
-40
150
100
50
-60
-55
-25
0
25
50
75
100
0
-55
125
-25
0
TEMPERATURE (oC)
FIGURE 8. INPUT OFFSET CURRENT vs TEMPERATURE
1.1
0.9
0.8
0.8
RL = 2kΩ, CL = 50pF
VS = ±15V
0.7
20
40
60
80
100
120
TEMPERATURE (oC)
FIGURE 10. SLEW RATE/RISE TIME vs TEMPERATURE
7
80
GAIN
60
40
0
20
45
90
0
PHASE
135
180
0.6
0
125
100
VOLTAGE GAIN (dB)
0.9
RISE TIME (NORMALIZED)
SLEW RATE (NORMALIZED)
1.0
SLEW RATE
-20
100
120
1.0
-40
75
140
RISE TIME
0.6
-60
50
FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE
1.1
0.7
25
TEMPERATURE (oC)
10
100
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 11. OPEN-LOOP GAIN/PHASE vs FREQUENCY
PHASE SHIFT (DEGREES)
INPUT OFFSET CURRENT (nA)
20
HA-5101
Typical Performance Curves
30
(Continued)
5
TA = 25oC, VS = ±15V
MAXIMUM
4
SUPPLY CURRENT (mA)
20
OFFSET CHANGE (µV)
TA = 25oC
10
0
-10
-20
-30
0
50
100
150
200
250
300
350
400
450
MINIMUM
3
TYPICAL
2
1
0
500
0
2
4
6
TIME (SECONDS)
16
18
20
FIGURE 13. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 12. INPUT OFFSET WARMUP DRIFT vs TIME
(NORMALIZED TO ZERO FINAL VALUE)
(SIX REPRESENTATIVE UNITS)
V/V
10M
(dB)
(140)
60
TA = 25oC, VS = ±15V
D
50
OUTPUT CURRENT (mA)
OPEN LOOP VOLTAGE GAIN
8
10
12
14
SUPPLY VOLTAGE (±V)
1M
(120)
100K
(100)
B
40
C
30
A
A
B
C
D
10
10K
(80)
VIN
VOUT
+15mV
-15mV
+15mV
-15mV
±15V
±15V
0V
0V
20
0
5
10
15
SUPPLY VOLTAGE (±V)
FIGURE 14. DC OPEN-LOOP VOLTAGE GAIN vs SUPPLY
VOLTAGE
8
18
0
20
40
60
80
100
120
140
TIME (S)
FIGURE 15. SHORT CIRCUIT CURRENT vs TIME
160
HA-5101
Typical Performance Curves
(Continued)
3
-55oC
GAIN
0
VERROR
125oC
GAIN
-3
-6
-9
-12
0
-55oC
PHASE
125oC
-45
PHASE
-90
-135
Vs = ±15V, AV = 1V/V
RL = 2kΩ, CL = 50pF
10K
100K
PHASE SHIFT (DEGREES)
CLOSED LOOP VOLTAGE GAIN (dB)
6
1mV
2.65µS
-180
1M
FREQUENCY (Hz)
-225
100M
10M
FIGURE 17. SETTLING WAVEFORM 1.5µs/DIV.
FIGURE 16. FREQUENCY RESPONSE
-40
40
AV = 100
REJECTION RATIO (dB)
GAIN (dB)
30
AV = 10
20
10
AV = 1
0
-10
-20
TA = 25oC, Vs = ±15V
-60
-PSRR/CMRR
-80
+PSRR
-100
TA = 25oC, VS = ±15V
RL = 2kΩ, CL = 50pF
10K
100K
1M
FREQUENCY (Hz)
10M
-120
100M
100
13
1M
100Ω
10kΩ
+0.2V
-8
-
-55oC
RLOAD
-VOUT (V)
100Ω
10kΩ
-0.2V
11
-
VOUT
+
-10
25oC
300
400
RLOAD (Ω)
FIGURE 20. +VOUT vs RL
9
500
600
125oC
-12
-13
9
25oC
-11
RLOAD
10
200
VOUT
+
-9
12
100
100K
-7
VSUPPLY = ±15V
125oC
+VOUT (V)
10K
FREQUENCY (Hz)
FIGURE 19. REJECTION RATIOS vs FREQUENCY
FIGURE 18. CLOSED-LOOP GAIN vs FREQUENCY
14
1K
VSUPPLY = ±15V
-55oC
-14
100
200
300
400
RLOAD (Ω)
FIGURE 21. -VOUT vs RL
500
600
HA-5101
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up): VTRANSISTOR COUNT: 54
PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5101
BAL
-IN
NC
V+
+IN
OUT
V-
BAL
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10